summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/machine
diff options
context:
space:
mode:
author Vas Crabb <vas@vastheman.com>2016-09-26 04:46:55 +1000
committer Vas Crabb <vas@vastheman.com>2016-09-26 04:51:59 +1000
commit33b2c733955112083b2912d4115eb0465026b4d0 (patch)
treefbbf0f355577aaf9a18dfa5ce269615ed5e70bec /src/devices/machine
parentfbbc293041838bf6007c439c57745f79b2c8d4fb (diff)
srcclean (nw)
Diffstat (limited to 'src/devices/machine')
-rw-r--r--src/devices/machine/68230pit.cpp2
-rw-r--r--src/devices/machine/6840ptm.h22
-rw-r--r--src/devices/machine/fga002.cpp214
-rw-r--r--src/devices/machine/fga002.h116
-rw-r--r--src/devices/machine/i82371sb.cpp4
-rw-r--r--src/devices/machine/scnxx562.cpp26
-rw-r--r--src/devices/machine/scnxx562.h24
7 files changed, 204 insertions, 204 deletions
diff --git a/src/devices/machine/68230pit.cpp b/src/devices/machine/68230pit.cpp
index a737989d7d2..725d6fa42cd 100644
--- a/src/devices/machine/68230pit.cpp
+++ b/src/devices/machine/68230pit.cpp
@@ -30,7 +30,7 @@
#define LOGPRINT(x) do { if (VERBOSE) logerror x; } while (0)
#define LOG(x)
#define LOGR(x)
-#define LOGINT(x) LOGPRINT(x)
+#define LOGINT(x) LOGPRINT(x)
#define LOGSETUP(x) LOGPRINT(x)
#if VERBOSE == 2
#define logerror printf
diff --git a/src/devices/machine/6840ptm.h b/src/devices/machine/6840ptm.h
index 4165bf5db28..c17f9d1b04d 100644
--- a/src/devices/machine/6840ptm.h
+++ b/src/devices/machine/6840ptm.h
@@ -110,21 +110,21 @@ private:
enum
{
- RESET_TIMERS = 0x01,
- CR1_SELECT = 0x01,
- T3_PRESCALE_EN = 0x01,
- INTERNAL_CLK_EN = 0x02,
- COUNT_MODE_8BIT = 0x04,
- INTERRUPT_EN = 0x40,
- COUNT_OUT_EN = 0x80
+ RESET_TIMERS = 0x01,
+ CR1_SELECT = 0x01,
+ T3_PRESCALE_EN = 0x01,
+ INTERNAL_CLK_EN = 0x02,
+ COUNT_MODE_8BIT = 0x04,
+ INTERRUPT_EN = 0x40,
+ COUNT_OUT_EN = 0x80
};
enum
{
- TIMER1_IRQ = 0x01,
- TIMER2_IRQ = 0x02,
- TIMER3_IRQ = 0x04,
- ANY_IRQ = 0x80
+ TIMER1_IRQ = 0x01,
+ TIMER2_IRQ = 0x02,
+ TIMER3_IRQ = 0x04,
+ ANY_IRQ = 0x80
};
double m_internal_clock;
diff --git a/src/devices/machine/fga002.cpp b/src/devices/machine/fga002.cpp
index e48ec63816d..d89a35bbbc9 100644
--- a/src/devices/machine/fga002.cpp
+++ b/src/devices/machine/fga002.cpp
@@ -37,10 +37,10 @@
#define LOG(x)
#define LOGR(x)
#define LOGSETUP(x)
-#define LOGINT(x) LOGPRINT(x)
-#define LOGVEC(x)
-#define LOGLVL(x)
-#define LOGIACK(x) LOGPRINT(x)
+#define LOGINT(x) LOGPRINT(x)
+#define LOGVEC(x)
+#define LOGLVL(x)
+#define LOGIACK(x) LOGPRINT(x)
#if VERBOSE == 2
#define logerror printf
#endif
@@ -135,14 +135,14 @@ void fga002_device::device_reset()
m_fga002[FGA_ISSYSFAIL] = 0x80;
m_fga002[FGA_ISFMB0MES] = 0x80;
m_fga002[FGA_ISFMB1MES] = 0x80;
- m_fga002[FGA_ISLOCAL0] = 0x80;
- m_fga002[FGA_ISLOCAL1] = 0x80;
- m_fga002[FGA_ISLOCAL2] = 0x80;
- m_fga002[FGA_ISLOCAL3] = 0x80;
- m_fga002[FGA_ISLOCAL4] = 0x80;
- m_fga002[FGA_ISLOCAL5] = 0x80;
- m_fga002[FGA_ISLOCAL6] = 0x80;
- m_fga002[FGA_ISLOCAL7] = 0x80;
+ m_fga002[FGA_ISLOCAL0] = 0x80;
+ m_fga002[FGA_ISLOCAL1] = 0x80;
+ m_fga002[FGA_ISLOCAL2] = 0x80;
+ m_fga002[FGA_ISLOCAL3] = 0x80;
+ m_fga002[FGA_ISLOCAL4] = 0x80;
+ m_fga002[FGA_ISLOCAL5] = 0x80;
+ m_fga002[FGA_ISLOCAL6] = 0x80;
+ m_fga002[FGA_ISLOCAL7] = 0x80;
}
//-------------------------------------------------
@@ -176,43 +176,43 @@ void fga002_device::device_timer (emu_timer &timer, device_timer_id id, INT32 pa
/* The FGA002 Interrupts
- The FGA-002 Gate Array provides high end support for interrupt functionality. It manages interrupt sources
- within the gate array as well as external sources connected to the gate array. The FGA-002 Gate Array is an
- efficient interface for various interrupt sources to the local CPU, and supports up to 18 external interrupters.
-
- Interrupt inputs provided for external interrupt sources (exclusive of the VMEbus interrupt inputs) offer
- maximum flexibility as they may be configured to be level/edge sensitive or low/high active. The control of
- these features is performed by two bits contained in the extended interrupt control registers. The Interrupt
- Auto Clear bit in the extended interrupt control register determines, whether the interrupt of an edge sensitive
- input is cleared automatically during the interrupt acknowledge cycle or has to be cleared by the interrupt
- service routine. Each interrupt source is bound to an individual interrupt channel which has its own assigned
- vector number. The interrupt channels are configured by the Interrupt Control Registers where a 3 bit code for
- the level and a bit for enable/disable control are stored. Each interrupt channel may be programmed to interrupt
- the processor at any level.
-
- The vector table of the gate array is a group of 64 vectors. The two most significant bits of the 8 bit vector
- are programmable via register bits. The rest of the bits are assigned by gate array hardware. Not all of the
- 64 vectors are used in the present gate array, and those not used are reserved for future extensions.
-
- The following groups of interrupt sources are supported:
- 1. Internal Interrupt Sources
- - DMA CONTROLLER
- - TIMER
- - FORCE MESSAGE BROADCAST -FMB-
- - PARITY ERROR
- - 8 MAILBOXES
- 2. External Interrupt Sources
- Onboard interrupts:
- - LOCAL 0-7 inputs
- - ABORT Key input
- - ACFAIL input
- - SYSFAIL input
- VMEbus interrupts:
- - 7 VMEbus interrupt inputs
+ The FGA-002 Gate Array provides high end support for interrupt functionality. It manages interrupt sources
+ within the gate array as well as external sources connected to the gate array. The FGA-002 Gate Array is an
+ efficient interface for various interrupt sources to the local CPU, and supports up to 18 external interrupters.
+
+ Interrupt inputs provided for external interrupt sources (exclusive of the VMEbus interrupt inputs) offer
+ maximum flexibility as they may be configured to be level/edge sensitive or low/high active. The control of
+ these features is performed by two bits contained in the extended interrupt control registers. The Interrupt
+ Auto Clear bit in the extended interrupt control register determines, whether the interrupt of an edge sensitive
+ input is cleared automatically during the interrupt acknowledge cycle or has to be cleared by the interrupt
+ service routine. Each interrupt source is bound to an individual interrupt channel which has its own assigned
+ vector number. The interrupt channels are configured by the Interrupt Control Registers where a 3 bit code for
+ the level and a bit for enable/disable control are stored. Each interrupt channel may be programmed to interrupt
+ the processor at any level.
+
+ The vector table of the gate array is a group of 64 vectors. The two most significant bits of the 8 bit vector
+ are programmable via register bits. The rest of the bits are assigned by gate array hardware. Not all of the
+ 64 vectors are used in the present gate array, and those not used are reserved for future extensions.
+
+ The following groups of interrupt sources are supported:
+ 1. Internal Interrupt Sources
+ - DMA CONTROLLER
+ - TIMER
+ - FORCE MESSAGE BROADCAST -FMB-
+ - PARITY ERROR
+ - 8 MAILBOXES
+ 2. External Interrupt Sources
+ Onboard interrupts:
+ - LOCAL 0-7 inputs
+ - ABORT Key input
+ - ACFAIL input
+ - SYSFAIL input
+ VMEbus interrupts:
+ - 7 VMEbus interrupt inputs
*/
// TODO: Add more intrrupts sources in priority order, 18 in total.
-const fga_irq_t fga002_device::m_irq_sources[] = {
+const fga_irq_t fga002_device::m_irq_sources[] = {
{INT_LOCAL0, FGA_ISLOCAL0, FGA_ICRLOCAL0 },
{INT_LOCAL1, FGA_ISLOCAL1, FGA_ICRLOCAL1 },
{INT_LOCAL2, FGA_ISLOCAL2, FGA_ICRLOCAL2 },
@@ -220,7 +220,7 @@ const fga_irq_t fga002_device::m_irq_sources[] = {
{INT_LOCAL4, FGA_ISLOCAL4, FGA_ICRLOCAL4 },
{INT_LOCAL5, FGA_ISLOCAL5, FGA_ICRLOCAL5 },
{INT_LOCAL6, FGA_ISLOCAL6, FGA_ICRLOCAL6 },
- {INT_LOCAL7, FGA_ISLOCAL7, FGA_ICRLOCAL7 }
+ {INT_LOCAL7, FGA_ISLOCAL7, FGA_ICRLOCAL7 }
};
@@ -270,9 +270,9 @@ IRQ_CALLBACK_MEMBER(fga002_device::iack)
LOGLVL(("Vec Status[val] Control[val]\n"));
for (auto & elem : m_irq_sources)
{
- LOGLVL((" %02x %02x[%02x] %02x[%02x]\n",
+ LOGLVL((" %02x %02x[%02x] %02x[%02x]\n",
elem.vector,
- elem.status, m_fga002[elem.status],
+ elem.status, m_fga002[elem.status],
elem.control, m_fga002[elem.control]));
// Right level?
LOGLVL(("Level %02x == ICR %02x is %s\n", level, m_fga002[elem.control] & REG_ICR_LVL_MSK, ((m_fga002[elem.control] & REG_ICR_LVL_MSK) == level) ? "true!" : "false.."));
@@ -288,8 +288,8 @@ IRQ_CALLBACK_MEMBER(fga002_device::iack)
LOGVEC((" - org vec:%02x ", vec));
switch (vec)
{
- // Assuming that the attached device is returning -1 (INT_ACK_AUTOVECTOR) if no vector is provided, then we keep internal vector
- // TODO: Add device specific parameter that maps devices no-vector response to INT_ACK_AUTOVECTOR (and preferably INT_ACK_NOVECTOR)
+ // Assuming that the attached device is returning -1 (INT_ACK_AUTOVECTOR) if no vector is provided, then we keep internal vector
+ // TODO: Add device specific parameter that maps devices no-vector response to INT_ACK_AUTOVECTOR (and preferably INT_ACK_NOVECTOR)
case INT_LOCAL4: if (( (m_fga002[FGA_LOCALIACK] & REG_LIACK_LOCAL4_MSK) >> 0) != REG_LIACK_INT_IACK ) vec = m_liack4_cb(); break;
case INT_LOCAL5: if (( (m_fga002[FGA_LOCALIACK] & REG_LIACK_LOCAL5_MSK) >> 2) != REG_LIACK_INT_IACK ) vec = m_liack5_cb(); break;
case INT_LOCAL6: if (( (m_fga002[FGA_LOCALIACK] & REG_LIACK_LOCAL6_MSK) >> 4) != REG_LIACK_INT_IACK ) vec = m_liack6_cb(); break;
@@ -301,13 +301,13 @@ IRQ_CALLBACK_MEMBER(fga002_device::iack)
if (vec == INT_ACK_AUTOVECTOR) vec = INT_EMPTY;
LOGVEC(("avec:%02x ", vec));
- // Add vector page bits and return vector
- vec = (vec & 0x3f) | ((m_fga002[FGA_CTL3] & REG_CTL3_VECTORBITS7_6) << 4);
+ // Add vector page bits and return vector
+ vec = (vec & 0x3f) | ((m_fga002[FGA_CTL3] & REG_CTL3_VECTORBITS7_6) << 4);
LOGVEC(("pvec:%02x\n", vec));
LOGVEC((" - Interrupt Acknowledge Vector %02x\n", vec));
- /* TODO:
- - Support auto clear of interrupt source and level triggered
+ /* TODO:
+ - Support auto clear of interrupt source and level triggered
*/
vec_found = 1;
}
@@ -323,13 +323,13 @@ IRQ_CALLBACK_MEMBER(fga002_device::iack)
}
LOGIACK((" - Interrupt Acknowledge Vector %02x, next interrupt is off %02x\n", vec, m_irq_level));
m_out_int_cb(CLEAR_LINE);
- return vec;
+ return vec;
}
int fga002_device::get_irq_level()
{
LOGINT(("%s %s() - %02x\n", tag(), FUNCNAME, m_irq_level));
- return m_irq_level;
+ return m_irq_level;
}
/* The FGA002 Timer
@@ -541,14 +541,14 @@ void fga002_device::do_fga002reg_ctl3_w(UINT8 data)
}
// Local Interrupt control register methods
-UINT8 fga002_device::do_fga002reg_icrlocal0_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL0]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_icrlocal1_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL1]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_icrlocal2_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL2]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_icrlocal3_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL3]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_icrlocal4_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL4]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_icrlocal5_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL5]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_icrlocal6_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL6]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_icrlocal7_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL7]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal0_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL0]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal1_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL1]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal2_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL2]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal3_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL3]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal4_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL4]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal5_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL5]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal6_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL6]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_icrlocal7_r(){ UINT8 ret = m_fga002[FGA_ICRLOCAL7]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
void fga002_device::do_fga002reg_icrlocal0_w(UINT8 data){ m_fga002[FGA_ICRLOCAL0] = data; LOGINT(("%s(%02x)\n", FUNCNAME, data)); }
void fga002_device::do_fga002reg_icrlocal1_w(UINT8 data){ m_fga002[FGA_ICRLOCAL1] = data; LOGINT(("%s(%02x)\n", FUNCNAME, data)); }
@@ -560,14 +560,14 @@ void fga002_device::do_fga002reg_icrlocal6_w(UINT8 data){ m_fga002[FGA_ICRLOCAL
void fga002_device::do_fga002reg_icrlocal7_w(UINT8 data){ m_fga002[FGA_ICRLOCAL7] = data; LOGINT(("%s(%02x)\n", FUNCNAME, data)); }
// Local Interrupt Status Register methods
-UINT8 fga002_device::do_fga002reg_islocal0_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL0]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_islocal1_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL1]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_islocal2_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL2]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_islocal3_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL3]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_islocal4_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL4]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_islocal5_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL5]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_islocal6_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL6]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
-UINT8 fga002_device::do_fga002reg_islocal7_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL7]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal0_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL0]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal1_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL1]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal2_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL2]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal3_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL3]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal4_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL4]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal5_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL5]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal6_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL6]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
+UINT8 fga002_device::do_fga002reg_islocal7_r(){ UINT8 ret = m_fga002[FGA_ISLOCAL7]; LOGINT(("%s() <- %02x\n", FUNCNAME, ret)); return ret; }
void fga002_device::islocal_w(int status, int vector, int control, int data)
{
@@ -660,14 +660,14 @@ WRITE8_MEMBER (fga002_device::write){
case FGA_ICRABORT : LOG(("FGA_ICRABORT - not implemented\n")); m_fga002[FGA_ICRABORT] = data; break;
case FGA_ICRACFAIL : LOG(("FGA_ICRACFAIL - not implemented\n")); m_fga002[FGA_ICRACFAIL] = data; break;
case FGA_ICRSYSFAIL : LOG(("FGA_ICRSYSFAIL - not implemented\n")); m_fga002[FGA_ICRSYSFAIL] = data; break;
- case FGA_ICRLOCAL0 : do_fga002reg_icrlocal0_w(data); break;
- case FGA_ICRLOCAL1 : do_fga002reg_icrlocal1_w(data); break;
- case FGA_ICRLOCAL2 : do_fga002reg_icrlocal2_w(data); break;
- case FGA_ICRLOCAL3 : do_fga002reg_icrlocal3_w(data); break;
- case FGA_ICRLOCAL4 : do_fga002reg_icrlocal4_w(data); break;
- case FGA_ICRLOCAL5 : do_fga002reg_icrlocal5_w(data); break;
- case FGA_ICRLOCAL6 : do_fga002reg_icrlocal6_w(data); break;
- case FGA_ICRLOCAL7 : do_fga002reg_icrlocal7_w(data); break;
+ case FGA_ICRLOCAL0 : do_fga002reg_icrlocal0_w(data); break;
+ case FGA_ICRLOCAL1 : do_fga002reg_icrlocal1_w(data); break;
+ case FGA_ICRLOCAL2 : do_fga002reg_icrlocal2_w(data); break;
+ case FGA_ICRLOCAL3 : do_fga002reg_icrlocal3_w(data); break;
+ case FGA_ICRLOCAL4 : do_fga002reg_icrlocal4_w(data); break;
+ case FGA_ICRLOCAL5 : do_fga002reg_icrlocal5_w(data); break;
+ case FGA_ICRLOCAL6 : do_fga002reg_icrlocal6_w(data); break;
+ case FGA_ICRLOCAL7 : do_fga002reg_icrlocal7_w(data); break;
case FGA_ENAMCODE : LOG(("FGA_ENAMCODE - not implemented\n")); m_fga002[FGA_ENAMCODE] = data; break;
case FGA_CTL10 : LOG(("FGA_CTL10 - not implemented\n")); m_fga002[FGA_CTL10] = data; break;
case FGA_CTL11 : LOG(("FGA_CTL11 - not implemented\n")); m_fga002[FGA_CTL11] = data; break;
@@ -696,15 +696,15 @@ WRITE8_MEMBER (fga002_device::write){
case FGA_CTL14 : LOG(("FGA_CTL14 - not implemented\n")); m_fga002[FGA_CTL14] = data; break;
case FGA_CTL15 : LOG(("FGA_CTL15 - not implemented\n")); m_fga002[FGA_CTL15] = data; break;
case FGA_CTL16 : LOG(("FGA_CTL16 - not implemented\n")); m_fga002[FGA_CTL16] = data; break;
- case FGA_ISTIM0 : do_fga002reg_istim0_w(data); break;
- case FGA_ISLOCAL0 : do_fga002reg_islocal0_w(data); break;
- case FGA_ISLOCAL1 : do_fga002reg_islocal1_w(data); break;
- case FGA_ISLOCAL2 : do_fga002reg_islocal2_w(data); break;
- case FGA_ISLOCAL3 : do_fga002reg_islocal3_w(data); break;
- case FGA_ISLOCAL4 : do_fga002reg_islocal4_w(data); break;
- case FGA_ISLOCAL5 : do_fga002reg_islocal5_w(data); break;
- case FGA_ISLOCAL6 : do_fga002reg_islocal6_w(data); break;
- case FGA_ISLOCAL7 : do_fga002reg_islocal7_w(data); break;
+ case FGA_ISTIM0 : do_fga002reg_istim0_w(data); break;
+ case FGA_ISLOCAL0 : do_fga002reg_islocal0_w(data); break;
+ case FGA_ISLOCAL1 : do_fga002reg_islocal1_w(data); break;
+ case FGA_ISLOCAL2 : do_fga002reg_islocal2_w(data); break;
+ case FGA_ISLOCAL3 : do_fga002reg_islocal3_w(data); break;
+ case FGA_ISLOCAL4 : do_fga002reg_islocal4_w(data); break;
+ case FGA_ISLOCAL5 : do_fga002reg_islocal5_w(data); break;
+ case FGA_ISLOCAL6 : do_fga002reg_islocal6_w(data); break;
+ case FGA_ISLOCAL7 : do_fga002reg_islocal7_w(data); break;
case FGA_ISDMANORM : LOG(("FGA_ISDMANORM - not implemented\n")); m_fga002[FGA_ISDMANORM] = data; break;
case FGA_ISDMAERR : LOG(("FGA_ISDMAERR - not implemented\n")); m_fga002[FGA_ISDMAERR] = data; break;
case FGA_ISFMB0REF : LOG(("FGA_ISFMB0REF - not implemented\n")); m_fga002[FGA_ISFMB0REF] = data; break;
@@ -771,14 +771,14 @@ READ8_MEMBER (fga002_device::read){
case FGA_ICRABORT : ret = m_fga002[FGA_ICRABORT]; LOG(("FGA_ICRABORT returns %02x - not implemented\n", ret)); break;
case FGA_ICRACFAIL : ret = m_fga002[FGA_ICRACFAIL]; LOG(("FGA_ICRACFAIL returns %02x - not implemented\n", ret)); break;
case FGA_ICRSYSFAIL : ret = m_fga002[FGA_ICRSYSFAIL]; LOG(("FGA_ICRSYSFAIL returns %02x - not implemented\n", ret)); break;
- case FGA_ICRLOCAL0 : ret = do_fga002reg_icrlocal0_r(); break;
- case FGA_ICRLOCAL1 : ret = do_fga002reg_icrlocal1_r(); break;
- case FGA_ICRLOCAL2 : ret = do_fga002reg_icrlocal2_r(); break;
- case FGA_ICRLOCAL3 : ret = do_fga002reg_icrlocal3_r(); break;
- case FGA_ICRLOCAL4 : ret = do_fga002reg_icrlocal4_r(); break;
- case FGA_ICRLOCAL5 : ret = do_fga002reg_icrlocal5_r(); break;
- case FGA_ICRLOCAL6 : ret = do_fga002reg_icrlocal6_r(); break;
- case FGA_ICRLOCAL7 : ret = do_fga002reg_icrlocal7_r(); break;
+ case FGA_ICRLOCAL0 : ret = do_fga002reg_icrlocal0_r(); break;
+ case FGA_ICRLOCAL1 : ret = do_fga002reg_icrlocal1_r(); break;
+ case FGA_ICRLOCAL2 : ret = do_fga002reg_icrlocal2_r(); break;
+ case FGA_ICRLOCAL3 : ret = do_fga002reg_icrlocal3_r(); break;
+ case FGA_ICRLOCAL4 : ret = do_fga002reg_icrlocal4_r(); break;
+ case FGA_ICRLOCAL5 : ret = do_fga002reg_icrlocal5_r(); break;
+ case FGA_ICRLOCAL6 : ret = do_fga002reg_icrlocal6_r(); break;
+ case FGA_ICRLOCAL7 : ret = do_fga002reg_icrlocal7_r(); break;
case FGA_ENAMCODE : ret = m_fga002[FGA_ENAMCODE]; LOG(("FGA_ENAMCODE returns %02x - not implemented\n", ret)); break;
case FGA_CTL10 : ret = m_fga002[FGA_CTL10]; LOG(("FGA_CTL10 returns %02x - not implemented\n", ret)); break;
case FGA_CTL11 : ret = m_fga002[FGA_CTL11]; LOG(("FGA_CTL11 returns %02x - not implemented\n", ret)); break;
@@ -807,15 +807,15 @@ READ8_MEMBER (fga002_device::read){
case FGA_CTL14 : ret = m_fga002[FGA_CTL14]; LOG(("FGA_CTL14 returns %02x - not implemented\n", ret)); break;
case FGA_CTL15 : ret = m_fga002[FGA_CTL15]; LOG(("FGA_CTL15 returns %02x - not implemented\n", ret)); break;
case FGA_CTL16 : ret = m_fga002[FGA_CTL16]; LOG(("FGA_CTL16 returns %02x - not implemented\n", ret)); break;
- case FGA_ISTIM0 : ret = do_fga002reg_istim0_r(); break;
- case FGA_ISLOCAL0 : ret = do_fga002reg_islocal0_r(); break;
- case FGA_ISLOCAL1 : ret = do_fga002reg_islocal1_r(); break;
- case FGA_ISLOCAL2 : ret = do_fga002reg_islocal2_r(); break;
- case FGA_ISLOCAL3 : ret = do_fga002reg_islocal3_r(); break;
- case FGA_ISLOCAL4 : ret = do_fga002reg_islocal4_r(); break;
- case FGA_ISLOCAL5 : ret = do_fga002reg_islocal5_r(); break;
- case FGA_ISLOCAL6 : ret = do_fga002reg_islocal6_r(); break;
- case FGA_ISLOCAL7 : ret = do_fga002reg_islocal7_r(); break;
+ case FGA_ISTIM0 : ret = do_fga002reg_istim0_r(); break;
+ case FGA_ISLOCAL0 : ret = do_fga002reg_islocal0_r(); break;
+ case FGA_ISLOCAL1 : ret = do_fga002reg_islocal1_r(); break;
+ case FGA_ISLOCAL2 : ret = do_fga002reg_islocal2_r(); break;
+ case FGA_ISLOCAL3 : ret = do_fga002reg_islocal3_r(); break;
+ case FGA_ISLOCAL4 : ret = do_fga002reg_islocal4_r(); break;
+ case FGA_ISLOCAL5 : ret = do_fga002reg_islocal5_r(); break;
+ case FGA_ISLOCAL6 : ret = do_fga002reg_islocal6_r(); break;
+ case FGA_ISLOCAL7 : ret = do_fga002reg_islocal7_r(); break;
case FGA_ISDMANORM : ret = m_fga002[FGA_ISDMANORM]; LOG(("FGA_ISDMANORM returns %02x - not implemented\n", ret)); break;
case FGA_ISDMAERR : ret = m_fga002[FGA_ISDMAERR]; LOG(("FGA_ISDMAERR returns %02x - not implemented\n", ret)); break;
case FGA_ISFMB0REF : ret = m_fga002[FGA_ISFMB0REF]; LOG(("FGA_ISFMB0REF returns %02x - not implemented\n", ret)); break;
diff --git a/src/devices/machine/fga002.h b/src/devices/machine/fga002.h
index 0d3304dfb17..88d5a8d11b5 100644
--- a/src/devices/machine/fga002.h
+++ b/src/devices/machine/fga002.h
@@ -10,22 +10,22 @@
#define LOG(x)
#endif
-#define MCFG_FGA002_ADD(_tag, _clock) MCFG_DEVICE_ADD(_tag, FGA002, _clock)
+#define MCFG_FGA002_ADD(_tag, _clock) MCFG_DEVICE_ADD(_tag, FGA002, _clock)
// LOCAL IRQ callbacks
-#define MCFG_FGA002_OUT_INT_CB(_devcb) \
+#define MCFG_FGA002_OUT_INT_CB(_devcb) \
devcb = &fga002_device::set_out_int_callback(*device, DEVCB_##_devcb);
-#define MCFG_FGA002_OUT_LIACK4_CB(_devcb) \
+#define MCFG_FGA002_OUT_LIACK4_CB(_devcb) \
devcb = &fga002_device::set_liack4_callback(*device, DEVCB_##_devcb);
-#define MCFG_FGA002_OUT_LIACK5_CB(_devcb) \
+#define MCFG_FGA002_OUT_LIACK5_CB(_devcb) \
devcb = &fga002_device::set_liack5_callback(*device, DEVCB_##_devcb);
-#define MCFG_FGA002_OUT_LIACK6_CB(_devcb) \
+#define MCFG_FGA002_OUT_LIACK6_CB(_devcb) \
devcb = &fga002_device::set_liack6_callback(*device, DEVCB_##_devcb);
-#define MCFG_FGA002_OUT_LIACK7_CB(_devcb) \
+#define MCFG_FGA002_OUT_LIACK7_CB(_devcb) \
devcb = &fga002_device::set_liack7_callback(*device, DEVCB_##_devcb);
// type for array of mapping of FGA registers that assembles an IRQ source
@@ -42,7 +42,7 @@ typedef struct {
// ======================> fga002_device
class fga002_device : public device_t
-// ,public device_z80daisy_interface
+// ,public device_z80daisy_interface
{
public:
// construction/destruction
@@ -72,7 +72,7 @@ class fga002_device : public device_t
template<class _Object> static devcb_base &set_liack6_callback(device_t &device, _Object object) { return downcast<fga002_device &>(device).m_liack6_cb.set_callback(object); }
template<class _Object> static devcb_base &set_liack7_callback(device_t &device, _Object object) { return downcast<fga002_device &>(device).m_liack7_cb.set_callback(object); }
- // interrupt sources in prio order if on same interrupt level. TODO: Add all sources
+ // interrupt sources in prio order if on same interrupt level. TODO: Add all sources
const static fga_irq_t m_irq_sources[];
protected:
@@ -88,10 +88,10 @@ class fga002_device : public device_t
virtual void device_timer (emu_timer &timer, device_timer_id id, int param, void *ptr) override;
devcb_write_line m_out_int_cb;
- devcb_read8 m_liack4_cb;
- devcb_read8 m_liack5_cb;
- devcb_read8 m_liack6_cb;
- devcb_read8 m_liack7_cb;
+ devcb_read8 m_liack4_cb;
+ devcb_read8 m_liack5_cb;
+ devcb_read8 m_liack6_cb;
+ devcb_read8 m_liack7_cb;
int m_int_state[0x08]; // interrupt state
private:
@@ -198,14 +198,14 @@ class fga002_device : public device_t
};
enum{
- REG_LIACK_LOCAL4_MSK = 0x03,
- REG_LIACK_LOCAL5_MSK = 0x0c, // >> 2 to use patterns below
- REG_LIACK_LOCAL6_MSK = 0x30, // >> 4 to use patterns below
- REG_LIACK_LOCAL7_MSK = 0xc0, // >> 6 to use patterns below
- REG_LIACK_INT_IACK = 0x00, // Assumes bits to be right adjusted
- REG_LIACK_EXT_IACK1 = 0x01,
- REG_LIACK_EXT_IACK2 = 0x02,
- REG_LIACK_EXT_IACK3 = 0x03,
+ REG_LIACK_LOCAL4_MSK = 0x03,
+ REG_LIACK_LOCAL5_MSK = 0x0c, // >> 2 to use patterns below
+ REG_LIACK_LOCAL6_MSK = 0x30, // >> 4 to use patterns below
+ REG_LIACK_LOCAL7_MSK = 0xc0, // >> 6 to use patterns below
+ REG_LIACK_INT_IACK = 0x00, // Assumes bits to be right adjusted
+ REG_LIACK_EXT_IACK1 = 0x01,
+ REG_LIACK_EXT_IACK2 = 0x02,
+ REG_LIACK_EXT_IACK3 = 0x03,
};
enum{
@@ -222,11 +222,11 @@ class fga002_device : public device_t
};
enum{
- REG_ICR_LVL_MSK = 0x07,
- REG_ICR_ENABLE = 0x08,
- REG_ICR_AUTOCLR = 0x10,
- REG_ICR_ACTIVITY = 0x20,
- REG_ICR_EDGE = 0x40,
+ REG_ICR_LVL_MSK = 0x07,
+ REG_ICR_ENABLE = 0x08,
+ REG_ICR_AUTOCLR = 0x10,
+ REG_ICR_ACTIVITY = 0x20,
+ REG_ICR_EDGE = 0x40,
};
/* Register offsets */
@@ -300,39 +300,39 @@ class fga002_device : public device_t
FGA_FMBAREA = 0x033c,
FGA_AUXSRCSTART = 0x0340,
FGA_AUXDSTSTART = 0x0344,
- FGA_AUXSRCTERM = 0x0348,
- FGA_AUXDSTTERM = 0x034c,
- FGA_CTL13 = 0x0350,
- FGA_CTL14 = 0x0354,
- FGA_CTL15 = 0x0358,
- FGA_CTL16 = 0x035c,
- FGA_SPECIALENA = 0x0424,
- FGA_ISLOCAL0 = 0x0480,
- FGA_ISLOCAL1 = 0x0484,
- FGA_ISLOCAL2 = 0x0488,
- FGA_ISLOCAL3 = 0x048C,
- FGA_ISLOCAL4 = 0x0490,
- FGA_ISLOCAL5 = 0x0494,
- FGA_ISLOCAL6 = 0x0498,
- FGA_ISLOCAL7 = 0x049C,
- FGA_ISTIM0 = 0x04a0,
- FGA_ISDMANORM = 0x04b0,
- FGA_ISDMAERR = 0x04b4,
- FGA_ISFMB0REF = 0x04b8,
- FGA_ISFMB1REF = 0x04bc,
- FGA_ISPARITY = 0x04c0,
- FGA_DMARUNCTL = 0x04c4,
- FGA_ISABORT = 0x04c8,
- FGA_ISACFAIL = 0x04cc,
- FGA_ISFMB0MES = 0x04e0,
- FGA_ISFMB1MES = 0x04e4,
- FGA_ISSYSFAIL = 0x04d0,
- FGA_ABORTPIN = 0x04d4,
- FGA_RSVMECALL = 0x04f0,
- FGA_RSKEYRES = 0x04f4,
- FGA_RSCPUCALL = 0x04f8,
- FGA_RSLOCSW = 0x04fc,
- FGA_TIM0COUNT = 0x0c00,
+ FGA_AUXSRCTERM = 0x0348,
+ FGA_AUXDSTTERM = 0x034c,
+ FGA_CTL13 = 0x0350,
+ FGA_CTL14 = 0x0354,
+ FGA_CTL15 = 0x0358,
+ FGA_CTL16 = 0x035c,
+ FGA_SPECIALENA = 0x0424,
+ FGA_ISLOCAL0 = 0x0480,
+ FGA_ISLOCAL1 = 0x0484,
+ FGA_ISLOCAL2 = 0x0488,
+ FGA_ISLOCAL3 = 0x048C,
+ FGA_ISLOCAL4 = 0x0490,
+ FGA_ISLOCAL5 = 0x0494,
+ FGA_ISLOCAL6 = 0x0498,
+ FGA_ISLOCAL7 = 0x049C,
+ FGA_ISTIM0 = 0x04a0,
+ FGA_ISDMANORM = 0x04b0,
+ FGA_ISDMAERR = 0x04b4,
+ FGA_ISFMB0REF = 0x04b8,
+ FGA_ISFMB1REF = 0x04bc,
+ FGA_ISPARITY = 0x04c0,
+ FGA_DMARUNCTL = 0x04c4,
+ FGA_ISABORT = 0x04c8,
+ FGA_ISACFAIL = 0x04cc,
+ FGA_ISFMB0MES = 0x04e0,
+ FGA_ISFMB1MES = 0x04e4,
+ FGA_ISSYSFAIL = 0x04d0,
+ FGA_ABORTPIN = 0x04d4,
+ FGA_RSVMECALL = 0x04f0,
+ FGA_RSKEYRES = 0x04f4,
+ FGA_RSCPUCALL = 0x04f8,
+ FGA_RSLOCSW = 0x04fc,
+ FGA_TIM0COUNT = 0x0c00,
};
};
diff --git a/src/devices/machine/i82371sb.cpp b/src/devices/machine/i82371sb.cpp
index 8ec671ee082..e1081dac406 100644
--- a/src/devices/machine/i82371sb.cpp
+++ b/src/devices/machine/i82371sb.cpp
@@ -25,8 +25,8 @@ DEVICE_ADDRESS_MAP_START(config_map, 32, i82371sb_isa_device)
ADDRESS_MAP_END
DEVICE_ADDRESS_MAP_START(internal_io_map, 32, i82371sb_isa_device)
-// AM_RANGE(0x0060, 0x0063) AM_READ8 (reset_irq12_1_r, 0x000000ff)
-// AM_RANGE(0x0060, 0x0063) AM_READWRITE8 (nmi_st_r, nmi_st_w, 0x0000ff00)
+// AM_RANGE(0x0060, 0x0063) AM_READ8 (reset_irq12_1_r, 0x000000ff)
+// AM_RANGE(0x0060, 0x0063) AM_READWRITE8 (nmi_st_r, nmi_st_w, 0x0000ff00)
AM_RANGE(0x0080, 0x0083) AM_WRITE8 (boot_state_w, 0x000000ff) // POST/non-existing, used for delays by the bios/os
AM_RANGE(0x00ec, 0x00ef) AM_WRITE8 (nop_w, 0x0000ff00) // Non-existing, used for delays by the bios/os
ADDRESS_MAP_END
diff --git a/src/devices/machine/scnxx562.cpp b/src/devices/machine/scnxx562.cpp
index 6af4332f581..e47d895bcd4 100644
--- a/src/devices/machine/scnxx562.cpp
+++ b/src/devices/machine/scnxx562.cpp
@@ -458,7 +458,7 @@ UINT8 duscc_device::modify_vector(UINT8 vec, int index, UINT8 src)
{
// Modify vector according to "Vector Include Status" bit (REG_ICR_V2V4_MOD)
if ((m_icr & REG_ICR_V2V4_MOD) != 0)
- { // Affect V2-V4
+ { // Affect V2-V4
LOGINT((" - Affect V2-V4 with status"));
vec &= 0x07 << 3;
vec |= src << 3;
@@ -501,7 +501,7 @@ void duscc_device::trigger_interrupt(int index, int state)
LOGINT(("%s %s:%c %02x \n",FUNCNAME, tag(), 'A' + index, state));
/* The Interrup Controll Register (ICR) bits, must be set for the correspondning channel */
- // ICR Check is probably by the caller but we check again to be sure
+ // ICR Check is probably by the caller but we check again to be sure
if ((m_icr & (index == CHANNEL_A ? REG_ICR_CHA : REG_ICR_CHB)) == 0)
{
LOGINT(("The Interrupt Control Register [%02x] bit for this channel is not set, blocking attempt to interrupt\n", m_icr));
@@ -2165,14 +2165,14 @@ void duscc_channel::do_dusccreg_gsr_w(UINT8 data)
void duscc_channel::do_dusccreg_ier_w(UINT8 data)
{
LOGINT(("%c %s(%02x)\n", 'A' + m_index, FUNCNAME, data));
- if (REG_IER_DCD_CTS & (data ^ m_ier)) LOGINT(("- DCD/CTS interrups %s\n", (data & REG_IER_DCD_CTS) ? "enabled" : "disabled" ));
- if (REG_IER_TXRDY & (data ^ m_ier)) LOGINT(("- TXRDY interrupts %s\n", (data & REG_IER_TXRDY) ? "enabled" : "disabled" ));
- if (REG_IER_TRSR73 & (data ^ m_ier)) LOGINT(("- TRSR73 interrupts %s\n", (data & REG_IER_TRSR73) ? "enabled" : "disabled" ));
- if (REG_IER_RXRDY & (data ^ m_ier)) LOGINT(("- RXRDY interrupts %s\n", (data & REG_IER_RXRDY) ? "enabled" : "disabled" ));
- if (REG_IER_RSR76 & (data ^ m_ier)) LOGINT(("- RSR76 interrupts %s\n", (data & REG_IER_RSR76) ? "enabled" : "disabled" ));
- if (REG_IER_RSR54 & (data ^ m_ier)) LOGINT(("- RSR54 interrupts %s\n", (data & REG_IER_RSR54) ? "enabled" : "disabled" ));
- if (REG_IER_RSR32 & (data ^ m_ier)) LOGINT(("- RSR32 interrupts %s\n", (data & REG_IER_RSR32) ? "enabled" : "disabled" ));
- if (REG_IER_RSR10 & (data ^ m_ier)) LOGINT(("- RSR10 interrupts %s\n", (data & REG_IER_RSR10) ? "enabled" : "disabled" ));
+ if (REG_IER_DCD_CTS & (data ^ m_ier)) LOGINT(("- DCD/CTS interrups %s\n", (data & REG_IER_DCD_CTS) ? "enabled" : "disabled" ));
+ if (REG_IER_TXRDY & (data ^ m_ier)) LOGINT(("- TXRDY interrupts %s\n", (data & REG_IER_TXRDY) ? "enabled" : "disabled" ));
+ if (REG_IER_TRSR73 & (data ^ m_ier)) LOGINT(("- TRSR73 interrupts %s\n", (data & REG_IER_TRSR73) ? "enabled" : "disabled" ));
+ if (REG_IER_RXRDY & (data ^ m_ier)) LOGINT(("- RXRDY interrupts %s\n", (data & REG_IER_RXRDY) ? "enabled" : "disabled" ));
+ if (REG_IER_RSR76 & (data ^ m_ier)) LOGINT(("- RSR76 interrupts %s\n", (data & REG_IER_RSR76) ? "enabled" : "disabled" ));
+ if (REG_IER_RSR54 & (data ^ m_ier)) LOGINT(("- RSR54 interrupts %s\n", (data & REG_IER_RSR54) ? "enabled" : "disabled" ));
+ if (REG_IER_RSR32 & (data ^ m_ier)) LOGINT(("- RSR32 interrupts %s\n", (data & REG_IER_RSR32) ? "enabled" : "disabled" ));
+ if (REG_IER_RSR10 & (data ^ m_ier)) LOGINT(("- RSR10 interrupts %s\n", (data & REG_IER_RSR10) ? "enabled" : "disabled" ));
m_ier = data;
m_uart->check_interrupts();
return;
@@ -2189,8 +2189,8 @@ void duscc_channel::do_dusccreg_icr_w(UINT8 data)
{
m_uart->m_icr = data;
LOG(("%s(%02x)\n", FUNCNAME, data));
- if (duscc_device::REG_ICR_CHB & (data ^ m_uart->m_icr)) LOG(("- Channel B interrupts %s\n", (data & duscc_device::REG_ICR_CHB) ? "enabled" : "disabled" ));
- if (duscc_device::REG_ICR_CHA & (data ^ m_uart->m_icr)) LOG(("- Channel A interrupts %s\n", (data & duscc_device::REG_ICR_CHA) ? "enabled" : "disabled" ));
+ if (duscc_device::REG_ICR_CHB & (data ^ m_uart->m_icr)) LOG(("- Channel B interrupts %s\n", (data & duscc_device::REG_ICR_CHB) ? "enabled" : "disabled" ));
+ if (duscc_device::REG_ICR_CHA & (data ^ m_uart->m_icr)) LOG(("- Channel A interrupts %s\n", (data & duscc_device::REG_ICR_CHA) ? "enabled" : "disabled" ));
if (duscc_device::REG_ICR_VEC_MOD & (data ^ m_uart->m_icr)) LOG(("- Vector is %s\n", (data & duscc_device::REG_ICR_VEC_MOD) ? "modified" : "unmodified" ));
if (duscc_device::REG_ICR_V2V4_MOD & (data ^ m_uart->m_icr)) LOG(("- Vector bits %s modified\n", (data & duscc_device::REG_ICR_V2V4_MOD) ? "4:2" : "2:0" ));
// TODO: LOG the other bits as well
@@ -2399,7 +2399,7 @@ void duscc_channel::receive_data(UINT8 data)
if (m_ier & REG_IER_RXRDY)
{
if (m_omr & REG_OMR_RXRDY_ACTIVATED) // interrupt on FIFO full and...
- {
+ {
if (m_rx_fifo_rp == m_rx_fifo_wp) // FIFO full?
m_uart->trigger_interrupt(m_index, INT_RXREADY);
}
diff --git a/src/devices/machine/scnxx562.h b/src/devices/machine/scnxx562.h
index ad036dfe5dc..4ae46c1a5f6 100644
--- a/src/devices/machine/scnxx562.h
+++ b/src/devices/machine/scnxx562.h
@@ -640,7 +640,7 @@ public:
DECLARE_WRITE8_MEMBER( write );
// interrupt acknowledge
- DECLARE_READ8_MEMBER( iack );
+ DECLARE_READ8_MEMBER( iack );
// device_z80daisy_interface overrides
virtual int z80daisy_irq_state() override;
@@ -734,17 +734,17 @@ protected:
enum
{
- REG_ICR_CHB = 0x01,
- REG_ICR_CHA = 0x02,
- REG_ICR_VEC_MOD = 0x04,
- REG_ICR_V2V4_MOD = 0x08,
- REG_ICR_VEC_MODE_MASK = 0x30,
- REG_ICR_VEC_MODE_NONE = 0x30,
- REG_ICR_PRIO_MASK = 0xC0,
- REG_ICR_PRIO_AHI = 0x00,
- REG_ICR_PRIO_BHI = 0x40,
- REG_ICR_PRIO_AINT = 0x80,
- REG_ICR_PRIO_BINT = 0xC0,
+ REG_ICR_CHB = 0x01,
+ REG_ICR_CHA = 0x02,
+ REG_ICR_VEC_MOD = 0x04,
+ REG_ICR_V2V4_MOD = 0x08,
+ REG_ICR_VEC_MODE_MASK = 0x30,
+ REG_ICR_VEC_MODE_NONE = 0x30,
+ REG_ICR_PRIO_MASK = 0xC0,
+ REG_ICR_PRIO_AHI = 0x00,
+ REG_ICR_PRIO_BHI = 0x40,
+ REG_ICR_PRIO_AINT = 0x80,
+ REG_ICR_PRIO_BINT = 0xC0,
};
};