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author | Michael Zapf <Michael.Zapf@mizapf.de> | 2019-02-12 01:41:33 +0100 |
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committer | Michael Zapf <Michael.Zapf@mizapf.de> | 2019-02-12 01:41:33 +0100 |
commit | 5755f55af4e85c8c5bb974689dcd150516711a1c (patch) | |
tree | 8af167d9d290aa1bd7d923e118cf8dffe7c2db4f /src/devices/machine/tms9901.h | |
parent | fe502c0d4136f8d935dc3c6d06f0513edd46dd95 (diff) |
ti99: Fixed cassette instabilities, caused by improper timer usage; introduced synchronous clock input for 9901
Diffstat (limited to 'src/devices/machine/tms9901.h')
-rw-r--r-- | src/devices/machine/tms9901.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/devices/machine/tms9901.h b/src/devices/machine/tms9901.h index 86a2c6852e3..31a1f79a3d1 100644 --- a/src/devices/machine/tms9901.h +++ b/src/devices/machine/tms9901.h @@ -60,6 +60,9 @@ public: DECLARE_WRITE_LINE_MEMBER( rst1_line ); + // Synchronous clock input + DECLARE_WRITE_LINE_MEMBER( phi_line ); + DECLARE_READ8_MEMBER( read ); DECLARE_WRITE8_MEMBER( write ); @@ -83,6 +86,9 @@ private: // Common method for device_reset and rst1_line void do_reset(); + // Common clock handling + void clock_in(line_state clk); + // State of the INT1-INT15 lines (must be inverted when queried) // Note that the levels must also be delivered when reading the pins, which // may require to latch the int levels. @@ -93,6 +99,9 @@ private: bool m_int_pending; // status of the int* pin (connected to TMS9900) bool m_timer_int_pending; // timer int pending (overrides int3 pin if timer enabled) + bool m_clock_active; + int m_clockdiv; // Clock divider counter (for synchronous clock) + // PIO registers int m_pio_direction; // direction register for PIO @@ -110,7 +119,7 @@ private: // true = clock mode (read/write clock interval) bool m_clock_mode; - // MESS timer, used to emulate the decrementer register + // Timer, used to emulate the decrementer register emu_timer *m_decrementer; // clock interval, loaded in decrementer when it reaches 0. |