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author Vas Crabb <vas@vastheman.com>2016-09-26 04:46:55 +1000
committer Vas Crabb <vas@vastheman.com>2016-09-26 04:51:59 +1000
commit33b2c733955112083b2912d4115eb0465026b4d0 (patch)
treefbbf0f355577aaf9a18dfa5ce269615ed5e70bec /src/devices/machine/scnxx562.h
parentfbbc293041838bf6007c439c57745f79b2c8d4fb (diff)
srcclean (nw)
Diffstat (limited to 'src/devices/machine/scnxx562.h')
-rw-r--r--src/devices/machine/scnxx562.h24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/devices/machine/scnxx562.h b/src/devices/machine/scnxx562.h
index ad036dfe5dc..4ae46c1a5f6 100644
--- a/src/devices/machine/scnxx562.h
+++ b/src/devices/machine/scnxx562.h
@@ -640,7 +640,7 @@ public:
DECLARE_WRITE8_MEMBER( write );
// interrupt acknowledge
- DECLARE_READ8_MEMBER( iack );
+ DECLARE_READ8_MEMBER( iack );
// device_z80daisy_interface overrides
virtual int z80daisy_irq_state() override;
@@ -734,17 +734,17 @@ protected:
enum
{
- REG_ICR_CHB = 0x01,
- REG_ICR_CHA = 0x02,
- REG_ICR_VEC_MOD = 0x04,
- REG_ICR_V2V4_MOD = 0x08,
- REG_ICR_VEC_MODE_MASK = 0x30,
- REG_ICR_VEC_MODE_NONE = 0x30,
- REG_ICR_PRIO_MASK = 0xC0,
- REG_ICR_PRIO_AHI = 0x00,
- REG_ICR_PRIO_BHI = 0x40,
- REG_ICR_PRIO_AINT = 0x80,
- REG_ICR_PRIO_BINT = 0xC0,
+ REG_ICR_CHB = 0x01,
+ REG_ICR_CHA = 0x02,
+ REG_ICR_VEC_MOD = 0x04,
+ REG_ICR_V2V4_MOD = 0x08,
+ REG_ICR_VEC_MODE_MASK = 0x30,
+ REG_ICR_VEC_MODE_NONE = 0x30,
+ REG_ICR_PRIO_MASK = 0xC0,
+ REG_ICR_PRIO_AHI = 0x00,
+ REG_ICR_PRIO_BHI = 0x40,
+ REG_ICR_PRIO_AINT = 0x80,
+ REG_ICR_PRIO_BINT = 0xC0,
};
};