diff options
author | 2017-01-06 22:11:19 -0500 | |
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committer | 2017-01-07 00:52:39 -0500 | |
commit | f5bcff30f6c5a890b6a2e481cb8435d692439577 (patch) | |
tree | 9392dcfe20bf7b80ac4605987dbd00970f32ab3a /src/devices/machine/ra17xx.cpp | |
parent | aabdd13259bfd886f208655390d53e735fd5654b (diff) |
PPS-4 refinements and modernization (nw)
- Split PPS-4 and PPS-4/2 device types; better explain and properly implement the difference
- Use callbacks for discrete input/output ports instead of fake memory addresses
- A17xx reads the address bus directly during I/O accesses
- Misc. chip documentation
Diffstat (limited to 'src/devices/machine/ra17xx.cpp')
-rw-r--r-- | src/devices/machine/ra17xx.cpp | 35 |
1 files changed, 26 insertions, 9 deletions
diff --git a/src/devices/machine/ra17xx.cpp b/src/devices/machine/ra17xx.cpp index f1e2d77fac0..ae948c4e903 100644 --- a/src/devices/machine/ra17xx.cpp +++ b/src/devices/machine/ra17xx.cpp @@ -11,6 +11,7 @@ There are two basic I/O instructions: SES = Select Enable Status and SOS = Select Output Status The lower 4 bits of the I/O address select one of 16 I/O lines. + Actually the lowest 6 bits are used, but bits 4 and 5 must be 0. There are at most two A17XX per system, one for the lower ROM and RAM portion and one for the higher. @@ -58,7 +59,8 @@ ra17xx_device::ra17xx_device(const machine_config &mconfig, const char *tag, dev : device_t(mconfig, RA17XX, "Rockwell A17XX", tag, owner, clock, "ra17xx", __FILE__), m_enable(false), m_iord(*this), - m_iowr(*this) + m_iowr(*this), + m_cpu(*this, finder_base::DUMMY_TAG) { } @@ -97,26 +99,41 @@ void ra17xx_device::device_reset() WRITE8_MEMBER( ra17xx_device::io_w ) { assert(offset < 16); - m_bl = (data >> 4) & 15; // BL on the data bus most significant bits - if (offset & 1) { + + m_bl = m_cpu->address_bus_r(space, 0) & 63; + + if (offset & 1) + { // SOS command - if (data & (1 << 3)) { + if (m_bl >= 16) + { + logerror("Attempt to write to nonexistent output %d\n"); + } + else if (data & (1 << 3)) + { m_line[m_bl] = 1; // enable output // if (m_enable) m_iowr(m_bl, 1, 1); - } else { + } + else + { m_line[m_bl] = 0; // disable output // if (m_enable) m_iowr(m_bl, 0, 1); } - } else { + } + else + { // SES command - if (data & (1 << 3)) { + if (data & (1 << 3)) + { // enable all outputs m_enable = true; for (int i = 0; i < 16; i++) m_iowr(i, m_line[i], 1); - } else { + } + else + { // disable all outputs m_enable = false; } @@ -127,5 +144,5 @@ WRITE8_MEMBER( ra17xx_device::io_w ) READ8_MEMBER( ra17xx_device::io_r ) { assert(offset < 16); - return (m_iord(m_bl) & 1) ? 0x0f : 0x07; + return (m_bl >= 16 || (m_iord(m_bl) & 1)) ? 0x0f : 0x07; } |