summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/machine/pci-ide.cpp
diff options
context:
space:
mode:
author Ted Green <tedgreen99@protonmail.com>2017-05-14 13:21:12 -0600
committer Ted Green <tedgreen99@protonmail.com>2017-05-14 13:22:12 -0600
commitc84d7f18062c2a8b73c4af5fa83dc89f945964f2 (patch)
tree987c5c89e1ec0072b57a48883e5f61de935664b0 /src/devices/machine/pci-ide.cpp
parente99238e88bfbfa35b9c26e32edc20a912c28962c (diff)
pci-ide: Allow for address size resolving even in legacy mode. (nw)
Diffstat (limited to 'src/devices/machine/pci-ide.cpp')
-rw-r--r--src/devices/machine/pci-ide.cpp47
1 files changed, 28 insertions, 19 deletions
diff --git a/src/devices/machine/pci-ide.cpp b/src/devices/machine/pci-ide.cpp
index 9af847777c5..bac97798949 100644
--- a/src/devices/machine/pci-ide.cpp
+++ b/src/devices/machine/pci-ide.cpp
@@ -17,7 +17,7 @@ ide_pci_device::ide_pci_device(const machine_config &mconfig, const char *tag, d
DEVICE_ADDRESS_MAP_START(config_map, 32, ide_pci_device)
AM_RANGE(0x08, 0x0b) AM_WRITE8(prog_if_w, 0x0000ff00)
- AM_RANGE(0x10, 0x1f) AM_WRITE(address_base_w)
+ AM_RANGE(0x10, 0x1f) AM_READWRITE(address_base_r, address_base_w)
AM_RANGE(0x40, 0x5f) AM_READWRITE(pcictrl_r, pcictrl_w)
AM_RANGE(0x70, 0x77) AM_DEVREADWRITE("ide", bus_master_ide_controller_device, bmdma_r, bmdma_w) // PCI646
AM_RANGE(0x78, 0x7f) AM_DEVREADWRITE("ide2", bus_master_ide_controller_device, bmdma_r, bmdma_w) // PCI646
@@ -214,26 +214,35 @@ WRITE32_MEMBER(ide_pci_device::pcictrl_w)
}
}
+READ32_MEMBER(ide_pci_device::address_base_r)
+{
+ if (bank_reg_infos[offset].bank == -1)
+ return 0;
+ int bid = bank_reg_infos[offset].bank;
+ if (bank_reg_infos[offset].hi)
+ return bank_infos[bid].adr >> 32;
+ int flags = bank_infos[bid].flags;
+ return (pci_bar[offset] & ~(bank_infos[bid].size - 1)) | (flags & M_IO ? 1 : 0) | (flags & M_64A ? 4 : 0) | (flags & M_PREF ? 8 : 0);
+
+}
+
WRITE32_MEMBER(ide_pci_device::address_base_w)
{
- // data==0xffffffff is used to identify required memory space
- if (data != 0xffffffff) {
- // Save local copy of BAR
- pci_bar[offset] = data;
- // Bits 0 (primary) and 2 (secondary) control if the mapping is legacy or BAR
- switch (offset) {
- case 0: case 1:
- if (pclass & 0x1)
- pci_device::address_base_w(space, offset, data);
- break;
- case 2: case 3:
- if (pclass & 0x4)
- pci_device::address_base_w(space, offset, data);
- break;
- default:
- // Only the first 4 bars are controlled by pif
+ // Save local copy of BAR
+ pci_bar[offset] = data;
+ // Bits 0 (primary) and 2 (secondary) control if the mapping is legacy or BAR
+ switch (offset) {
+ case 0: case 1:
+ if (pclass & 0x1)
pci_device::address_base_w(space, offset, data);
- }
- logerror("Mapping bar[%i] = %08x\n", offset, data);
+ break;
+ case 2: case 3:
+ if (pclass & 0x4)
+ pci_device::address_base_w(space, offset, data);
+ break;
+ default:
+ // Only the first 4 bars are controlled by pif
+ pci_device::address_base_w(space, offset, data);
}
+ logerror("Mapping bar[%i] = %08x\n", offset, data);
}