diff options
author | Michael Zapf <Michael.Zapf@mizapf.de> | 2016-03-31 01:25:06 +0200 |
---|---|---|
committer | Michael Zapf <Michael.Zapf@mizapf.de> | 2016-03-31 01:25:06 +0200 |
commit | d2c4c2e347361c560a86ef44f123ea200b1a9459 (patch) | |
tree | b141e2ac7a5feac3863c4a14456f3729b2a67e02 /src/devices/cpu | |
parent | 93116a38c5a29b00f2a9c701e5d04e7a6cf8f37f (diff) |
tms9995: Changed method names for some input lines
Diffstat (limited to 'src/devices/cpu')
-rw-r--r-- | src/devices/cpu/tms9900/tms9995.cpp | 4 | ||||
-rw-r--r-- | src/devices/cpu/tms9900/tms9995.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp index bdd530d7cc7..0e175663473 100644 --- a/src/devices/cpu/tms9900/tms9995.cpp +++ b/src/devices/cpu/tms9900/tms9995.cpp @@ -1352,7 +1352,7 @@ void tms9995_device::pulse_clock(int count) /* Enter the hold state. */ -WRITE_LINE_MEMBER( tms9995_device::set_hold ) +WRITE_LINE_MEMBER( tms9995_device::hold_line ) { m_hold_requested = (state==ASSERT_LINE); if (TRACE_WAITHOLD) logerror("set HOLD = %d\n", state); @@ -1366,7 +1366,7 @@ WRITE_LINE_MEMBER( tms9995_device::set_hold ) Signal READY to the CPU. When cleared, the CPU enters wait states. This becomes effective on a clock pulse. */ -WRITE_LINE_MEMBER( tms9995_device::set_ready ) +WRITE_LINE_MEMBER( tms9995_device::ready_line ) { if (m_reset && (m_ready_bufd != state)) logerror("Ignoring READY=%d change due to pending RESET\n", state); else diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h index 96f5c7b1cb8..1e5dfdf3594 100644 --- a/src/devices/cpu/tms9900/tms9995.h +++ b/src/devices/cpu/tms9900/tms9995.h @@ -54,12 +54,12 @@ public: // READY input line. When asserted (high), the memory is ready for data exchange. // We chose to use a direct method instead of a delegate to keep performance // footprint low; this method may be called very frequently. - DECLARE_WRITE_LINE_MEMBER( set_ready ); + DECLARE_WRITE_LINE_MEMBER( ready_line ); // HOLD input line. When asserted (low), the CPU is requested to release the // data and address bus and enter the HOLD state. The entrance of this state // is acknowledged by the HOLDA output line. - DECLARE_WRITE_LINE_MEMBER( set_hold ); + DECLARE_WRITE_LINE_MEMBER( hold_line ); // RESET input line. Unlike the standard set_input_line, this input method // is synchronous and will immediately lead to a reset of the CPU. |