diff options
author | David Haywood <28625134+DavidHaywood@users.noreply.github.com> | 2019-12-04 19:26:23 +0000 |
---|---|---|
committer | R. Belmont <rb6502@users.noreply.github.com> | 2019-12-04 14:26:23 -0500 |
commit | 3127f799a2f97298e2c071548e0a0d7a354dbb8f (patch) | |
tree | 1568be305e67a825d49d1e1c57af13527453c431 /src/devices/cpu | |
parent | c4fcbb0ce7e1ef899b125e08e8ac7ad73e4c6a96 (diff) |
Sunplus Plug & Play work (cleanup + fixes + notes based on wrlshunt code analysis) (#6010)
* misc sunplus work (nw)
* unbreak a few things, remove some test code (nw)
* mask shift values, maybe correct based on code study (nw)
* refactor (nw)
* notes based on code study (nw)
* force a different codepath in wrlshunt, static screen, but differnet, no crash, need to see if it's valid (nw)
* test (nw)
Diffstat (limited to 'src/devices/cpu')
-rw-r--r-- | src/devices/cpu/unsp/unsp_exxx.cpp | 27 | ||||
-rw-r--r-- | src/devices/cpu/unsp/unsp_fxxx.cpp | 21 |
2 files changed, 22 insertions, 26 deletions
diff --git a/src/devices/cpu/unsp/unsp_exxx.cpp b/src/devices/cpu/unsp/unsp_exxx.cpp index e7db4ba5a0d..af9a01bfc89 100644 --- a/src/devices/cpu/unsp/unsp_exxx.cpp +++ b/src/devices/cpu/unsp/unsp_exxx.cpp @@ -116,10 +116,12 @@ void unsp_12_device::execute_exxx_group(uint16_t op) if (op & 0x0100) { // MUL su ( unsigned * signed ) - logerror("MUL su\n"); const uint16_t opa = (op >> 9) & 7; const uint16_t opb = op & 7; m_core->m_icount -= 12; + + logerror("%s: MUL su with %04x (signed) * %04x (unsigned) : ", machine().describe_context(), m_core->m_r[opa], m_core->m_r[opb]); + uint32_t lres = m_core->m_r[opa] * m_core->m_r[opb]; if (m_core->m_r[opa] & 0x8000) { @@ -127,6 +129,9 @@ void unsp_12_device::execute_exxx_group(uint16_t op) } m_core->m_r[REG_R4] = lres >> 16; m_core->m_r[REG_R3] = (uint16_t)lres; + + logerror("result was : %08x\n", lres); + return; } else @@ -175,32 +180,36 @@ void unsp_12_device::execute_exxx_group(uint16_t op) return; case 0x02: - logerror("pc:%06x: %s = %s lsl %s (%04x %04x)\n", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); - m_core->m_r[rd] = m_core->m_r[rd] << m_core->m_r[rs]; + logerror("pc:%06x: %s = %s lsl %s (%04x %04x) : ", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); + m_core->m_r[rd] = (uint16_t)(m_core->m_r[rd] << (m_core->m_r[rs] & 0x0f)); + logerror("result %04x\n", m_core->m_r[rd]); return; case 0x03: { // wrlshunt uses this - logerror("pc:%06x: %s = %s lslor %s (%04x %04x)\n", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); + logerror("pc:%06x: %s = %s lslor %s (%04x %04x) : ", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); uint16_t tmp = m_core->m_r[rd]; - m_core->m_r[rd] = m_core->m_r[rd] << m_core->m_r[rs]; + m_core->m_r[rd] = (uint16_t)(m_core->m_r[rd] << (m_core->m_r[rs] & 0x0f)); m_core->m_r[rd] |= tmp; // guess + logerror("result %04x\n", m_core->m_r[rd]); return; } case 0x04: // smartfp loops increasing shift by 4 up to values of 28? (but regs are 16-bit?) - logerror("pc:%06x: %s = %s lsr %s (%04x %04x)\n", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); - m_core->m_r[rd] = m_core->m_r[rd] >> m_core->m_r[rs]; + logerror("pc:%06x: %s = %s lsr %s (%04x %04x) : ", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); + m_core->m_r[rd] = (uint16_t)(m_core->m_r[rd] >> (m_core->m_r[rs] & 0xf)); + logerror("result %04x\n", m_core->m_r[rd]); return; case 0x05: { - logerror("pc:%06x: %s = %s lsror %s (%04x %04x)\n", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); + logerror("pc:%06x: %s = %s lsror %s (%04x %04x) : ", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); uint16_t tmp = m_core->m_r[rd]; - m_core->m_r[rd] = m_core->m_r[rd] >> m_core->m_r[rs]; + m_core->m_r[rd] = (uint16_t)(m_core->m_r[rd] >> (m_core->m_r[rs] & 0x0f)); m_core->m_r[rd] |= tmp; // guess + logerror("result %04x\n", m_core->m_r[rd]); return; } diff --git a/src/devices/cpu/unsp/unsp_fxxx.cpp b/src/devices/cpu/unsp/unsp_fxxx.cpp index 442b497a5eb..2dd1b42bcec 100644 --- a/src/devices/cpu/unsp/unsp_fxxx.cpp +++ b/src/devices/cpu/unsp/unsp_fxxx.cpp @@ -289,27 +289,14 @@ void unsp_12_device::execute_fxxx_101_group(uint16_t op) { uint16_t r4 = m_core->m_r[REG_R4]; - // this could be optimized, but logic is correct for use cases seen if (r4 & 0x8000) { // r2 undefined (code will check for this and avoid calculations } - else if (r4 & 0x4000) { m_core->m_r[REG_R2] = 0x0000; } - else if (r4 & 0x2000) { m_core->m_r[REG_R2] = 0x0001; } - else if (r4 & 0x1000) { m_core->m_r[REG_R2] = 0x0002; } - else if (r4 & 0x0800) { m_core->m_r[REG_R2] = 0x0003; } - else if (r4 & 0x0400) { m_core->m_r[REG_R2] = 0x0004; } - else if (r4 & 0x0200) { m_core->m_r[REG_R2] = 0x0005; } - else if (r4 & 0x0100) { m_core->m_r[REG_R2] = 0x0006; } - else if (r4 & 0x0080) { m_core->m_r[REG_R2] = 0x0007; } - else if (r4 & 0x0040) { m_core->m_r[REG_R2] = 0x0008; } - else if (r4 & 0x0020) { m_core->m_r[REG_R2] = 0x0009; } - else if (r4 & 0x0010) { m_core->m_r[REG_R2] = 0x000a; } - else if (r4 & 0x0008) { m_core->m_r[REG_R2] = 0x000b; } - else if (r4 & 0x0004) { m_core->m_r[REG_R2] = 0x000c; } - else if (r4 & 0x0002) { m_core->m_r[REG_R2] = 0x000d; } - else if (r4 & 0x0001) { m_core->m_r[REG_R2] = 0x000e; } - else { m_core->m_r[REG_R2] = 0x000f; } + else + { + m_core->m_r[REG_R2] = count_leading_zeros(r4) - 17; // -17 because count_leading_zeros works with 32-bit values + } return; } |