diff options
author | Vas Crabb <vas@vastheman.com> | 2019-12-21 15:15:32 +1100 |
---|---|---|
committer | Vas Crabb <vas@vastheman.com> | 2019-12-21 15:15:32 +1100 |
commit | 826db8a22b2d1f173af5a9be504bf9c3acd7f5c8 (patch) | |
tree | d27419821aeea7d4422a8a2fe9b48aefe3838c9c /src/devices/cpu | |
parent | 320133cf13c02f8585315edb28319c0c24069a1e (diff) |
srcclean (nw)
Diffstat (limited to 'src/devices/cpu')
-rw-r--r-- | src/devices/cpu/m68000/m68kmmu.h | 2 | ||||
-rw-r--r-- | src/devices/cpu/unsp/unsp_extended.cpp | 24 | ||||
-rw-r--r-- | src/devices/cpu/unsp/unsp_exxx.cpp | 12 | ||||
-rw-r--r-- | src/devices/cpu/unsp/unsp_fxxx.cpp | 4 |
4 files changed, 21 insertions, 21 deletions
diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h index 3e55f51ec39..f9cdf880358 100644 --- a/src/devices/cpu/m68000/m68kmmu.h +++ b/src/devices/cpu/m68000/m68kmmu.h @@ -229,7 +229,7 @@ void pmmu_atc_flush_fc_ea(const u16 modes) { if ((e & M68K_MMU_ATC_VALID) && (((e >> 24) & fcmask) == fc) && -// (((e >> ps) << (ps - 8)) == ((ea >> ps) << (ps - 8)))) +// (((e >> ps) << (ps - 8)) == ((ea >> ps) << (ps - 8)))) ( (e << ps) == (ea >> 8 << ps) )) { MMULOG("flushing entry %08x\n", e); diff --git a/src/devices/cpu/unsp/unsp_extended.cpp b/src/devices/cpu/unsp/unsp_extended.cpp index 653a63c1c75..4d10495f31c 100644 --- a/src/devices/cpu/unsp/unsp_extended.cpp +++ b/src/devices/cpu/unsp/unsp_extended.cpp @@ -38,7 +38,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) { // A += B //logerror( "(Extended group 0) %s += %s\n", (ra & 0x8) ? extregs[ra & 0x7] : regs[ra & 0x7] - // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); + // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); m_core->m_icount -= 1; // TODO uint16_t r0 = (ra & 0x8) ? m_secondary_r[ra & 0x7] : m_core->m_r[ra & 0x7]; @@ -90,7 +90,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) { // CMP A,B //logerror( "(Extended group 0) cmp %s, %s\n", (ra & 0x8) ? extregs[ra & 0x7] : regs[ra & 0x7] - // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); + // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); m_core->m_icount -= 1; // TODO uint16_t r0 = (ra & 0x8) ? m_secondary_r[ra & 0x7] : m_core->m_r[ra & 0x7]; @@ -124,7 +124,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) { // A = B //logerror("(Extended group 0) %s = %s\n", (ra & 0x8) ? extregs[ra & 0x7] : regs[ra & 0x7] - // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); + // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); m_core->m_icount -= 1; // TODO uint32_t lres = (rb & 0x8) ? m_secondary_r[rb & 0x7] : m_core->m_r[rb & 0x7]; @@ -220,7 +220,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) logerror("(Ext) push <BAD>\n"); unimplemented_opcode(op, ximm); } - + return; } else @@ -235,7 +235,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) if ((rx - (size - 1)) >= 0) { //logerror("(Ext) pop %s, %s from [%s]\n", - // extregs[rx - size], extregs[rx], (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); + // extregs[rx - size], extregs[rx], (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); int realrx = 7 - rx; while (size--) @@ -336,7 +336,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) { // A = C //logerror("(Extended group 1) %s = %04x\n", (ra & 0x8) ? extregs[ra & 0x7] : regs[ra & 0x7] - // , imm16_2); + // , imm16_2); m_core->m_icount -= 1; // TODO uint32_t lres = imm16_2; @@ -473,7 +473,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) { // A = C //logerror("(Extended group 2) %s = [%04x]\n", (ra & 0x8) ? extregs[ra & 0x7] : regs[ra & 0x7] - // , imm16_2); + // , imm16_2); //unimplemented_opcode(op, ximm, imm16_2); m_core->m_icount -= 1; // TODO @@ -656,7 +656,7 @@ void unsp_20_device::execute_extended_group(uint16_t op) { // C = B //logerror( "(Extended group 3) [%04x] = %s\n", imm16_2 - // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); + // , (rb & 0x8) ? extregs[rb & 0x7] : regs[rb & 0x7]); m_core->m_icount -= 1; // TODO if (ra != rb) @@ -1000,12 +1000,12 @@ void unsp_20_device::execute_extended_group(uint16_t op) { // CMP A,B //logerror("(Extended group 6) cmp %s, %02x\n", extregs[rx], imm6); - + m_core->m_icount -= 1; // TODO uint32_t lres = m_secondary_r[rx] + (uint16_t)(~imm6) + uint32_t(1); update_nzsc(lres, m_secondary_r[rx] , ~imm6); - + //unimplemented_opcode(op, ximm); return; break; @@ -1116,9 +1116,9 @@ void unsp_20_device::execute_extended_group(uint16_t op) uint16_t r1 = read16(addr); uint32_t lres = r0 + r1 + c; - + update_nzsc(lres, r0, r1); - + m_secondary_r[rx] = lres; //unimplemented_opcode(op, ximm); diff --git a/src/devices/cpu/unsp/unsp_exxx.cpp b/src/devices/cpu/unsp/unsp_exxx.cpp index 25f754bb2e8..d631e096588 100644 --- a/src/devices/cpu/unsp/unsp_exxx.cpp +++ b/src/devices/cpu/unsp/unsp_exxx.cpp @@ -181,9 +181,9 @@ void unsp_12_device::execute_exxx_group(uint16_t op) case 0x02: logerror("pc:%06x: %s = %s lsl %s (%04x %04x) : ", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); - + m_core->m_r[rd] = (uint16_t)((m_core->m_r[rd]&0xffff) << (m_core->m_r[rs] & 0x01f)); - + logerror("result %04x\n", m_core->m_r[rd]); return; @@ -197,8 +197,8 @@ void unsp_12_device::execute_exxx_group(uint16_t op) unimplemented_opcode(op); uint32_t res = (uint16_t)(m_core->m_r[rd]); - - res <<= (m_core->m_r[rs] & 0x01f); + + res <<= (m_core->m_r[rs] & 0x01f); m_core->m_r[rd] = (res & 0xffff); m_core->m_r[rd + 1] |= (res >> 16); // register bleeding? @@ -208,7 +208,7 @@ void unsp_12_device::execute_exxx_group(uint16_t op) } case 0x04: - // smartfp loops increasing shift by 4 up to values of 28? (but regs are 16-bit?) + // smartfp loops increasing shift by 4 up to values of 28? (but regs are 16-bit?) logerror("pc:%06x: %s = %s lsr %s (%04x %04x) : ", UNSP_LPC, regs[rd], regs[rd], regs[rs], m_core->m_r[rd], m_core->m_r[rs]); m_core->m_r[rd] = (uint16_t)((m_core->m_r[rd]&0xffff) >> (m_core->m_r[rs] & 0x1f)); logerror("result %04x\n", m_core->m_r[rd]); @@ -224,7 +224,7 @@ void unsp_12_device::execute_exxx_group(uint16_t op) uint32_t res = (uint16_t)(m_core->m_r[rd]); res <<= 16; - + res = res >> (m_core->m_r[rs] & 0x01f); // register bleeding behavior needed (for example) in jak_cars2 nand browser when increasing upper digits of address diff --git a/src/devices/cpu/unsp/unsp_fxxx.cpp b/src/devices/cpu/unsp/unsp_fxxx.cpp index 97cc652e649..3566ccaa066 100644 --- a/src/devices/cpu/unsp/unsp_fxxx.cpp +++ b/src/devices/cpu/unsp/unsp_fxxx.cpp @@ -45,14 +45,14 @@ inline void unsp_device::execute_fxxx_000_group(uint16_t op) { int r = op & 0x7; logerror("%s = fr\n", regs[r]); - // unimplemented_opcode(op); + // unimplemented_opcode(op); return; } else if (((op & 0xf1f8) == 0xf038) && m_iso >= 12) { int r = op & 0x7; logerror("fr = %s\n", regs[r]); - // unimplemented_opcode(op); + // unimplemented_opcode(op); return; } |