diff options
author | 2019-03-25 23:13:40 +0100 | |
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committer | 2019-03-25 23:13:40 +0100 | |
commit | b380514764cf857469bae61c11143a19f79a74c5 (patch) | |
tree | 63c8012e262618f08a332da31dd714281aa2c5ed /src/devices/cpu/z8/z8.cpp | |
parent | c24473ddff715ecec2e258a6eb38960cf8c8e98e (diff) |
Revert "conflict resolution (nw)"
This reverts commit c24473ddff715ecec2e258a6eb38960cf8c8e98e, reversing
changes made to 009cba4fb8102102168ef32870892438327f3705.
Diffstat (limited to 'src/devices/cpu/z8/z8.cpp')
-rw-r--r-- | src/devices/cpu/z8/z8.cpp | 542 |
1 files changed, 92 insertions, 450 deletions
diff --git a/src/devices/cpu/z8/z8.cpp b/src/devices/cpu/z8/z8.cpp index 1359fea831f..d5e19fe831f 100644 --- a/src/devices/cpu/z8/z8.cpp +++ b/src/devices/cpu/z8/z8.cpp @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Curt Coder, AJR +// copyright-holders:Curt Coder /********************************************************************** Zilog Z8 Single-Chip MCU emulation @@ -11,6 +11,8 @@ TODO: - strobed I/O + - timer Tin/Tout modes + - serial - instruction pipeline - internal diagnostic ROM in data space (requires high voltage reset) @@ -31,14 +33,14 @@ #define Z8_P3_RDY0 0x20 /* not supported */ #define Z8_P3_RDY1 0x10 /* not supported */ #define Z8_P3_RDY2 0x40 /* not supported */ -#define Z8_P3_IRQ0 0x04 -#define Z8_P3_IRQ1 0x08 -#define Z8_P3_IRQ2 0x02 -#define Z8_P3_IRQ3 0x01 -#define Z8_P3_SIN 0x01 -#define Z8_P3_SOUT 0x80 -#define Z8_P3_TIN 0x02 -#define Z8_P3_TOUT 0x40 +#define Z8_P3_IRQ0 0x04 /* not supported */ +#define Z8_P3_IRQ1 0x08 /* not supported */ +#define Z8_P3_IRQ2 0x02 /* not supported */ +#define Z8_P3_IRQ3 0x01 /* not supported */ +#define Z8_P3_DI 0x01 /* not supported */ +#define Z8_P3_DO 0x80 /* not supported */ +#define Z8_P3_TIN 0x02 /* not supported */ +#define Z8_P3_TOUT 0x40 /* not supported */ #define Z8_P3_DM 0x10 /* not supported */ #define Z8_PRE0_COUNT_MODULO_N 0x01 @@ -50,15 +52,15 @@ #define Z8_TMR_ENABLE_T0 0x02 #define Z8_TMR_LOAD_T1 0x04 #define Z8_TMR_ENABLE_T1 0x08 -#define Z8_TMR_TIN_MASK 0x30 -#define Z8_TMR_TIN_EXTERNAL_CLK 0x00 -#define Z8_TMR_TIN_GATE 0x10 -#define Z8_TMR_TIN_TRIGGER 0x20 -#define Z8_TMR_TIN_RETRIGGER 0x30 -#define Z8_TMR_TOUT_MASK 0xc0 -#define Z8_TMR_TOUT_OFF 0x00 -#define Z8_TMR_TOUT_T0 0x40 -#define Z8_TMR_TOUT_T1 0x80 +#define Z8_TMR_TIN_MASK 0x30 /* not supported */ +#define Z8_TMR_TIN_EXTERNAL_CLK 0x00 /* not supported */ +#define Z8_TMR_TIN_GATE 0x10 /* not supported */ +#define Z8_TMR_TIN_TRIGGER 0x20 /* not supported */ +#define Z8_TMR_TIN_RETRIGGER 0x30 /* not supported */ +#define Z8_TMR_TOUT_MASK 0xc0 /* not supported */ +#define Z8_TMR_TOUT_OFF 0x00 /* not supported */ +#define Z8_TMR_TOUT_T0 0x40 /* not supported */ +#define Z8_TMR_TOUT_T1 0x80 /* not supported */ #define Z8_TMR_TOUT_INTERNAL_CLK 0xc0 /* not supported */ #define Z8_P01M_P0L_MODE_MASK 0x03 @@ -117,7 +119,6 @@ DEFINE_DEVICE_TYPE(UB8830D, ub8830d_device, "ub8830d", "UB8830D") DEFINE_DEVICE_TYPE(Z8611, z8611_device, "z8611", "Zilog Z8611") DEFINE_DEVICE_TYPE(Z8671, z8671_device, "z8671", "Zilog Z8671") DEFINE_DEVICE_TYPE(Z8681, z8681_device, "z8681", "Zilog Z8681") -DEFINE_DEVICE_TYPE(Z8682, z8682_device, "z8682", "Zilog Z8682") /*************************************************************************** @@ -169,7 +170,6 @@ z8_device::z8_device(const machine_config &mconfig, device_type type, const char , m_input_cb{{*this}, {*this}, {*this}, {*this}} , m_output_cb{{*this}, {*this}, {*this}, {*this}} , m_rom_size(rom_size) - , m_input{0xff, 0xff, 0xff, 0x0f} { assert(((rom_size - 1) & rom_size) == 0); } @@ -215,23 +215,6 @@ z8681_device::z8681_device(const machine_config &mconfig, const char *tag, devic } -z8682_device::z8682_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : z8_device(mconfig, Z8682, tag, owner, clock, 0x800, true) -{ -} - -ROM_START(z8682) - // Zilog admits that this nominally ROMless type uses a "small internal ROM" - ROM_REGION(0x0800, "internal", ROMREGION_ERASEFF) - ROM_LOAD("testrom.bin", 0x0000, 0x0038, CRC(b2239f28) SHA1(9d27957ba0f15657eac5a7295157af6ee51cb261) BAD_DUMP) // typed in from "Z8 MCU Test Mode" application note -ROM_END - -const tiny_rom_entry *z8682_device::device_rom_region() const -{ - return ROM_NAME(z8682); -} - - std::unique_ptr<util::disasm_interface> z8_device::create_disassembler() { return std::make_unique<z8_disassembler>(); @@ -435,257 +418,43 @@ void z8_device::p2_write(uint8_t data) m_output_cb[2](0, data & mask, mask); } -void z8_device::p3_update_output() -{ - uint8_t output = m_output[3] & 0xf0; - - if ((m_tmr & Z8_TMR_TOUT_MASK) != Z8_TMR_TOUT_OFF) - output = (output & ~Z8_P3_TOUT) | (m_tout ? Z8_P3_TOUT : 0); - if ((m_p3m & Z8_P3M_P3_SERIAL) != 0) - output = (output & ~Z8_P3_SOUT) | ((m_transmit_sr == 0 || BIT(m_transmit_sr, 0)) ? Z8_P3_SOUT : 0); - - if (m_p3_output != output) - { - m_output_cb[3](0, output, output ^ m_p3_output); - m_p3_output = output; - } -} - uint8_t z8_device::p3_read() { uint8_t mask = 0x0f; - uint8_t inputs = m_input[3] & m_input_cb[3](0, mask); // TODO: special port 3 modes //if (!(m_p3m & 0x7c)) //{ //} - return (inputs & mask) | (m_p3_output & ~mask); + if (mask) + m_input[3] = m_input_cb[3](0, mask); + + return (m_input[3] & mask) | (m_output[3] & ~mask); } void z8_device::p3_write(uint8_t data) { - m_output[3] = data & 0xf0; + uint8_t mask = 0xf0; + + m_output[3] = data; // TODO: special port 3 modes //if (!(m_p3m & 0x7c)) //{ //} - p3_update_output(); -} - -bool z8_device::get_serial_in() -{ - return (m_input[3] & Z8_P3_SIN) != 0; -} - -void z8_device::sio_receive() -{ - if (m_receive_started) - { - m_receive_count = (m_receive_count + 1) & 15; - if (m_receive_count == 8) - { - if (m_receive_sr == 0) - { - if (!get_serial_in()) - { - // start bit validated - m_receive_sr |= 1 << 9; - m_receive_parity = false; - } - else - { - // false start bit - m_receive_started = false; - m_receive_count = 0; - } - } - else - { - // shift in data, parity or stop bit - m_receive_sr >>= 1; - if (get_serial_in()) - m_receive_sr |= 1 << 9; - - if (BIT(m_receive_sr, 0)) - { - // received full character - m_receive_buffer = (m_receive_sr & 0x1fe) >> 1; - request_interrupt(3); - m_receive_started = false; - m_receive_count = 0; - } - else - { - if (BIT(m_receive_sr, 9)) - m_receive_parity = !m_receive_parity; - - // parity replaces received bit 7 if selected - if (BIT(m_receive_sr, 1) && (m_p3m & Z8_P3M_PARITY) != 0) - { - if (m_receive_parity) - m_receive_sr |= 1 << 9; - else - m_receive_sr &= ~(1 << 9); - } - } - } - } - } - else - { - // start bit is high-low transition - m_receive_sr >>= 1; - if (get_serial_in()) - m_receive_sr |= 1 << 9; - else if (BIT(m_receive_sr, 8)) - { - m_receive_started = true; - m_receive_sr = 0; - m_receive_count = 0; - } - } -} - -void z8_device::sio_transmit() -{ - if (m_transmit_sr == 0) - return; - - m_transmit_count = (m_transmit_count + 1) & 15; - if (m_transmit_count == 0) - { - m_transmit_sr >>= 1; - if (m_transmit_sr == 0) - request_interrupt(4); - else - { - // parity replaces received bit 7 if selected - if ((m_transmit_sr >> 1) == 3 && (m_p3m & Z8_P3M_PARITY) != 0) - { - if (m_transmit_parity) - m_transmit_sr |= 1; - else - m_transmit_sr &= ~1; - } - else if (BIT(m_transmit_sr, 0)) - m_transmit_parity = !m_transmit_parity; - - // serial output - p3_update_output(); - } - } + if (mask) + m_output_cb[3](0, data & mask, mask); } uint8_t z8_device::sio_read() { - return m_receive_buffer; + return 0xff; } void z8_device::sio_write(uint8_t data) { - // overwrite shift register with data + 1 start bit + 2 stop bits - m_transmit_sr = (m_transmit_sr & 1) | (uint16_t(data) << 2) | (3 << 10); - m_transmit_parity = false; - - // synchronize the shift clock - m_transmit_count = 15; -} - -template <int T> -void z8_device::timer_start() -{ - unsigned prescaler = (m_pre[T] >> 2) ? (m_pre[T] >> 2) : 64; - unsigned full_count = (m_count[T] ? m_count[T] - 1 : 255) * prescaler + (m_pre_count[T] ? m_pre_count[T] : 64); - m_internal_timer[T]->adjust(cycles_to_attotime(4 * full_count)); -} - -template <int T> -void z8_device::timer_stop() -{ - if (!m_internal_timer[T]->enabled()) - return; - - unsigned prescaler = (m_pre[T] >> 2) ? (m_pre[T] >> 2) : 64; - unsigned remaining = attotime_to_cycles(m_internal_timer[T]->remaining() / 4); - - m_count[T] = remaining / prescaler + 1; - m_pre_count[T] = (remaining % prescaler + 1) & 0x3f; - - m_internal_timer[T]->enable(false); -} - -template <int T> -void z8_device::timer_end() -{ - if ((m_tmr & Z8_TMR_TOUT_MASK) == (T == 0 ? Z8_TMR_TOUT_T0 : Z8_TMR_TOUT_T1)) - tout_toggle(); - - if (T == 0 && (m_p3m & Z8_P3M_P3_SERIAL) != 0) - { - sio_receive(); - sio_transmit(); - } - else - request_interrupt(4 + T); - - m_pre_count[T] = m_pre[T] >> 2; - if (m_pre[T] & Z8_PRE0_COUNT_MODULO_N) - m_count[T] = m_t[T]; - else - m_tmr &= ~(T == 0 ? Z8_TMR_ENABLE_T0 : Z8_TMR_ENABLE_T1); -} - -void z8_device::t1_trigger() -{ - switch (m_tmr & Z8_TMR_TIN_MASK) - { - case Z8_TMR_TIN_EXTERNAL_CLK: - m_pre_count[1]--; - if (m_pre_count[1] == 0) - { - m_pre_count[1] = m_pre[1]; - if ((m_tmr & Z8_TMR_ENABLE_T1) != 0) - { - m_count[1]--; - if (m_count[1] == 0) - timer_end<1>(); - } - } - break; - - case Z8_TMR_TIN_GATE: - timer_stop<1>(); - break; - - case Z8_TMR_TIN_TRIGGER: - if (m_internal_timer[1]->enabled()) - break; - - case Z8_TMR_TIN_RETRIGGER: - if ((m_tmr & Z8_TMR_ENABLE_T1) != 0) - { - m_count[1] = m_t[1]; - m_pre_count[1] = m_pre[1] >> 2; - timer_start<1>(); - } - break; - } -} - -void z8_device::tout_init() -{ - m_tout = true; - p3_update_output(); -} - -void z8_device::tout_toggle() -{ - m_tout = !m_tout; - p3_update_output(); } uint8_t z8_device::tmr_read() @@ -695,80 +464,28 @@ uint8_t z8_device::tmr_read() void z8_device::tmr_write(uint8_t data) { - m_tmr = data & ~(Z8_TMR_LOAD_T0 | Z8_TMR_LOAD_T1); // actually reset on next internal clock - - bool t1_internal = (m_pre[1] & Z8_PRE1_INTERNAL_CLOCK) != 0; - bool t0_load = (data & Z8_TMR_LOAD_T0) != 0; - bool t1_load = (data & Z8_TMR_LOAD_T1) != 0; - bool t0_enable = (data & Z8_TMR_ENABLE_T0) != 0; - bool t1_enable = (data & Z8_TMR_ENABLE_T1) != 0; + m_tmr = data; - if (!t1_internal && ((data & Z8_TMR_TIN_MASK) == Z8_TMR_TIN_GATE)) - { - if ((m_input[3] & Z8_P3_TIN) != 0) - t1_internal = true; - else - t1_enable = false; - } - - if (t0_load) + if (data & Z8_TMR_LOAD_T0) { m_count[0] = m_t[0]; - m_pre_count[0] = m_pre[0] >> 2; - - if ((m_pre[0] & Z8_PRE0_COUNT_MODULO_N) != 0) - { - unsigned prescaler = (m_pre[0] >> 2) ? (m_pre[0] >> 2) : 64; - unsigned count = (m_t[0] ? m_t[0] : 256) * prescaler; - logerror("(%04X): Load T0 at %.2f Hz\n", m_ppc, clock() / 8.0 / count); - } - - if ((data & Z8_TMR_TOUT_MASK) == Z8_TMR_TOUT_T0) - tout_init(); + m_t0_timer->adjust(attotime::zero, 0, cycles_to_attotime(4 * ((m_pre[0] >> 2) + 1))); } - if (t0_enable) - { - if (t0_load || !m_internal_timer[0]->enabled()) - timer_start<0>(); - } - else - timer_stop<0>(); + m_t0_timer->enable(data & Z8_TMR_ENABLE_T0); - if (t1_load) + if (data & Z8_TMR_LOAD_T1) { m_count[1] = m_t[1]; - m_pre_count[1] = m_pre[1] >> 2; - - if (t1_internal && (m_pre[1] & Z8_PRE0_COUNT_MODULO_N) != 0) - { - unsigned prescaler = (m_pre[1] >> 2) ? (m_pre[1] >> 2) : 64; - unsigned count = (m_t[1] ? m_t[1] : 256) * prescaler; - logerror("(%04X): Load T1 at %.2f Hz\n", m_ppc, clock() / 8.0 / count); - } - - if ((data & Z8_TMR_TOUT_MASK) == Z8_TMR_TOUT_T1) - tout_init(); + m_t1_timer->adjust(attotime::zero, 0, cycles_to_attotime(4 * ((m_pre[1] >> 2) + 1))); } - if (t1_enable) - { - if (t1_internal && (t1_load || !m_internal_timer[1]->enabled())) - timer_start<1>(); - } - else - timer_stop<1>(); + m_t1_timer->enable(data & Z8_TMR_ENABLE_T1); } uint8_t z8_device::t0_read() { - if (!m_internal_timer[0]->enabled()) - return m_count[0]; - - unsigned prescaler = (m_pre[0] >> 2) ? (m_pre[0] >> 2) : 64; - unsigned remaining = attotime_to_cycles(m_internal_timer[0]->remaining() / 4); - - return remaining / prescaler + 1; + return m_count[0]; } void z8_device::t0_write(uint8_t data) @@ -778,13 +495,7 @@ void z8_device::t0_write(uint8_t data) uint8_t z8_device::t1_read() { - if (!m_internal_timer[1]->enabled()) - return m_count[1]; - - unsigned prescaler = (m_pre[1] >> 2) ? (m_pre[1] >> 2) : 64; - unsigned remaining = attotime_to_cycles(m_internal_timer[1]->remaining() / 4); - - return remaining / prescaler + 1; + return m_count[1]; } void z8_device::t1_write(uint8_t data) @@ -794,28 +505,12 @@ void z8_device::t1_write(uint8_t data) void z8_device::pre0_write(uint8_t data) { - if (m_internal_timer[0]->enabled()) - { - timer_stop<0>(); - m_pre[0] = data; - timer_start<0>(); - } - else - m_pre[0] = data; + m_pre[0] = data; } void z8_device::pre1_write(uint8_t data) { - bool was_enabled = m_internal_timer[1]->enabled(); - if (was_enabled) - timer_stop<1>(); - m_pre[1] = data; - - if ((data & Z8_PRE1_INTERNAL_CLOCK) != 0 - ? (m_tmr & Z8_TMR_ENABLE_T1) != 0 - : was_enabled && (m_tmr & Z8_TMR_TIN_MASK) != Z8_TMR_TIN_EXTERNAL_CLK) - timer_start<1>(); } void z8_device::p01m_write(uint8_t data) @@ -830,16 +525,7 @@ void z8_device::p2m_write(uint8_t data) void z8_device::p3m_write(uint8_t data) { - if ((data & Z8_P3M_P3_SERIAL) == 0) - { - m_transmit_sr = 0; - m_transmit_count = 0; - m_receive_started = false; - m_receive_count = 0; - } - m_p3m = data; - p3_update_output(); } void z8_device::ipr_write(uint8_t data) @@ -919,12 +605,12 @@ void z8_device::register_pair_write(uint8_t offset, uint16_t data) m_regs->write_word_unaligned(offset, data); } -uint8_t z8_device::get_working_register(int offset) const +uint8_t z8_device::get_working_register(int offset) { return (m_rp & 0xf0) | (offset & 0x0f); } -uint8_t z8_device::get_register(uint8_t offset) const +uint8_t z8_device::get_register(uint8_t offset) { if ((offset & 0xf0) == 0xe0) return get_working_register(offset & 0x0f); @@ -1152,17 +838,29 @@ const z8_device::z8_opcode_map z8_device::Z8601_OPCODE_MAP[256] = TIMER CALLBACKS ***************************************************************************/ -template <int T> -TIMER_CALLBACK_MEMBER(z8_device::timeout) +TIMER_CALLBACK_MEMBER( z8_device::t0_tick ) { - timer_end<T>(); + m_count[0]--; - if (m_pre[T] & Z8_PRE0_COUNT_MODULO_N) - timer_start<T>(); - else + if (m_count[0] == 0) { - m_count[T] = 0; - m_internal_timer[T]->enable(false); + m_count[0] = m_t[0]; + m_t0_timer->adjust(attotime::zero, 0, cycles_to_attotime(4 * ((m_pre[0] >> 2) + 1))); + m_t0_timer->enable(m_pre[0] & Z8_PRE0_COUNT_MODULO_N); + request_interrupt(4); + } +} + +TIMER_CALLBACK_MEMBER( z8_device::t1_tick ) +{ + m_count[1]--; + + if (m_count[1] == 0) + { + m_count[1] = m_t[1]; + m_t1_timer->adjust(attotime::zero, 0, cycles_to_attotime(4 * ((m_pre[1] >> 2) + 1))); + m_t1_timer->enable(m_pre[1] & Z8_PRE0_COUNT_MODULO_N); + request_interrupt(5); } } @@ -1202,7 +900,6 @@ void z8_device::device_start() state_add(Z8_PRE1, "PRE1", m_pre[1]); state_add(Z8_T1, "T1", m_t[1]); state_add(Z8_TMR, "TMR", m_tmr); - state_add(Z8_TOUT, "TOUT", m_tout); for (int regnum = 0; regnum < 16; regnum++) state_add(Z8_R0 + regnum, string_format("R%d", regnum).c_str(), m_fake_r[regnum]).callimport().callexport(); @@ -1215,16 +912,16 @@ void z8_device::device_start() m_regs = &space(AS_IO); /* allocate timers */ - m_internal_timer[0] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z8_device::timeout<0>), this)); - m_internal_timer[1] = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z8_device::timeout<1>), this)); + m_t0_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z8_device::t0_tick), this)); + m_t1_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(z8_device::t1_tick), this)); /* Clear state */ std::fill(std::begin(m_irq_line), std::end(m_irq_line), CLEAR_LINE); + std::fill(std::begin(m_input), std::end(m_input), 0); std::fill(std::begin(m_output), std::end(m_output), 0); std::fill(std::begin(m_t), std::end(m_t), 0); std::fill(std::begin(m_count), std::end(m_count), 0); std::fill(std::begin(m_pre), std::end(m_pre), 0); - std::fill(std::begin(m_pre_count), std::end(m_pre_count), 0); std::fill(std::begin(m_fake_r), std::end(m_fake_r), 0); m_pc = 0; m_ppc = 0; @@ -1234,17 +931,7 @@ void z8_device::device_start() m_p01m = 0; m_p2m = 0; m_p3m = 0; - m_p3_output = 0; m_tmr = 0; - m_tout = true; - m_transmit_sr = 0; - m_transmit_count = 0; - m_transmit_parity = false; - m_receive_buffer = 0; - m_receive_sr = 0; - m_receive_count = 0; - m_receive_parity = false; - m_receive_started = false; m_irq_taken = false; m_irq_initialized = false; @@ -1259,21 +946,10 @@ void z8_device::device_start() save_item(NAME(m_p01m)); save_item(NAME(m_p2m)); save_item(NAME(m_p3m)); - save_item(NAME(m_p3_output)); save_item(NAME(m_tmr)); save_item(NAME(m_t)); - save_item(NAME(m_tout)); - save_item(NAME(m_transmit_sr)); - save_item(NAME(m_transmit_count)); - save_item(NAME(m_transmit_parity)); - save_item(NAME(m_receive_buffer)); - save_item(NAME(m_receive_sr)); - save_item(NAME(m_receive_count)); - save_item(NAME(m_receive_parity)); - save_item(NAME(m_receive_started)); save_item(NAME(m_count)); save_item(NAME(m_pre)); - save_item(NAME(m_pre_count)); save_item(NAME(m_irq_line)); save_item(NAME(m_irq_taken)); save_item(NAME(m_irq_initialized)); @@ -1303,7 +979,6 @@ void z8_device::take_interrupt(int irq) // acknowledge the IRQ m_irq &= ~(1 << irq); - standard_irq_callback(irq); // get the interrupt vector address uint16_t vector = irq * 2; @@ -1474,16 +1149,14 @@ void z8_device::device_reset() m_imr &= ~Z8_IMR_ENABLE; m_irq_initialized = false; - m_pre[0] &= ~Z8_PRE0_COUNT_MODULO_N; - m_pre[1] &= ~(Z8_PRE1_COUNT_MODULO_N | Z8_PRE1_INTERNAL_CLOCK); - m_tmr = 0x00; - timer_stop<0>(); - timer_stop<1>(); - - m_output[3] = 0xf0; p01m_write(0x4d); p2m_write(0xff); p3m_write(0x00); + p3_write(m_output[3] | 0xf0); + + m_pre[0] &= ~Z8_PRE0_COUNT_MODULO_N; + m_pre[1] &= ~(Z8_PRE1_COUNT_MODULO_N | Z8_PRE1_INTERNAL_CLOCK); + tmr_write(0x00); } @@ -1507,7 +1180,7 @@ void z8_device::state_import(const device_state_entry &entry) case Z8_R0: case Z8_R1: case Z8_R2: case Z8_R3: case Z8_R4: case Z8_R5: case Z8_R6: case Z8_R7: case Z8_R8: case Z8_R9: case Z8_R10: case Z8_R11: case Z8_R12: case Z8_R13: case Z8_R14: case Z8_R15: { auto dis = machine().disable_side_effects(); - register_write((m_rp & 0xf0) + (entry.index() - Z8_R0), m_fake_r[entry.index() - Z8_R0]); + register_write(m_rp + (entry.index() - Z8_R0), m_fake_r[entry.index() - Z8_R0]); break; } @@ -1523,7 +1196,7 @@ void z8_device::state_export(const device_state_entry &entry) case Z8_R0: case Z8_R1: case Z8_R2: case Z8_R3: case Z8_R4: case Z8_R5: case Z8_R6: case Z8_R7: case Z8_R8: case Z8_R9: case Z8_R10: case Z8_R11: case Z8_R12: case Z8_R13: case Z8_R14: case Z8_R15: { auto dis = machine().disable_side_effects(); - m_fake_r[entry.index() - Z8_R0] = register_read((m_rp & 0xf0) + (entry.index() - Z8_R0)); + m_fake_r[entry.index() - Z8_R0] = register_read(m_rp + (entry.index() - Z8_R0)); break; } @@ -1551,60 +1224,29 @@ void z8_device::execute_set_input(int inputnum, int state) { switch ( inputnum ) { - case INPUT_LINE_IRQ0: - if (state != CLEAR_LINE && m_irq_line[0] == CLEAR_LINE) - request_interrupt(0); - m_irq_line[0] = state; - - if (state != CLEAR_LINE && (m_input[3] & Z8_P3_IRQ0) != 0) - m_input[3] &= ~Z8_P3_IRQ0; - else if (state == CLEAR_LINE && (m_input[3] & Z8_P3_IRQ0) == 0) - m_input[3] |= Z8_P3_IRQ0; - - break; - - case INPUT_LINE_IRQ1: - if (state != CLEAR_LINE && m_irq_line[1] == CLEAR_LINE) - request_interrupt(1); - m_irq_line[1] = state; - - if (state != CLEAR_LINE && (m_input[3] & Z8_P3_IRQ1) != 0) - m_input[3] &= ~Z8_P3_IRQ1; - else if (state == CLEAR_LINE && (m_input[3] & Z8_P3_IRQ1) == 0) - m_input[3] |= Z8_P3_IRQ1; - - break; - - case INPUT_LINE_IRQ2: - if (state != CLEAR_LINE && m_irq_line[2] == CLEAR_LINE) - request_interrupt(2); - m_irq_line[2] = state; - - if (state != CLEAR_LINE && (m_input[3] & Z8_P3_IRQ2) != 0) - { - m_input[3] &= ~Z8_P3_IRQ2; - if ((m_pre[1] & Z8_PRE1_INTERNAL_CLOCK) == 0) - t1_trigger(); - } - else if (state == CLEAR_LINE && (m_input[3] & Z8_P3_IRQ2) == 0) - { - m_input[3] |= Z8_P3_IRQ2; - if ((m_pre[1] & Z8_PRE1_INTERNAL_CLOCK) == 0 && (m_tmr & Z8_TMR_TIN_MASK) == Z8_TMR_TIN_GATE) - timer_start<1>(); - } + case INPUT_LINE_IRQ0: + if (state != CLEAR_LINE && m_irq_line[0] == CLEAR_LINE) + request_interrupt(0); + m_irq_line[0] = state; + break; - break; + case INPUT_LINE_IRQ1: + if (state != CLEAR_LINE && m_irq_line[1] == CLEAR_LINE) + request_interrupt(1); + m_irq_line[1] = state; + break; - case INPUT_LINE_IRQ3: - if (state != CLEAR_LINE && m_irq_line[3] == CLEAR_LINE && (m_p3m & Z8_P3M_P3_SERIAL) == 0) - request_interrupt(3); - m_irq_line[3] = state; + case INPUT_LINE_IRQ2: + if (state != CLEAR_LINE && m_irq_line[2] == CLEAR_LINE) + request_interrupt(2); + m_irq_line[2] = state; + break; - if (state != CLEAR_LINE && (m_input[3] & Z8_P3_IRQ3) != 0) - m_input[3] &= ~Z8_P3_IRQ3; - else if (state == CLEAR_LINE && (m_input[3] & Z8_P3_IRQ3) == 0) - m_input[3] |= Z8_P3_IRQ3; + case INPUT_LINE_IRQ3: + if (state != CLEAR_LINE && m_irq_line[3] == CLEAR_LINE) + request_interrupt(3); + m_irq_line[3] = state; + break; - break; } } |