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author AJR <ajrhacker@users.noreply.github.com>2022-03-27 14:23:03 -0400
committer AJR <ajrhacker@users.noreply.github.com>2022-03-27 14:29:51 -0400
commitc7597225b4f0a3531d53dd806048b136956eb850 (patch)
tree3ed5b758cbd0a94a43d9c6fe9f83f402b169657d /src/devices/cpu/tms32031/dis32031.cpp
parentc3162e739d625d31ca207ab8b591ea87c5f1fe03 (diff)
Debugger feature improvements
- Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core
Diffstat (limited to 'src/devices/cpu/tms32031/dis32031.cpp')
-rw-r--r--src/devices/cpu/tms32031/dis32031.cpp10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/devices/cpu/tms32031/dis32031.cpp b/src/devices/cpu/tms32031/dis32031.cpp
index 9967e6b8829..b157f437b90 100644
--- a/src/devices/cpu/tms32031/dis32031.cpp
+++ b/src/devices/cpu/tms32031/dis32031.cpp
@@ -477,6 +477,8 @@ offs_t tms32031_disassembler::disassemble(std::ostream &stream, offs_t pc, const
char temp[10];
sprintf(temp, "B%s%s", condition[(op >> 16) & 31], ((op >> 21) & 1) ? "D" : "");
util::stream_format(stream, "%-6s%s", temp, regname[op & 31]);
+ if (((op >> 16) & 31) != 0)
+ flags = STEP_COND | ((op >> 21) & 1 ? step_over_extra(1) : 0);
break;
}
@@ -485,6 +487,8 @@ offs_t tms32031_disassembler::disassemble(std::ostream &stream, offs_t pc, const
char temp[10];
sprintf(temp, "B%s%s", condition[(op >> 16) & 31], ((op >> 21) & 1) ? "D" : "");
util::stream_format(stream, "%-6s$%06X", temp, (pc + (((op >> 21) & 1) ? 3 : 1) + (int16_t)op) & 0xffffff);
+ if (((op >> 16) & 31) != 0)
+ flags = STEP_COND | ((op >> 21) & 1 ? step_over_extra(1) : 0);
break;
}
@@ -494,6 +498,7 @@ offs_t tms32031_disassembler::disassemble(std::ostream &stream, offs_t pc, const
char temp[10];
sprintf(temp, "DB%s%s", condition[(op >> 16) & 31], ((op >> 21) & 1) ? "D" : "");
util::stream_format(stream, "%-6sAR%d,%s", temp, (op >> 22) & 7, regname[op & 31]);
+ flags = STEP_COND | ((op >> 21) & 1 ? step_over_extra(1) : 0);
break;
}
@@ -502,6 +507,7 @@ offs_t tms32031_disassembler::disassemble(std::ostream &stream, offs_t pc, const
char temp[10];
sprintf(temp, "DB%s%s", condition[(op >> 16) & 31], ((op >> 21) & 1) ? "D" : "");
util::stream_format(stream, "%-6sAR%d,$%06X", temp, (op >> 22) & 7, (pc + (((op >> 21) & 1) ? 3 : 1) + (int16_t)op) & 0xffffff);
+ flags = STEP_COND | ((op >> 21) & 1 ? step_over_extra(1) : 0);
break;
}
@@ -537,12 +543,12 @@ offs_t tms32031_disassembler::disassemble(std::ostream &stream, offs_t pc, const
case 0x0f0:
util::stream_format(stream, "RETI%s", condition[(op >> 16) & 31]);
- flags = STEP_OUT;
+ flags = STEP_OUT | (((op >> 16) & 31) != 0 ? STEP_COND : 0);
break;
case 0x0f1:
util::stream_format(stream, "RETS%s", condition[(op >> 16) & 31]);
- flags = STEP_OUT;
+ flags = STEP_OUT | (((op >> 16) & 31) != 0 ? STEP_COND : 0);
break;