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author Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:42 +0200
committer Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:57 +0200
commit22513fb6fe281f5ccb75aaddb6417a12a66c313d (patch)
tree3cf84032cc6482d685a8dbb57e015bd17c7f7fdc /src/devices/cpu/tms32010/tms32010.h
parente42c2d2874cf9c1092c01ab5ce9ef997d465ce25 (diff)
emumem: A little more speedup. cache and specific change syntax, and are not pointers anymore [O. Galibert]
The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
Diffstat (limited to 'src/devices/cpu/tms32010/tms32010.h')
-rw-r--r--src/devices/cpu/tms32010/tms32010.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/devices/cpu/tms32010/tms32010.h b/src/devices/cpu/tms32010/tms32010.h
index 247c9546a47..beebee1b0b0 100644
--- a/src/devices/cpu/tms32010/tms32010.h
+++ b/src/devices/cpu/tms32010/tms32010.h
@@ -101,10 +101,10 @@ private:
uint16_t m_memaccess;
int m_addr_mask;
- address_space *m_program;
- memory_access_cache<1, -1, ENDIANNESS_BIG> *m_cache;
- address_space *m_data;
- address_space *m_io;
+ memory_access<12, 1, -1, ENDIANNESS_BIG>::cache m_cache;
+ memory_access<12, 1, -1, ENDIANNESS_BIG>::specific m_program;
+ memory_access< 8, 1, -1, ENDIANNESS_BIG>::specific m_data;
+ memory_access< 4, 1, -1, ENDIANNESS_BIG>::specific m_io;
inline void CLR(uint16_t flag);
inline void SET_FLAG(uint16_t flag);