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author hap <happppp@users.noreply.github.com>2017-12-21 23:50:29 +0100
committer hap <happppp@users.noreply.github.com>2017-12-21 23:50:29 +0100
commite08f42a74eafacdbd3551afa821aa9c384640123 (patch)
tree0e69e262afbde9224a2d7d3d3ddd7f39eb4ca098 /src/devices/cpu/tms1000/tms1000c.cpp
parentbb0de21e6755b8508b7f002bc15da56bfca68506 (diff)
tms1000c: added correct microinstructions pla (nw)
Diffstat (limited to 'src/devices/cpu/tms1000/tms1000c.cpp')
-rw-r--r--src/devices/cpu/tms1000/tms1000c.cpp66
1 files changed, 66 insertions, 0 deletions
diff --git a/src/devices/cpu/tms1000/tms1000c.cpp b/src/devices/cpu/tms1000/tms1000c.cpp
new file mode 100644
index 00000000000..f6287012d16
--- /dev/null
+++ b/src/devices/cpu/tms1000/tms1000c.cpp
@@ -0,0 +1,66 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+/*
+
+ TMS1000 family - TMS1000C
+
+ TODO:
+ - add TMS1200C (has L input pins like TMS1600)
+
+*/
+
+#include "emu.h"
+#include "tms1000c.h"
+
+// TMS1000 CMOS versions (3-level stack, HALT pin)
+// - RAM at top-left, ROM at top-right(rotate CCW)
+// - ROM ordering is different:
+// * row select is linear (0-63)
+// * bit select is 7-0 instead of 0-7
+// * page select doesn't flip in the middle
+// - 32-term mpla at bottom-right, different order
+// - 32-term opla at bottom-left, ordered O7-O0(0 or 1), and A8,4,2,1,S
+DEFINE_DEVICE_TYPE(TMS1000C, tms1000c_cpu_device, "tms1000c", "TMS1000C") // 28-pin SDIP, 10 R pins
+
+
+// internal memory maps
+static ADDRESS_MAP_START(program_10bit_8, AS_PROGRAM, 8, tms1k_base_device)
+ AM_RANGE(0x000, 0x3ff) AM_ROM
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START(data_64x4, AS_DATA, 8, tms1k_base_device)
+ AM_RANGE(0x00, 0x3f) AM_RAM
+ADDRESS_MAP_END
+
+
+// device definitions
+tms1000c_cpu_device::tms1000c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : tms1000_cpu_device(mconfig, TMS1000C, tag, owner, clock, 8 /* o pins */, 10 /* r pins */, 6 /* pc bits */, 8 /* byte width */, 2 /* x width */, 10 /* prg width */, ADDRESS_MAP_NAME(program_10bit_8), 6 /* data width */, ADDRESS_MAP_NAME(data_64x4))
+{
+}
+
+
+// machine configs
+MACHINE_CONFIG_MEMBER(tms1000c_cpu_device::device_add_mconfig)
+
+ // microinstructions PLA, output PLA
+ MCFG_PLA_ADD("mpla", 8, 16, 32)
+ MCFG_PLA_FILEFORMAT(BERKELEY)
+ MCFG_PLA_ADD("opla", 5, 8, 32)
+ MCFG_PLA_FILEFORMAT(BERKELEY)
+MACHINE_CONFIG_END
+
+
+// microinstructions decode (different order, no active-negative)
+u32 tms1000c_cpu_device::decode_micro(u8 sel)
+{
+ const u32 md[16] = { M_AUTY, M_AUTA, M_STSL, M_NE, M_C8, M_CIN, M_CKP, M_YTP, M_MTP, M_NATN, M_CKN, M_MTN, M_ATN, M_15TN, M_CKM, M_STO };
+ u16 mask = m_mpla->read(sel);
+ u32 decode = 0;
+
+ for (int bit = 0; bit < 16; bit++)
+ if (mask & (1 << bit))
+ decode |= md[bit];
+
+ return decode;
+}