diff options
author | 2022-06-16 12:47:52 +0200 | |
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committer | 2025-04-29 23:06:41 +0200 | |
commit | 45d4cd52a8194f2ef9e0383cfb2e2a35634af6ff (patch) | |
tree | 4e8d8fcb7382a5e9e0bce5ec59939bcfbe67155a /src/devices/cpu/mips/mips1.cpp | |
parent | 5c14bcdfcb4aefb71b5b62387c4ad05dbeb3814e (diff) |
full xtal conversionxtal
Diffstat (limited to 'src/devices/cpu/mips/mips1.cpp')
-rw-r--r-- | src/devices/cpu/mips/mips1.cpp | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/devices/cpu/mips/mips1.cpp b/src/devices/cpu/mips/mips1.cpp index 6f45a954d50..824cd47e762 100644 --- a/src/devices/cpu/mips/mips1.cpp +++ b/src/devices/cpu/mips/mips1.cpp @@ -55,7 +55,7 @@ DEFINE_DEVICE_TYPE(SONYPS2_IOP, iop_device, "sonyiop", "Sony Playstation 2 ALLOW_SAVE_TYPE(mips1core_device_base::branch_state); -mips1core_device_base::mips1core_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size) +mips1core_device_base::mips1core_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, const XTAL &clock, u32 cpurev, size_t icache_size, size_t dcache_size) : cpu_device(mconfig, type, tag, owner, clock) , m_program_config_be("program", ENDIANNESS_BIG, 32, 32) , m_program_config_le("program", ENDIANNESS_LITTLE, 32, 32) @@ -70,64 +70,64 @@ mips1core_device_base::mips1core_device_base(machine_config const &mconfig, devi { } -mips1_device_base::mips1_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size) +mips1_device_base::mips1_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, const XTAL &clock, u32 cpurev, size_t icache_size, size_t dcache_size) : mips1core_device_base(mconfig, type, tag, owner, clock, cpurev, icache_size, dcache_size) , m_fcr0(0) { } -r2000_device::r2000_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size, size_t dcache_size) +r2000_device::r2000_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size, size_t dcache_size) : mips1_device_base(mconfig, R2000, tag, owner, clock, 0x0100, icache_size, dcache_size) { } -r2000a_device::r2000a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size, size_t dcache_size) +r2000a_device::r2000a_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size, size_t dcache_size) : mips1_device_base(mconfig, R2000A, tag, owner, clock, 0x0210, icache_size, dcache_size) { } -r3000_device::r3000_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size, size_t dcache_size) +r3000_device::r3000_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size, size_t dcache_size) : mips1_device_base(mconfig, R3000, tag, owner, clock, 0x0220, icache_size, dcache_size) { } -r3000a_device::r3000a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size, size_t dcache_size) +r3000a_device::r3000a_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size, size_t dcache_size) : mips1_device_base(mconfig, R3000A, tag, owner, clock, 0x0230, icache_size, dcache_size) { } -r3041_device::r3041_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) +r3041_device::r3041_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock) : mips1core_device_base(mconfig, R3041, tag, owner, clock, 0x0700, 2048, 512) { } -r3051_device::r3051_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) +r3051_device::r3051_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock) : mips1core_device_base(mconfig, R3051, tag, owner, clock, 0x0200, 4096, 2048) { } -r3052_device::r3052_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) +r3052_device::r3052_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock) : mips1core_device_base(mconfig, R3052, tag, owner, clock, 0x0200, 8192, 2048) { } -r3052e_device::r3052e_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) +r3052e_device::r3052e_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock) : mips1_device_base(mconfig, R3052E, tag, owner, clock, 0x0200, 8192, 2048) { } -r3071_device::r3071_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size, size_t dcache_size) +r3071_device::r3071_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size, size_t dcache_size) : mips1_device_base(mconfig, R3071, tag, owner, clock, 0x0200, icache_size, dcache_size) { } -r3081_device::r3081_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size, size_t dcache_size) +r3081_device::r3081_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock, size_t icache_size, size_t dcache_size) : mips1_device_base(mconfig, R3081, tag, owner, clock, 0x0200, icache_size, dcache_size) { set_fpu(0x0300); } -iop_device::iop_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) +iop_device::iop_device(machine_config const &mconfig, char const *tag, device_t *owner, const XTAL &clock) : mips1core_device_base(mconfig, SONYPS2_IOP, tag, owner, clock, 0x001f, 4096, 1024) { m_endianness = ENDIANNESS_LITTLE; |