diff options
author | 2018-10-25 23:08:48 -0400 | |
---|---|---|
committer | 2018-10-25 23:28:13 -0400 | |
commit | 69b071a5332a045b3ec7295264118949881397de (patch) | |
tree | 30fc666482a80bed7d7f658bd63f316b654be0a0 /src/devices/cpu/mcs96 | |
parent | d6e77a5df0740f7075c7b5edeff3fc38cba4837b (diff) |
Improve MCS-96 (i8x9x) disassembly
- Properly decode names of directly addressed SFRs. This involves a major refactoring of the instruction execution/description unit to keep track of operand sizes and write-only destinations (since 8X9X maps numerous write-only SFRs to the same addresses as read-only SFRs).
- Correct operand size for immediate modes of ADDCB and SUBCB and indexed mode of MULB.
- Correct destination register for execution of the indexed mode of 2-argument ANDB.
- Correct assembler syntax of JBC and JBS (the bit specifier follows the register).
Diffstat (limited to 'src/devices/cpu/mcs96')
-rw-r--r-- | src/devices/cpu/mcs96/i8x9xd.cpp | 67 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/i8x9xd.h | 4 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/i8xc196.h | 12 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/mcs96.h | 108 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/mcs96d.cpp | 333 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/mcs96d.h | 54 | ||||
-rw-r--r-- | src/devices/cpu/mcs96/mcs96ops.lst | 473 |
7 files changed, 664 insertions, 387 deletions
diff --git a/src/devices/cpu/mcs96/i8x9xd.cpp b/src/devices/cpu/mcs96/i8x9xd.cpp index 40b66d9d492..11bfbce3f72 100644 --- a/src/devices/cpu/mcs96/i8x9xd.cpp +++ b/src/devices/cpu/mcs96/i8x9xd.cpp @@ -15,5 +15,72 @@ i8x9x_disassembler::i8x9x_disassembler() : mcs96_disassembler(disasm_entries) { } +std::string i8x9x_disassembler::regname8(uint8_t reg, bool is_dest) const +{ + switch(reg) { + case 0x02: + return is_dest ? "ad_command" : "ad_result_lo"; + + case 0x03: + return is_dest ? "hsi_mode" : "ad_result_hi"; + + case 0x06: + return is_dest ? "hso_command" : "hsi_status"; + + case 0x07: + return "sbuf"; + + case 0x0a: + if (is_dest) + return "watchdog"; + break; + + case 0x0e: + return is_dest ? "baud_rate" : "port0"; + + case 0x0f: + return "port1"; + + case 0x10: + return "port2"; + + case 0x11: + return is_dest ? "sp_con" : "sp_stat"; + + case 0x15: + return is_dest ? "ioc0" : "ios0"; + + case 0x16: + return is_dest ? "ioc1" : "ios1"; + + case 0x17: + if (is_dest) + return "pwm_control"; + break; + } + + return mcs96_disassembler::regname8(reg, is_dest); +} + +std::string i8x9x_disassembler::regname16(uint8_t reg, bool is_dest) const +{ + switch(reg) { + case 0x04: + return is_dest ? "hso_time" : "hsi_time"; + + case 0x0a: + if (!is_dest) + return "timer1"; + break; + + case 0x0c: + if (!is_dest) + return "timer2"; + break; + } + + return mcs96_disassembler::regname16(reg, is_dest); +} + #include "cpu/mcs96/i8x9xd.hxx" diff --git a/src/devices/cpu/mcs96/i8x9xd.h b/src/devices/cpu/mcs96/i8x9xd.h index 72227f7933f..6abf4f6e0fb 100644 --- a/src/devices/cpu/mcs96/i8x9xd.h +++ b/src/devices/cpu/mcs96/i8x9xd.h @@ -19,6 +19,10 @@ public: i8x9x_disassembler(); virtual ~i8x9x_disassembler() = default; +protected: + virtual std::string regname8(uint8_t reg, bool is_dest) const override; + virtual std::string regname16(uint8_t reg, bool is_dest) const override; + private: static const disasm_entry disasm_entries[0x100]; }; diff --git a/src/devices/cpu/mcs96/i8xc196.h b/src/devices/cpu/mcs96/i8xc196.h index 29f9df4544a..02d3e3d9840 100644 --- a/src/devices/cpu/mcs96/i8xc196.h +++ b/src/devices/cpu/mcs96/i8xc196.h @@ -26,13 +26,13 @@ protected: #define O(o) void o ## _196_full(); void o ## _196_partial() - O(bmov_direct_2); - O(bmovi_direct_2); - O(cmpl_direct_2); - O(djnzw_rrel8); + O(bmov_direct_2w); + O(bmovi_direct_2w); + O(cmpl_direct_2w); + O(djnzw_wrrel8); O(idlpd_none); - O(pop_indexed_1); - O(pop_indirect_1); + O(pop_indexed_1w); + O(pop_indirect_1w); O(popa_none); O(pusha_none); diff --git a/src/devices/cpu/mcs96/mcs96.h b/src/devices/cpu/mcs96/mcs96.h index 52700c1c03a..6176a90a8e4 100644 --- a/src/devices/cpu/mcs96/mcs96.h +++ b/src/devices/cpu/mcs96/mcs96.h @@ -123,34 +123,34 @@ protected: #define O(o) void o ## _full(); void o ## _partial() - O(add_direct_2); O(add_direct_3); O(add_immed_2w); O(add_immed_3w); O(add_indexed_2); O(add_indexed_3); O(add_indirect_2); O(add_indirect_3); - O(addb_direct_2); O(addb_direct_3); O(addb_immed_2b); O(addb_immed_3b); O(addb_indexed_2); O(addb_indexed_3); O(addb_indirect_2); O(addb_indirect_3); - O(addc_direct_2); O(addc_immed_2w); O(addc_indexed_2); O(addc_indirect_2); - O(addcb_direct_2); O(addcb_immed_2w); O(addcb_indexed_2); O(addcb_indirect_2); - O(and_direct_2); O(and_direct_3); O(and_immed_2w); O(and_immed_3w); O(and_indexed_2); O(and_indexed_3); O(and_indirect_2); O(and_indirect_3); - O(andb_direct_2); O(andb_direct_3); O(andb_immed_2b); O(andb_immed_3b); O(andb_indexed_2); O(andb_indexed_3); O(andb_indirect_2); O(andb_indirect_3); + O(add_direct_2w); O(add_direct_3w); O(add_immed_2w); O(add_immed_3w); O(add_indexed_2w); O(add_indexed_3w); O(add_indirect_2w); O(add_indirect_3w); + O(addb_direct_2b); O(addb_direct_3b); O(addb_immed_2b); O(addb_immed_3b); O(addb_indexed_2b); O(addb_indexed_3b); O(addb_indirect_2b); O(addb_indirect_3b); + O(addc_direct_2w); O(addc_immed_2w); O(addc_indexed_2w); O(addc_indirect_2w); + O(addcb_direct_2b); O(addcb_immed_2b); O(addcb_indexed_2b); O(addcb_indirect_2b); + O(and_direct_2w); O(and_direct_3w); O(and_immed_2w); O(and_immed_3w); O(and_indexed_2w); O(and_indexed_3w); O(and_indirect_2w); O(and_indirect_3w); + O(andb_direct_2b); O(andb_direct_3b); O(andb_immed_2b); O(andb_immed_3b); O(andb_indexed_2b); O(andb_indexed_3b); O(andb_indirect_2b); O(andb_indirect_3b); O(br_indirect_1n); - O(clr_direct_1); - O(clrb_direct_1); + O(clr_direct_1w); + O(clrb_direct_1b); O(clrc_none); O(clrvt_none); - O(cmp_direct_2); O(cmp_immed_2w); O(cmp_indexed_2); O(cmp_indirect_2); - O(cmpb_direct_2); O(cmpb_immed_2b); O(cmpb_indexed_2); O(cmpb_indirect_2); - O(dec_direct_1); - O(decb_direct_1); + O(cmp_direct_2w); O(cmp_immed_2w); O(cmp_indexed_2w); O(cmp_indirect_2w); + O(cmpb_direct_2b); O(cmpb_immed_2b); O(cmpb_indexed_2b); O(cmpb_indirect_2b); + O(dec_direct_1w); + O(decb_direct_1b); O(di_none); - O(div_direct_2); O(div_immed_2w); O(div_indexed_2); O(div_indirect_2); - O(divb_direct_2); O(divb_immed_2b); O(divb_indexed_2); O(divb_indirect_2); - O(divu_direct_2); O(divu_immed_2w); O(divu_indexed_2); O(divu_indirect_2); - O(divub_direct_2); O(divub_immed_2b); O(divub_indexed_2); O(divub_indirect_2); + O(div_direct_2w); O(div_immed_2w); O(div_indexed_2w); O(div_indirect_2w); + O(divb_direct_2e); O(divb_immed_2e); O(divb_indexed_2w); O(divb_indirect_2w); + O(divu_direct_2w); O(divu_immed_2w); O(divu_indexed_2w); O(divu_indirect_2w); + O(divub_direct_2e); O(divub_immed_2e); O(divub_indexed_2w); O(divub_indirect_2w); O(djnz_rrel8); - O(djnzw_rrel8); + O(djnzw_wrrel8); O(ei_none); - O(ext_direct_1); - O(extb_direct_1); + O(ext_direct_1w); + O(extb_direct_1b); O(idlpd_none); - O(inc_direct_1); - O(incb_direct_1); + O(inc_direct_1w); + O(incb_direct_1b); O(jbc_brrel8); O(jbs_brrel8); O(jc_rel8); @@ -170,53 +170,53 @@ protected: O(jv_rel8); O(jvt_rel8); O(lcall_rel16); - O(ld_direct_2); O(ld_immed_2w); O(ld_indexed_2); O(ld_indirect_2); - O(ldb_direct_2); O(ldb_immed_2b); O(ldb_indexed_2); O(ldb_indirect_2); - O(ldbse_direct_2); O(ldbse_immed_2b); O(ldbse_indexed_2); O(ldbse_indirect_2); - O(ldbze_direct_2); O(ldbze_immed_2b); O(ldbze_indexed_2); O(ldbze_indirect_2); + O(ld_direct_2w); O(ld_immed_2w); O(ld_indexed_2w); O(ld_indirect_2w); + O(ldb_direct_2b); O(ldb_immed_2b); O(ldb_indexed_2b); O(ldb_indirect_2b); + O(ldbse_direct_2e); O(ldbse_immed_2e); O(ldbse_indexed_2w); O(ldbse_indirect_2w); + O(ldbze_direct_2e); O(ldbze_immed_2e); O(ldbze_indexed_2w); O(ldbze_indirect_2w); O(ljmp_rel16); - O(mul_direct_2); O(mul_direct_3); O(mul_immed_2w); O(mul_immed_3w); O(mul_indexed_2); O(mul_indexed_3); O(mul_indirect_2); O(mul_indirect_3); - O(mulb_direct_2); O(mulb_direct_3); O(mulb_immed_2b); O(mulb_immed_3b); O(mulb_indexed_2); O(mulb_indexed_3); O(mulb_indirect_2); O(mulb_indirect_3); - O(mulu_direct_2); O(mulu_direct_3); O(mulu_immed_2w); O(mulu_immed_3w); O(mulu_indexed_2); O(mulu_indexed_3); O(mulu_indirect_2); O(mulu_indirect_3); - O(mulub_direct_2); O(mulub_direct_3); O(mulub_immed_2b); O(mulub_immed_3b); O(mulub_indexed_2); O(mulub_indexed_3); O(mulub_indirect_2); O(mulub_indirect_3); - O(neg_direct_1); - O(negb_direct_1); + O(mul_direct_2w); O(mul_direct_3w); O(mul_immed_2w); O(mul_immed_3w); O(mul_indexed_2w); O(mul_indexed_3w); O(mul_indirect_2w); O(mul_indirect_3w); + O(mulb_direct_2b); O(mulb_direct_3e); O(mulb_immed_2b); O(mulb_immed_3e); O(mulb_indexed_2b); O(mulb_indexed_3e); O(mulb_indirect_2b); O(mulb_indirect_3e); + O(mulu_direct_2w); O(mulu_direct_3w); O(mulu_immed_2w); O(mulu_immed_3w); O(mulu_indexed_2w); O(mulu_indexed_3w); O(mulu_indirect_2w); O(mulu_indirect_3w); + O(mulub_direct_2b); O(mulub_direct_3e); O(mulub_immed_2b); O(mulub_immed_3e); O(mulub_indexed_2b); O(mulub_indexed_3e); O(mulub_indirect_2b); O(mulub_indirect_3e); + O(neg_direct_1w); + O(negb_direct_1b); O(nop_none); - O(norml_direct_2); - O(not_direct_1); - O(notb_direct_1); - O(or_direct_2); O(or_immed_2w); O(or_indexed_2); O(or_indirect_2); - O(orb_direct_2); O(orb_immed_2b); O(orb_indexed_2); O(orb_indirect_2); - O(pop_direct_1); O(pop_indexed_1); O(pop_indirect_1); + O(norml_direct_2e); + O(not_direct_1w); + O(notb_direct_1b); + O(or_direct_2w); O(or_immed_2w); O(or_indexed_2w); O(or_indirect_2w); + O(orb_direct_2b); O(orb_immed_2b); O(orb_indexed_2b); O(orb_indirect_2b); + O(pop_direct_1w); O(pop_indexed_1w); O(pop_indirect_1w); O(popf_none); - O(push_direct_1); O(push_immed_1w); O(push_indexed_1); O(push_indirect_1); + O(push_direct_1w); O(push_immed_1w); O(push_indexed_1w); O(push_indirect_1w); O(pushf_none); O(ret_none); O(rst_none); O(scall_rel11); O(setc_none); - O(shl_immed_or_reg_2b); + O(shl_immed_or_reg_2w); O(shlb_immed_or_reg_2b); - O(shll_immed_or_reg_2b); - O(shr_immed_or_reg_2b); - O(shra_immed_or_reg_2b); + O(shll_immed_or_reg_2w); + O(shr_immed_or_reg_2w); + O(shra_immed_or_reg_2w); O(shrab_immed_or_reg_2b); - O(shral_immed_or_reg_2b); + O(shral_immed_or_reg_2w); O(shrb_immed_or_reg_2b); - O(shrl_immed_or_reg_2b); + O(shrl_immed_or_reg_2w); O(sjmp_rel11); O(skip_immed_1b); - O(st_direct_2); O(st_indexed_2); O(st_indirect_2); - O(stb_direct_2); O(stb_indexed_2); O(stb_indirect_2); - O(sub_direct_2); O(sub_direct_3); O(sub_immed_2w); O(sub_immed_3w); O(sub_indexed_2); O(sub_indexed_3); O(sub_indirect_2); O(sub_indirect_3); - O(subb_direct_2); O(subb_direct_3); O(subb_immed_2b); O(subb_immed_3b); O(subb_indexed_2); O(subb_indexed_3); O(subb_indirect_2); O(subb_indirect_3); - O(subc_direct_2); O(subc_immed_2w); O(subc_indexed_2); O(subc_indirect_2); - O(subcb_direct_2); O(subcb_immed_2w); O(subcb_indexed_2); O(subcb_indirect_2); + O(st_direct_2w); O(st_indexed_2w); O(st_indirect_2w); + O(stb_direct_2b); O(stb_indexed_2b); O(stb_indirect_2b); + O(sub_direct_2w); O(sub_direct_3w); O(sub_immed_2w); O(sub_immed_3w); O(sub_indexed_2w); O(sub_indexed_3w); O(sub_indirect_2w); O(sub_indirect_3w); + O(subb_direct_2b); O(subb_direct_3b); O(subb_immed_2b); O(subb_immed_3b); O(subb_indexed_2b); O(subb_indexed_3b); O(subb_indirect_2b); O(subb_indirect_3b); + O(subc_direct_2w); O(subc_immed_2w); O(subc_indexed_2w); O(subc_indirect_2w); + O(subcb_direct_2b); O(subcb_immed_2b); O(subcb_indexed_2b); O(subcb_indirect_2b); O(trap_none); - O(xch_direct_2); - O(xchb_direct_2); - O(xor_direct_2); O(xor_immed_2w); O(xor_indexed_2); O(xor_indirect_2); - O(xorb_direct_2); O(xorb_immed_2b); O(xorb_indexed_2); O(xorb_indirect_2); + O(xch_direct_2w); + O(xchb_direct_2b); + O(xor_direct_2w); O(xor_immed_2w); O(xor_indexed_2w); O(xor_indirect_2w); + O(xorb_direct_2b); O(xorb_immed_2b); O(xorb_indexed_2b); O(xorb_indirect_2b); O(fetch); O(fetch_noirq); diff --git a/src/devices/cpu/mcs96/mcs96d.cpp b/src/devices/cpu/mcs96/mcs96d.cpp index 1508fb3ca5f..aa6f6949fa1 100644 --- a/src/devices/cpu/mcs96/mcs96d.cpp +++ b/src/devices/cpu/mcs96/mcs96d.cpp @@ -20,16 +20,67 @@ u32 mcs96_disassembler::opcode_alignment() const return 1; } -std::string mcs96_disassembler::regname(uint8_t reg) +std::string mcs96_disassembler::regname8(uint8_t reg, bool is_dest) const { switch(reg) { + case 0x00: + return "r0"; + + case 0x08: + return "int_mask"; + + case 0x09: + return "int_pending"; + + case 0x1c: + return "al"; + + case 0x1d: + return "ah"; + + case 0x1e: + return "dl"; + + case 0x1f: + return "dh"; + + case 0x20: + return "bl"; + + case 0x21: + return "bh"; + + case 0x22: + return "cl"; + + case 0x23: + return "ch"; + + default: + return util::string_format("%02x", reg); + } +} + +std::string mcs96_disassembler::regname16(uint8_t reg, bool is_dest) const +{ + switch(reg) { + case 0x00: + return "r0"; + case 0x18: return "sp"; - break; - case 0x19: - return "sph"; - break; + case 0x1c: + return "ax"; + + case 0x1e: + return "dx"; + + case 0x20: + return "bx"; + + case 0x22: + return "cx"; default: return util::string_format("%02x", reg); @@ -37,6 +88,30 @@ std::string mcs96_disassembler::regname(uint8_t reg) } } +std::string mcs96_disassembler::regname_indirect(uint8_t reg) const +{ + if(BIT(reg, 0)) + return util::string_format("[%s]+", regname16(reg & 0xfe, false)); + else + return util::string_format("[%s]", regname16(reg, false)); + +} + +std::string mcs96_disassembler::regname_indexed(uint8_t reg, int8_t delta) const +{ + if(reg == 0x00) { + if(delta < 0) + return util::string_format("%04x", uint8_t(delta) | 0xff00); + else + return util::string_format("%02x", delta); + } else { + if(delta < 0) + return util::string_format("-%02x[%s]", -delta, regname16(reg, false)); + else + return util::string_format("%02x[%s]", delta, regname16(reg, false)); + } +} + offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms) { bool prefix_fe = false; @@ -60,14 +135,10 @@ offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const da flags |= 2; break; - case DASM_rel8: { - int delta = opcodes.r8(pc+1); - if(delta & 0x80) - delta -= 0x100; - util::stream_format(stream, " %04x", (pc+2+delta) & 0xffff); + case DASM_rel8: + util::stream_format(stream, " %04x", (pc+2+int8_t(opcodes.r8(pc+1))) & 0xffff); flags |= 2; break; - } case DASM_rel11: { int delta = ((opcodes.r8(pc) << 8) | opcodes.r8(pc+1)) & 0x7ff; @@ -78,43 +149,63 @@ offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const da break; } - case DASM_rel16: { - int delta = opcodes.r8(pc+1) | (opcodes.r8(pc+2) << 8); - util::stream_format(stream, " %04x", (pc+3+delta) & 0xffff); + case DASM_rel16: + util::stream_format(stream, " %04x", (pc+3+opcodes.r16(pc+1)) & 0xffff); flags |= 3; break; - } - case DASM_rrel8: { - int delta = opcodes.r8(pc+2); - if(delta & 0x80) - delta -= 0x100; - util::stream_format(stream, " %s, %04x", regname(opcodes.r8(pc+1)), (pc+3+delta) & 0xffff); + case DASM_rrel8: + util::stream_format(stream, " %s, %04x", regname8(opcodes.r8(pc+1), true), (pc+3+int8_t(opcodes.r8(pc+2))) & 0xffff); flags |= 3; break; - } - case DASM_brrel8: { - int delta = opcodes.r8(pc+2); - if(delta & 0x80) - delta -= 0x100; - util::stream_format(stream, " %d, %s, %04x", opcodes.r8(pc) & 7, regname(opcodes.r8(pc+1)), (pc+3+delta) & 0xffff); + case DASM_brrel8: + util::stream_format(stream, " %s, %d, %04x", regname8(opcodes.r8(pc+1), false), opcodes.r8(pc) & 7, (pc+3+int8_t(opcodes.r8(pc+2))) & 0xffff); + flags |= 3; + break; + + case DASM_wrrel8: + util::stream_format(stream, " %s, %04x", regname16(opcodes.r8(pc+1), true), (pc+3+int8_t(opcodes.r8(pc+2))) & 0xffff); flags |= 3; break; - } - case DASM_direct_1: - util::stream_format(stream, " %s", regname(opcodes.r8(pc+1))); + case DASM_direct_1b: + util::stream_format(stream, " %s", regname8(opcodes.r8(pc+1), true)); flags |= 2; break; - case DASM_direct_2: - util::stream_format(stream, " %s, %s", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1))); + case DASM_direct_1w: + util::stream_format(stream, " %s", regname16(opcodes.r8(pc+1), opcodes.r8(pc) == 0x01 || opcodes.r8(pc) == 0xcc)); + flags |= 2; + break; + + case DASM_direct_2b: + util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+2), opcodes.r8(pc) == 0xb0), regname8(opcodes.r8(pc+1), opcodes.r8(pc) == 0xc4)); flags |= 3; break; - case DASM_direct_3: - util::stream_format(stream, " %s, %s, %s", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1))); + case DASM_direct_2e: + util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), (opcodes.r8(pc) & 0xef) == 0xac), regname8(opcodes.r8(pc+1), opcodes.r8(pc) == 0x0f)); + flags |= 3; + break; + + case DASM_direct_2w: + util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), opcodes.r8(pc) == 0xa0), regname16(opcodes.r8(pc+1), opcodes.r8(pc) == 0xc0)); + flags |= 3; + break; + + case DASM_direct_3b: + util::stream_format(stream, " %s, %s, %s", regname8(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false)); + flags |= 4; + break; + + case DASM_direct_3e: + util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false)); + flags |= 4; + break; + + case DASM_direct_3w: + util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname16(opcodes.r8(pc+2), false), regname16(opcodes.r8(pc+1), false)); flags |= 4; break; @@ -124,147 +215,169 @@ offs_t mcs96_disassembler::disassemble(std::ostream &stream, offs_t pc, const da break; case DASM_immed_2b: - util::stream_format(stream, " %s, #%02x", regname(opcodes.r8(pc+2)), opcodes.r8(pc+1)); + util::stream_format(stream, " %s, #%02x", regname8(opcodes.r8(pc+2), opcodes.r8(pc) == 0xb1), opcodes.r8(pc+1)); + flags |= 3; + break; + + case DASM_immed_2e: + util::stream_format(stream, " %s, #%02x", regname16(opcodes.r8(pc+2), (opcodes.r8(pc) & 0xef) == 0xad), opcodes.r8(pc+1)); flags |= 3; break; case DASM_immed_or_reg_2b: if(opcodes.r8(pc+1) >= 0x10) - util::stream_format(stream, " %s, %s", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1))); + util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false)); else - util::stream_format(stream, " %s, #%02x", regname(opcodes.r8(pc+2)), opcodes.r8(pc+1)); + util::stream_format(stream, " %s, #%02x", regname8(opcodes.r8(pc+2), false), opcodes.r8(pc+1)); flags |= 3; break; case DASM_immed_3b: - util::stream_format(stream, " %s, %s, #%02x", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), opcodes.r8(pc+1)); + util::stream_format(stream, " %s, %s, #%02x", regname8(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), opcodes.r8(pc+1)); + flags |= 4; + break; + + case DASM_immed_3e: + util::stream_format(stream, " %s, %s, #%02x", regname16(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), opcodes.r8(pc+1)); flags |= 4; break; case DASM_immed_1w: - util::stream_format(stream, " #%02x%02x", opcodes.r8(pc+2), opcodes.r8(pc+1)); + util::stream_format(stream, " #%04x", opcodes.r16(pc+1)); flags |= 3; break; case DASM_immed_2w: - util::stream_format(stream, " %s, #%02x%02x", regname(opcodes.r8(pc+3)), opcodes.r8(pc+2), opcodes.r8(pc+1)); + util::stream_format(stream, " %s, #%04x", regname16(opcodes.r8(pc+3), opcodes.r8(pc) == 0xa1), opcodes.r16(pc+1)); flags |= 4; break; + case DASM_immed_or_reg_2w: + if(opcodes.r8(pc+1) >= 0x10) + util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), false), regname8(opcodes.r8(pc+1), false)); + else + util::stream_format(stream, " %s, #%02x", regname16(opcodes.r8(pc+2), false), opcodes.r8(pc+1)); + flags |= 3; + break; + case DASM_immed_3w: - util::stream_format(stream, " %s, %s, #%02x%02x", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), opcodes.r8(pc+2), opcodes.r8(pc+1)); + util::stream_format(stream, " %s, %s, #%04x", regname16(opcodes.r8(pc+4), true), regname16(opcodes.r8(pc+3), false), opcodes.r16(pc+1)); flags |= 5; break; case DASM_indirect_1n: - util::stream_format(stream, " [%s]", regname(opcodes.r8(pc+1))); + util::stream_format(stream, " [%s]", regname16(opcodes.r8(pc+1), false)); + flags |= 2; + break; + + case DASM_indirect_1w: + util::stream_format(stream, " %s", regname_indirect(opcodes.r8(pc+1))); flags |= 2; break; - case DASM_indirect_1: + case DASM_indirect_2b: + util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+2), opcodes.r8(pc) == 0xb2), regname_indirect(opcodes.r8(pc+1))); + flags |= 3; + break; + + case DASM_indirect_2w: + util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+2), opcodes.r8(pc) == 0xa2), regname_indirect(opcodes.r8(pc+1))); + flags |= 3; + break; + + case DASM_indirect_3b: + util::stream_format(stream, " %s, %s, %s", regname8(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname_indirect(opcodes.r8(pc+1))); + flags |= 4; + break; + + case DASM_indirect_3e: + util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname8(opcodes.r8(pc+2), false), regname_indirect(opcodes.r8(pc+1))); + flags |= 4; + break; + + case DASM_indirect_3w: + util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+3), true), regname16(opcodes.r8(pc+2), false), regname_indirect(opcodes.r8(pc+1))); + flags |= 4; + break; + + case DASM_indexed_1w: if(opcodes.r8(pc+1) & 0x01) { - util::stream_format(stream, " [%s]+", regname(opcodes.r8(pc+1)-1)); - flags |= 2; + if(opcodes.r8(pc+1) == 0x01) + util::stream_format(stream, " %04x", opcodes.r16(pc+2)); + else + util::stream_format(stream, " %04x[%s]", opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false)); + flags |= 4; } else { - util::stream_format(stream, " [%s]", regname(opcodes.r8(pc+1))); - flags |= 2; + util::stream_format(stream, "%s", regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2))); + flags |= 3; } break; - case DASM_indirect_2: + case DASM_indexed_2b: { + bool is_dest = opcodes.r8(pc) == 0xb3; if(opcodes.r8(pc+1) & 0x01) { - util::stream_format(stream, " %s, [%s]+", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)-1)); - flags |= 3; + if(opcodes.r8(pc+1) == 0x01) + util::stream_format(stream, " %s, %04x", regname8(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2)); + else + util::stream_format(stream, " %s, %04x[%s]", regname8(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false)); + flags |= 5; } else { - util::stream_format(stream, " %s, [%s]", regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1))); - flags |= 3; + util::stream_format(stream, " %s, %s", regname8(opcodes.r8(pc+3), is_dest), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2))); + flags |= 4; } break; + } - case DASM_indirect_3: + case DASM_indexed_2w: { + bool is_dest = opcodes.r8(pc) == 0xa3 || (opcodes.r8(pc) & 0xef) == 0xaf; if(opcodes.r8(pc+1) & 0x01) { - util::stream_format(stream, " %s, %s, [%s]+", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1)-1)); - flags |= 4; + if(opcodes.r8(pc+1) == 0x01) + util::stream_format(stream, " %s, %04x", regname16(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2)); + else + util::stream_format(stream, " %s, %04x[%s]", regname16(opcodes.r8(pc+4), is_dest), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false)); + flags |= 5; } else { - util::stream_format(stream, " %s, %s, [%s]", regname(opcodes.r8(pc+3)), regname(opcodes.r8(pc+2)), regname(opcodes.r8(pc+1))); + util::stream_format(stream, " %s, %s", regname16(opcodes.r8(pc+3), is_dest), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2))); flags |= 4; } break; + } - case DASM_indexed_1: + case DASM_indexed_3b: if(opcodes.r8(pc+1) & 0x01) { if(opcodes.r8(pc+1) == 0x01) - util::stream_format(stream, " %02x%02x", opcodes.r8(pc+3), opcodes.r8(pc+2)); + util::stream_format(stream, " %s, %s, %04x", regname8(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2)); else - util::stream_format(stream, " %02x%02x[%s]", opcodes.r8(pc+3), opcodes.r8(pc+2), regname(opcodes.r8(pc+1)-1)); - flags |= 4; + util::stream_format(stream, " %s, %s, %04x[%s]", regname8(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false)); + flags |= 6; } else { - int delta = opcodes.r8(pc+2); - if(delta & 0x80) - delta -= 0x100; - if(opcodes.r8(pc+1) == 0x00) { - if(delta < 0) - util::stream_format(stream, " %04x", delta & 0xffff); - else - util::stream_format(stream, " %02x", delta); - } else { - if(delta < 0) - util::stream_format(stream, " -%02x[%s]", -delta, regname(opcodes.r8(pc+1))); - else - util::stream_format(stream, " %02x[%s]", delta, regname(opcodes.r8(pc+1))); - } - flags |= 3; + util::stream_format(stream, " %s, %s, %s", regname8(opcodes.r8(pc+4), true), regname8(opcodes.r8(pc+3), false), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2))); + flags |= 5; } break; - case DASM_indexed_2: + case DASM_indexed_3e: if(opcodes.r8(pc+1) & 0x01) { if(opcodes.r8(pc+1) == 0x01) - util::stream_format(stream, " %s, %02x%02x", regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2)); + util::stream_format(stream, " %s, %s, %04x", regname16(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2)); else - util::stream_format(stream, " %s, %02x%02x[%s]", regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2), regname(opcodes.r8(pc+1)-1)); - flags |= 5; + util::stream_format(stream, " %s, %s, %04x[%s]", regname16(opcodes.r8(pc+5), true), regname8(opcodes.r8(pc+4), false), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false)); + flags |= 6; } else { - int delta = opcodes.r8(pc+2); - if(delta & 0x80) - delta -= 0x100; - if(opcodes.r8(pc+1) == 0x00) { - if(delta < 0) - util::stream_format(stream, " %s, %04x", regname(opcodes.r8(pc+3)), delta & 0xffff); - else - util::stream_format(stream, " %s, %02x", regname(opcodes.r8(pc+3)), delta); - } else { - if(delta < 0) - util::stream_format(stream, " %s, -%02x[%s]", regname(opcodes.r8(pc+3)), -delta, regname(opcodes.r8(pc+1))); - else - util::stream_format(stream, " %s, %02x[%s]", regname(opcodes.r8(pc+3)), delta, regname(opcodes.r8(pc+1))); - } - flags |= 4; + util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+4), true), regname8(opcodes.r8(pc+3), false), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2))); + flags |= 5; } break; - case DASM_indexed_3: + case DASM_indexed_3w: if(opcodes.r8(pc+1) & 0x01) { if(opcodes.r8(pc+1) == 0x01) - util::stream_format(stream, " %s, %s, %02x%02x", regname(opcodes.r8(pc+5)), regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2)); + util::stream_format(stream, " %s, %s, %04x", regname16(opcodes.r8(pc+5), true), regname16(opcodes.r8(pc+4), false), opcodes.r16(pc+2)); else - util::stream_format(stream, " %s, %s, %02x%02x[%s]", regname(opcodes.r8(pc+5)), regname(opcodes.r8(pc+4)), opcodes.r8(pc+3), opcodes.r8(pc+2), regname(opcodes.r8(pc+1)-1)); + util::stream_format(stream, " %s, %s, %04x[%s]", regname16(opcodes.r8(pc+5), true), regname16(opcodes.r8(pc+4), false), opcodes.r16(pc+2), regname16(opcodes.r8(pc+1)-1, false)); flags |= 6; } else { - int delta = opcodes.r8(pc+2); - if(delta & 0x80) - delta -= 0x100; - if(opcodes.r8(pc+1) == 0x00) { - if(delta < 0) - util::stream_format(stream, " %s, %s, %04x", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), delta & 0xffff); - else - util::stream_format(stream, " %s, %s, %02x", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), delta); - } else { - if(delta < 0) - util::stream_format(stream, " %s, %s, -%02x[%s]", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), -delta, regname(opcodes.r8(pc+1))); - else - util::stream_format(stream, " %s, %s, %02x[%s]", regname(opcodes.r8(pc+4)), regname(opcodes.r8(pc+3)), delta, regname(opcodes.r8(pc+1))); - } + util::stream_format(stream, " %s, %s, %s", regname16(opcodes.r8(pc+4), true), regname16(opcodes.r8(pc+3), false), regname_indexed(opcodes.r8(pc+1), opcodes.r8(pc+2))); flags |= 5; } break; diff --git a/src/devices/cpu/mcs96/mcs96d.h b/src/devices/cpu/mcs96/mcs96d.h index 453727258bf..43d4fbaf029 100644 --- a/src/devices/cpu/mcs96/mcs96d.h +++ b/src/devices/cpu/mcs96/mcs96d.h @@ -35,30 +35,48 @@ protected: DASM_rel8, /* Relative, 8 bits */ DASM_rel11, /* Relative, 11 bits */ DASM_rel16, /* Relative, 16 bits */ - DASM_rrel8, /* Register + relative, 8 bits */ + DASM_rrel8, /* Register (8-bit) + relative, 8 bits */ DASM_brrel8, /* Bit test + register + relative, 8 bits */ - DASM_direct_1, /* Register-direct references, 1 operator */ - DASM_direct_2, /* Register-direct references, 2 operators */ - DASM_direct_3, /* Register-direct references, 3 operators */ - DASM_immed_1b, /* Immediate references to byte, 1 operator */ - DASM_immed_2b, /* Immediate references to byte, 2 operators */ - DASM_immed_or_reg_2b, /* Immediate references to byte or register, 2 operators */ - DASM_immed_3b, /* Immediate references to byte, 3 operators */ - DASM_immed_1w, /* Immediate references to word, 1 operator */ - DASM_immed_2w, /* Immediate references to word, 2 operators */ - DASM_immed_3w, /* Immediate references to word, 3 operators */ + DASM_wrrel8, /* Register (16-bit) + relative, 8 bits */ + DASM_direct_1b, /* Register-direct references, 1 operator, 8 bits */ + DASM_direct_2b, /* Register-direct references, 2 operators, 8 bits */ + DASM_direct_2e, /* Register-direct references, 2 operators, 8 bits extended to 16 */ + DASM_direct_3b, /* Register-direct references, 3 operators, 8 bits */ + DASM_direct_3e, /* Register-direct references, 3 operators, 8 bits extended to 16 */ + DASM_direct_1w, /* Register-direct references, 1 operator, 16 bits */ + DASM_direct_2w, /* Register-direct references, 2 operators, 16 bits */ + DASM_direct_3w, /* Register-direct references, 3 operators, 16 bits */ + DASM_immed_1b, /* Immediate references to byte, 1 operator, 8 bits */ + DASM_immed_2b, /* Immediate references to byte, 2 operators, 8 bits */ + DASM_immed_2e, /* Immediate references to byte, 2 operators, 8 bits extended to 16 */ + DASM_immed_or_reg_2b, /* Immediate references to byte or register, 2 operators, 8 bits */ + DASM_immed_3b, /* Immediate references to byte, 3 operators, 8 bits */ + DASM_immed_3e, /* Immediate references to byte, 3 operators, 8 bits extended to 16 */ + DASM_immed_1w, /* Immediate references to word, 1 operator, 16 bits */ + DASM_immed_2w, /* Immediate references to word, 2 operators, 16 bits */ + DASM_immed_or_reg_2w, /* Immediate references to byte or register, 2 operators, 16 bits */ + DASM_immed_3w, /* Immediate references to word, 3 operators, 16 bits */ DASM_indirect_1n, /* Indirect normal, 1 operator */ - DASM_indirect_1, /* Indirect, normal or auto-incrementing, 1 operator */ - DASM_indirect_2, /* Indirect, normal or auto-incrementing, 2 operators */ - DASM_indirect_3, /* Indirect, normal or auto-incrementing, 3 operators */ - DASM_indexed_1, /* Indexed, short or long, 1 operator */ - DASM_indexed_2, /* Indexed, short or long, 2 operators */ - DASM_indexed_3 /* Indexed, short or long, 3 operators */ + DASM_indirect_1w, /* Indirect, normal or auto-incrementing, 1 operator, 16 bits */ + DASM_indirect_2b, /* Indirect, normal or auto-incrementing, 2 operators, 8 bits */ + DASM_indirect_2w, /* Indirect, normal or auto-incrementing, 2 operators, 16 bits */ + DASM_indirect_3b, /* Indirect, normal or auto-incrementing, 3 operators, 8 bits */ + DASM_indirect_3e, /* Indirect, normal or auto-incrementing, 3 operators, 8 bits extended to 16 */ + DASM_indirect_3w, /* Indirect, normal or auto-incrementing, 3 operators, 16 bits */ + DASM_indexed_1w, /* Indexed, short or long, 1 operator, 16 bits */ + DASM_indexed_2b, /* Indexed, short or long, 2 operators, 8 bits */ + DASM_indexed_2w, /* Indexed, short or long, 2 operators, 16 bits */ + DASM_indexed_3b, /* Indexed, short or long, 3 operators, 8 bits */ + DASM_indexed_3e, /* Indexed, short or long, 3 operators, 8 bits extended to 16 */ + DASM_indexed_3w /* Indexed, short or long, 3 operators, 16 bits */ }; const disasm_entry *m_entries; - static std::string regname(uint8_t reg); + virtual std::string regname8(uint8_t reg, bool is_dest) const; + virtual std::string regname16(uint8_t reg, bool is_dest) const; + std::string regname_indirect(uint8_t reg) const; + std::string regname_indexed(uint8_t reg, int8_t delta) const; }; #endif diff --git a/src/devices/cpu/mcs96/mcs96ops.lst b/src/devices/cpu/mcs96/mcs96ops.lst index 3cc5d2286bb..b8698d7a1d6 100644 --- a/src/devices/cpu/mcs96/mcs96ops.lst +++ b/src/devices/cpu/mcs96/mcs96ops.lst @@ -57,14 +57,39 @@ eadr brrel8 OP2 = read_pc(); OP1 = int8_t(read_pc()); -eadr direct_1 +eadr wrrel8 + OP2 = read_pc(); + OP1 = int8_t(read_pc()); + +eadr direct_1b + OP1 = read_pc(); + +eadr direct_2b + OP1 = read_pc(); + OP2 = read_pc(); + +eadr direct_2e + OP1 = read_pc(); + OP2 = read_pc(); + +eadr direct_3b + OP1 = read_pc(); + OP2 = read_pc(); + OP3 = read_pc(); + +eadr direct_3e + OP1 = read_pc(); + OP2 = read_pc(); + OP3 = read_pc(); + +eadr direct_1w OP1 = read_pc(); -eadr direct_2 +eadr direct_2w OP1 = read_pc(); OP2 = read_pc(); -eadr direct_3 +eadr direct_3w OP1 = read_pc(); OP2 = read_pc(); OP3 = read_pc(); @@ -76,15 +101,34 @@ eadr immed_2b OP1 = read_pc(); OP2 = read_pc(); +eadr immed_2e + OP1 = read_pc(); + OP2 = read_pc(); + eadr immed_or_reg_2b OP1 = read_pc(); OP2 = read_pc(); + if(OP1 >= 0x10) { + OP1 = reg_r8(OP1) & 0x1f; + } + +eadr immed_or_reg_2w + OP1 = read_pc(); + OP2 = read_pc(); + if(OP1 >= 0x10) { + OP1 = reg_r8(OP1) & 0x1f; + } eadr immed_3b OP1 = read_pc(); OP2 = read_pc(); OP3 = read_pc(); +eadr immed_3e + OP1 = read_pc(); + OP2 = read_pc(); + OP3 = read_pc(); + eadr immed_1w OP1 = read_pc(); OP1 |= read_pc() << 8; @@ -100,20 +144,37 @@ eadr immed_3w OP2 = read_pc(); OP3 = read_pc(); +eadr indirect_2b + OPI = read_pc(); + OP1 = reg_r16(OPI); + OP2 = read_pc(); + +eadr indirect_3b + OPI = read_pc(); + OP1 = reg_r16(OPI); + OP2 = read_pc(); + OP3 = read_pc(); + +eadr indirect_3e + OPI = read_pc(); + OP1 = reg_r16(OPI); + OP2 = read_pc(); + OP3 = read_pc(); + eadr indirect_1n OPI = read_pc() & 0xfe; OP1 = reg_r16(OPI); -eadr indirect_1 +eadr indirect_1w OPI = read_pc(); OP1 = reg_r16(OPI); -eadr indirect_2 +eadr indirect_2w OPI = read_pc(); OP1 = reg_r16(OPI); OP2 = read_pc(); -eadr indirect_3 +eadr indirect_3w OPI = read_pc(); OP1 = reg_r16(OPI); OP2 = read_pc(); @@ -127,7 +188,48 @@ macro post_indirect $size $cycles1 $cycles2 next($cycles1); // +4 when external } -eadr indexed_1 +eadr indexed_2b + OPI = read_pc(); + OP1 = read_pc(); + if(OPI & 0x01) { + OPI &= 0xfe; + OP1 |= read_pc() << 8; + } else if(OP1 & 0x80) + OP1 |= 0xff00; + if(OPI) { + OP1 += reg_r16(OPI); + } + OP2 = read_pc(); + +eadr indexed_3b + OPI = read_pc(); + OP1 = read_pc(); + if(OPI & 0x01) { + OPI &= 0xfe; + OP1 |= read_pc() << 8; + } else if(OP1 & 0x80) + OP1 |= 0xff00; + if(OPI) { + OP1 += reg_r16(OPI); + } + OP2 = read_pc(); + OP3 = read_pc(); + +eadr indexed_3e + OPI = read_pc(); + OP1 = read_pc(); + if(OPI & 0x01) { + OPI &= 0xfe; + OP1 |= read_pc() << 8; + } else if(OP1 & 0x80) + OP1 |= 0xff00; + if(OPI) { + OP1 += reg_r16(OPI); + } + OP2 = read_pc(); + OP3 = read_pc(); + +eadr indexed_1w OPI = read_pc(); OP1 = read_pc(); if(OPI & 0x01) { @@ -139,7 +241,7 @@ eadr indexed_1 OP1 += reg_r16(OPI); } -eadr indexed_2 +eadr indexed_2w OPI = read_pc(); OP1 = read_pc(); if(OPI & 0x01) { @@ -152,7 +254,7 @@ eadr indexed_2 } OP2 = read_pc(); -eadr indexed_3 +eadr indexed_3w OPI = read_pc(); OP1 = read_pc(); if(OPI & 0x01) { @@ -172,44 +274,41 @@ macro post_indexed $cycles1 $cycles2 00 skip immed_1b next(4); -01 clr direct_1 +01 clr direct_1w reg_w16(OP1, 0x0000); next(4); -02 not direct_1 +02 not direct_1w TMP = ~reg_r16(OP1); set_nz16(TMP); reg_w16(OP1, TMP); next(4); -03 neg direct_1 +03 neg direct_1w TMP = reg_r16(OP1); reg_w16(OP1, do_sub(0, TMP)); next(4); -04 xch direct_2 +04 xch direct_2w -05 dec direct_1 +05 dec direct_1w TMP = reg_r16(OP1); reg_w16(OP1, do_sub(TMP, 1)); next(4); -06 ext direct_1 +06 ext direct_1w OP1 &= 0xfc; TMP = int16_t(reg_r16(OP1)); set_nz16(TMP); reg_w16(OP1+2, TMP >> 16); next(4); -07 inc direct_1 +07 inc direct_1w TMP = reg_r16(OP1); reg_w16(OP1, do_add(TMP, 1)); next(4); -08 shr immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } +08 shr immed_or_reg_2w TMP = reg_r16(OP2); PSW &= ~(F_Z|F_N|F_C|F_V|F_ST); if(OP1 >= 2 && (TMP & (0xffff >> (OP1 <= 16 ? 17-OP1 : 0)))) @@ -224,10 +323,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP2, TMP); next(OP1 ? 7+OP1 : 8); -09 shl immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } +09 shl immed_or_reg_2w TMP = reg_r16(OP2); PSW &= ~(F_Z|F_N|F_C|F_V|F_ST); if(OP1 >= 2 && (TMP & (0xffff << (OP1 <= 16 ? 17-OP1 : 0)))) @@ -242,10 +338,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP2, TMP); next(OP1 ? 7+OP1 : 8); -0a shra immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } +0a shra immed_or_reg_2w TMP = reg_r16(OP2); PSW &= ~(F_Z|F_N|F_C|F_V|F_ST); if(OP1 >= 2 && (TMP & (0xffff >> (OP1 <= 16 ? 17-OP1 : 0)))) @@ -260,10 +353,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP2, TMP); next(OP1 ? 7+OP1 : 8); -0c shrl immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } +0c shrl immed_or_reg_2w OP2 &= 0xfc; TMP = reg_r16(OP2); TMP |= reg_r16(OP2+2) << 16; @@ -281,10 +371,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP2+2, TMP >> 16); next(OP1 ? 7+OP1 : 8); -0d shll immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } +0d shll immed_or_reg_2w OP2 &= 0xfc; TMP = reg_r16(OP2); TMP |= reg_r16(OP2+2) << 16; @@ -302,10 +389,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP2+2, TMP >> 16); next(OP1 ? 7+OP1 : 8); -0e shral immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } +0e shral immed_or_reg_2w OP2 &= 0xfc; TMP = reg_r16(OP2); TMP |= reg_r16(OP2+2) << 16; @@ -323,7 +407,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP2+2, TMP >> 16); next(OP1 ? 7+OP1 : 8); -0f norml direct_2 +0f norml direct_2e OP2 &= 0xfc; TMP = reg_r16(OP2); TMP |= reg_r16(OP2+2) << 16; @@ -336,44 +420,41 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP2+2, TMP >> 16); next(11+OP3); -11 clrb direct_1 +11 clrb direct_1b reg_w8(OP1, 0x00); next(4); -12 notb direct_1 +12 notb direct_1b TMP = ~reg_r8(OP1); set_nz8(TMP); reg_w8(OP1, TMP); next(4); -13 negb direct_1 +13 negb direct_1b TMP = reg_r8(OP1); reg_w8(OP1, do_subb(0, TMP)); next(4); -14 xchb direct_2 +14 xchb direct_2b -15 decb direct_1 +15 decb direct_1b TMP = reg_r8(OP1); reg_w8(OP1, do_subb(TMP, 1)); next(4); -16 extb direct_1 +16 extb direct_1b OP1 &= 0xfe; TMP = int8_t(reg_r8(OP1)); set_nz8(TMP); reg_w16(OP1, TMP); next(4); -17 incb direct_1 +17 incb direct_1b TMP = reg_r8(OP1); reg_w8(OP1, do_addb(TMP, 1)); next(4); 18 shrb immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } TMP = reg_r8(OP2); PSW &= ~(F_Z|F_N|F_C|F_V|F_ST); if(OP1 >= 2 && (TMP & (0xff >> (OP1 <= 8 ? 9-OP1 : 0)))) @@ -389,9 +470,6 @@ macro post_indexed $cycles1 $cycles2 next(OP1 ? 7+OP1 : 8); 19 shlb immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } TMP = reg_r8(OP2); PSW &= ~(F_Z|F_N|F_C|F_V|F_ST); if(OP1 >= 2 && (TMP & (0xff << (OP1 <= 8 ? 9-OP1 : 0)))) @@ -407,9 +485,6 @@ macro post_indexed $cycles1 $cycles2 next(OP1 ? 7+OP1 : 8); 1a shrab immed_or_reg_2b - if(OP1 >= 0x10) { - OP1 = reg_r8(OP1) & 0x1f; - } TMP = reg_r8(OP2); PSW &= ~(F_Z|F_N|F_C|F_V|F_ST); if(OP1 >= 2 && (TMP & (0xff >> (OP1 <= 8 ? 9-OP1 : 0)))) @@ -454,7 +529,7 @@ macro post_indexed $cycles1 $cycles2 next(5); } -40 and direct_3 +40 and direct_3w TMP = reg_r16(OP1); TMP &= reg_r16(OP2); set_nz16(TMP); @@ -467,21 +542,21 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP3, TMP); next(6); -42 and indirect_3 +42 and indirect_3w TMP = any_r16(OP1); TMP &= reg_r16(OP2); set_nz16(TMP); reg_w16(OP3, TMP); post_indirect 2 7 8 // +5 when external -43 and indexed_3 +43 and indexed_3w TMP = any_r16(OP1); TMP &= reg_r16(OP2); set_nz16(TMP); reg_w16(OP3, TMP); post_indexed 7 8 // +5 when external -44 add direct_3 +44 add direct_3w TMP = reg_r16(OP1); TMP = do_add(reg_r16(OP2), TMP); reg_w16(OP3, TMP); @@ -492,19 +567,19 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP3, TMP); next(6); -46 add indirect_3 +46 add indirect_3w TMP = any_r16(OP1); TMP = do_add(reg_r16(OP2), TMP); reg_w16(OP3, TMP); post_indirect 2 7 8 // +5 when external -47 add indexed_3 +47 add indexed_3w TMP = any_r16(OP1); TMP = do_add(reg_r16(OP2), TMP); reg_w16(OP3, TMP); post_indexed 7 8 // +5 when external -48 sub direct_3 +48 sub direct_3w TMP = reg_r16(OP1); TMP = do_sub(reg_r16(OP2), TMP); reg_w16(OP3, TMP); @@ -515,19 +590,19 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP3, TMP); next(6); -4a sub indirect_3 +4a sub indirect_3w TMP = any_r16(OP1); TMP = do_sub(reg_r16(OP2), TMP); reg_w16(OP3, TMP); post_indexed 7 8 // +5 when external -4b sub indexed_3 +4b sub indexed_3w TMP = any_r16(OP1); TMP = do_sub(reg_r16(OP2), TMP); reg_w16(OP3, TMP); post_indexed 7 8 // +5 when external -4c mulu direct_3 +4c mulu direct_3w TMP = reg_r16(OP1); TMP *= reg_r16(OP2); OP3 &= 0xfc; @@ -542,7 +617,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP3+2, TMP >> 16); next(27); -4e mulu indirect_3 +4e mulu indirect_3w TMP = any_r16(OP1); TMP *= reg_r16(OP2); OP3 &= 0xfc; @@ -550,7 +625,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP3+2, TMP >> 16); post_indirect 2 28 29 // +5 when external -4f mulu indexed_3 +4f mulu indexed_3w TMP = any_r16(OP1); TMP *= reg_r16(OP2); OP3 &= 0xfc; @@ -558,7 +633,7 @@ macro post_indexed $cycles1 $cycles2 reg_w16(OP3+2, TMP >> 16); post_indexed 28 29 // +5 when external -fe4c mul direct_3 +fe4c mul direct_3w TMP = reg_r16(OP1); TMP = int16_t(reg_r16(OP2)) * int16_t(TMP); OP3 &= 0xfc; @@ -573,7 +648,7 @@ fe4d mul immed_3w reg_w16(OP3+2, TMP >> 16); next(31); -fe4e mul indirect_3 +fe4e mul indirect_3w TMP = any_r16(OP1); TMP = int16_t(reg_r16(OP2)) * int16_t(TMP); OP3 &= 0xfc; @@ -581,7 +656,7 @@ fe4e mul indirect_3 reg_w16(OP3+2, TMP >> 16); post_indirect 2 32 33 // +5 when external -fe4f mul indexed_3 +fe4f mul indexed_3w TMP = any_r16(OP1); TMP = int16_t(reg_r16(OP2)) * int16_t(TMP); OP3 &= 0xfc; @@ -589,7 +664,7 @@ fe4f mul indexed_3 reg_w16(OP3+2, TMP >> 16); post_indexed 32 33 // +5 when external -50 andb direct_3 +50 andb direct_3b TMP = reg_r8(OP1); TMP &= reg_r8(OP2); set_nz8(TMP); @@ -602,21 +677,21 @@ fe4f mul indexed_3 reg_w8(OP3, TMP); next(5); -52 andb indirect_3 +52 andb indirect_3b TMP = any_r8(OP1); TMP &= reg_r8(OP2); set_nz8(TMP); reg_w8(OP3, TMP); post_indirect 1 7 8 // +5 when external -53 andb indexed_3 +53 andb indexed_3b TMP = any_r8(OP1); TMP &= reg_r8(OP2); set_nz8(TMP); reg_w8(OP3, TMP); post_indexed 7 8 // +5 when external -54 addb direct_3 +54 addb direct_3b TMP = reg_r8(OP1); TMP = do_addb(reg_r8(OP2), TMP); reg_w8(OP3, TMP); @@ -627,19 +702,19 @@ fe4f mul indexed_3 reg_w8(OP3, TMP); next(5); -56 addb indirect_3 +56 addb indirect_3b TMP = any_r8(OP1); TMP = do_addb(reg_r8(OP2), TMP); reg_w8(OP3, TMP); post_indirect 1 7 8 // +5 when external -57 addb indexed_3 +57 addb indexed_3b TMP = any_r8(OP1); TMP = do_addb(reg_r8(OP2), TMP); reg_w8(OP3, TMP); post_indexed 7 8 // +5 when external -58 subb direct_3 +58 subb direct_3b TMP = reg_r8(OP1); TMP = do_subb(reg_r8(OP2), TMP); reg_w8(OP3, TMP); @@ -650,65 +725,65 @@ fe4f mul indexed_3 reg_w8(OP3, TMP); next(5); -5a subb indirect_3 +5a subb indirect_3b TMP = any_r8(OP1); TMP = do_subb(reg_r8(OP2), TMP); reg_w8(OP3, TMP); post_indirect 1 7 8 // +5 when external -5b subb indexed_3 +5b subb indexed_3b TMP = any_r8(OP1); TMP = do_subb(reg_r8(OP2), TMP); reg_w8(OP3, TMP); post_indexed 7 8 // +5 when external -5c mulub direct_3 +5c mulub direct_3e TMP = reg_r8(OP1); TMP *= reg_r8(OP2); reg_w16(OP3, TMP); next(18); -5d mulub immed_3b +5d mulub immed_3e TMP = OP1 * reg_r8(OP2); reg_w16(OP3, TMP); next(18); -5e mulub indirect_3 +5e mulub indirect_3e TMP = any_r8(OP1); TMP *= reg_r8(OP2); reg_w16(OP3, TMP); post_indirect 1 20 21 // +5 when external -5f mulub indexed_3 +5f mulub indexed_3e TMP = any_r8(OP1); TMP = reg_r8(OP2); reg_w16(OP3, TMP); post_indexed 20 21 // +5 when external -fe5c mulb direct_3 +fe5c mulb direct_3e TMP = reg_r8(OP1); TMP = int8_t(reg_r8(OP2)) * int8_t(TMP); reg_w16(OP3, TMP); next(22); -fe5d mulb immed_3b +fe5d mulb immed_3e TMP = int8_t(OP1) * int8_t(reg_r8(OP2)); reg_w16(OP3, TMP); next(22); -fe5e mulb indirect_3 +fe5e mulb indirect_3e TMP = any_r8(OP1); TMP = int8_t(reg_r8(OP2)) * int8_t(TMP); reg_w16(OP3, TMP); post_indirect 1 24 25 // +5 when external -fe5f mulb indexed_3 +fe5f mulb indexed_3e TMP = any_r8(OP1); TMP = int8_t(reg_r8(OP2)) * int8_t(TMP); reg_w16(OP3, TMP); post_indexed 24 25 // +5 when external -60 and direct_2 +60 and direct_2w TMP = reg_r16(OP1); TMP &= reg_r16(OP2); set_nz16(TMP); @@ -721,21 +796,21 @@ fe5f mulb indexed_3 reg_w16(OP2, TMP); next(5); -62 and indirect_2 +62 and indirect_2w TMP = any_r16(OP1); TMP &= reg_r16(OP2); set_nz16(TMP); reg_w16(OP2, TMP); post_indirect 2 6 7 // +5 when external -63 and indexed_2 +63 and indexed_2w TMP = any_r16(OP1); TMP &= reg_r16(OP2); set_nz16(TMP); reg_w16(OP2, TMP); post_indexed 6 7 // +5 when external -64 add direct_2 +64 add direct_2w TMP = reg_r16(OP1); TMP = do_add(reg_r16(OP2), TMP); reg_w16(OP2, TMP); @@ -746,19 +821,19 @@ fe5f mulb indexed_3 reg_w16(OP2, TMP); next(5); -66 add indirect_2 +66 add indirect_2w TMP = any_r16(OP1); TMP = do_add(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indirect 2 6 7 // +5 when external -67 add indexed_2 +67 add indexed_2w TMP = any_r16(OP1); TMP = do_add(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indexed 6 7 // +5 when external -68 sub direct_2 +68 sub direct_2w TMP = reg_r16(OP1); TMP = do_sub(reg_r16(OP2), TMP); reg_w16(OP2, TMP); @@ -769,19 +844,19 @@ fe5f mulb indexed_3 reg_w16(OP2, TMP); next(5); -6a sub indirect_2 +6a sub indirect_2w TMP = any_r16(OP1); TMP = do_sub(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indirect 2 6 7 // +5 when external -6b sub indexed_2 +6b sub indexed_2w TMP = any_r16(OP1); TMP = do_sub(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indexed 6 7 // +5 when external -6c mulu direct_2 +6c mulu direct_2w OP2 &= 0xfc; TMP = reg_r16(OP1); TMP *= reg_r16(OP2); @@ -796,7 +871,7 @@ fe5f mulb indexed_3 reg_w16(OP2+2, TMP >> 16); next(26); -6e mulu indirect_2 +6e mulu indirect_2w OP2 &= 0xfc; TMP = any_r16(OP1); TMP *= reg_r16(OP2); @@ -804,7 +879,7 @@ fe5f mulb indexed_3 reg_w16(OP2+2, TMP >> 16); post_indirect 2 27 28 // +5 when external -6f mulu indexed_2 +6f mulu indexed_2w OP2 &= 0xfc; TMP = any_r16(OP1); TMP *= reg_r16(OP2); @@ -812,7 +887,7 @@ fe5f mulb indexed_3 reg_w16(OP2+2, TMP >> 16); post_indexed 27 28 // +5 when external -fe6c mul direct_2 +fe6c mul direct_2w OP2 &= 0xfc; TMP = reg_r16(OP1); TMP = int16_t(reg_r16(OP2)) * int16_t(TMP); @@ -827,7 +902,7 @@ fe6d mul immed_2w reg_w16(OP2+2, TMP >> 16); next(30); -fe6e mul indirect_2 +fe6e mul indirect_2w OP2 &= 0xfc; TMP = any_r16(OP1); TMP = int16_t(reg_r16(OP2)) * int16_t(TMP); @@ -835,7 +910,7 @@ fe6e mul indirect_2 reg_w16(OP2+2, TMP >> 16); post_indirect 2 31 32 // +5 when external -fe6f mul indexed_2 +fe6f mul indexed_2w OP2 &= 0xfc; TMP = any_r16(OP1); TMP = int16_t(reg_r16(OP2)) * int16_t(TMP); @@ -843,7 +918,7 @@ fe6f mul indexed_2 reg_w16(OP2+2, TMP >> 16); post_indexed 31 32 // +5 when external -70 andb direct_2 +70 andb direct_2b TMP = reg_r8(OP1); TMP &= reg_r8(OP2); set_nz8(TMP); @@ -856,21 +931,21 @@ fe6f mul indexed_2 reg_w8(OP2, TMP); next(4); -72 andb indirect_2 +72 andb indirect_2b TMP = any_r8(OP1); TMP &= reg_r8(OP2); set_nz8(TMP); reg_w8(OP2, TMP); post_indirect 1 6 7 // +5 when external -73 andb indexed_2 +73 andb indexed_2b TMP = any_r8(OP1); TMP &= reg_r8(OP2); set_nz8(TMP); - reg_w8(OP3, TMP); + reg_w8(OP2, TMP); post_indexed 6 7 // +5 when external -74 addb direct_2 +74 addb direct_2b TMP = reg_r8(OP1); TMP = do_addb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); @@ -881,19 +956,19 @@ fe6f mul indexed_2 reg_w8(OP2, TMP); next(4); -76 addb indirect_2 +76 addb indirect_2b TMP = any_r8(OP1); TMP = do_addb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indirect 1 6 7 // +5 when external -77 addb indexed_2 +77 addb indexed_2b TMP = any_r8(OP1); TMP = do_addb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indexed 6 7 // +5 when external -78 subb direct_2 +78 subb direct_2b TMP = reg_r8(OP1); TMP = do_subb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); @@ -904,19 +979,19 @@ fe6f mul indexed_2 reg_w8(OP2, TMP); next(4); -7a subb indirect_2 +7a subb indirect_2b TMP = any_r8(OP1); TMP = do_subb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indirect 1 6 7 // +5 when external -7b subb indexed_2 +7b subb indexed_2b TMP = any_r8(OP1); TMP = do_subb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indexed 6 7 // +5 when external -7c mulub direct_2 +7c mulub direct_2b OP2 &= 0xfe; TMP = reg_r8(OP1); TMP *= reg_r8(OP2); @@ -929,21 +1004,21 @@ fe6f mul indexed_2 reg_w16(OP2, TMP); next(17); -7e mulub indirect_2 +7e mulub indirect_2b OP2 &= 0xfe; TMP = any_r8(OP1); TMP *= reg_r8(OP2); reg_w16(OP2, TMP); post_indirect 1 19 20 // +5 when external -7f mulub indexed_2 +7f mulub indexed_2b OP2 &= 0xfe; TMP = any_r8(OP1); TMP *= reg_r8(OP2); reg_w16(OP2, TMP); post_indexed 19 20 // +5 when external -fe7c mulb direct_2 +fe7c mulb direct_2b OP2 &= 0xfe; TMP = reg_r8(OP1); TMP = int8_t(reg_r16(OP2)) * int8_t(TMP); @@ -956,21 +1031,21 @@ fe7d mulb immed_2b reg_w16(OP2, TMP); next(21); -fe7e mulb indirect_2 +fe7e mulb indirect_2b OP2 &= 0xfe; TMP = any_r8(OP1); TMP = int8_t(reg_r8(OP2)) * int8_t(TMP); reg_w16(OP2, TMP); post_indirect 1 23 24 // +5 when external -fe7f mulb indexed_2 +fe7f mulb indexed_2b OP2 &= 0xfe; TMP = any_r16(OP1); - TMP = int8_t(reg_r16(OP2)) * int8_t(TMP); + TMP = int8_t(reg_r8(OP2)) * int8_t(TMP); reg_w16(OP2, TMP); post_indexed 23 24 // +5 when external -80 or direct_2 +80 or direct_2w TMP = reg_r16(OP1); TMP |= reg_r16(OP2); set_nz16(TMP); @@ -983,21 +1058,21 @@ fe7f mulb indexed_2 reg_w16(OP2, TMP); next(5); -82 or indirect_2 +82 or indirect_2w TMP = any_r16(OP1); TMP |= reg_r16(OP2); set_nz16(TMP); reg_w16(OP2, TMP); post_indirect 2 6 7 // +5 when external -83 or indexed_2 +83 or indexed_2w TMP = any_r16(OP1); TMP |= reg_r16(OP2); set_nz16(TMP); reg_w16(OP2, TMP); post_indexed 6 7 // +5 when external -84 xor direct_2 +84 xor direct_2w TMP = reg_r16(OP1); TMP ^= reg_r16(OP2); set_nz16(TMP); @@ -1010,21 +1085,21 @@ fe7f mulb indexed_2 reg_w16(OP2, TMP); next(5); -86 xor indirect_2 +86 xor indirect_2w TMP = any_r16(OP1); TMP ^= reg_r16(OP2); set_nz16(TMP); reg_w16(OP2, TMP); post_indirect 2 6 7 // +5 when external -87 xor indexed_2 +87 xor indexed_2w TMP = any_r16(OP1); TMP ^= reg_r16(OP2); set_nz16(TMP); reg_w16(OP2, TMP); post_indexed 6 7 // +5 when external -88 cmp direct_2 +88 cmp direct_2w TMP = reg_r16(OP1); do_sub(reg_r16(OP2), TMP); next(4); @@ -1033,17 +1108,17 @@ fe7f mulb indexed_2 do_sub(reg_r16(OP2), OP1); next(5); -8a cmp indirect_2 +8a cmp indirect_2w TMP = any_r16(OP1); do_sub(reg_r16(OP2), TMP); post_indirect 2 6 7 // +5 when external -8b cmp indexed_2 +8b cmp indexed_2w TMP = any_r16(OP1); do_sub(reg_r16(OP2), TMP); post_indexed 6 7 // +5 when external -8c divu direct_2 +8c divu direct_2w OP2 &= 0xfc; PSW &= ~F_V; OP1 = reg_r16(OP1); @@ -1076,7 +1151,7 @@ fe7f mulb indexed_2 } next(26); -8e divu indirect_2 +8e divu indirect_2w OP2 &= 0xfc; PSW &= ~F_V; uint32_t d = any_r16(OP1); @@ -1093,7 +1168,7 @@ fe7f mulb indexed_2 } post_indirect 2 28 29 // +4 when external -8f divu indexed_2 +8f divu indexed_2w OP2 &= 0xfc; PSW &= ~F_V; uint32_t d = any_r16(OP1); @@ -1110,7 +1185,7 @@ fe7f mulb indexed_2 } post_indexed 28 29 // +4 when external -fe8c div direct_2 +fe8c div direct_2w OP2 &= 0xfc; PSW &= ~F_V; OP1 = reg_r16(OP1); @@ -1143,7 +1218,7 @@ fe8d div immed_2w } next(30); -fe8e div indirect_2 +fe8e div indirect_2w OP2 &= 0xfc; PSW &= ~F_V; int32_t d = int16_t(any_r16(OP1)); @@ -1160,7 +1235,7 @@ fe8e div indirect_2 } post_indirect 2 32 33 // +4 when external -fe8f div indexed_2 +fe8f div indexed_2w OP2 &= 0xfc; PSW &= ~F_V; int32_t d = int16_t(any_r16(OP1)); @@ -1177,7 +1252,7 @@ fe8f div indexed_2 } post_indexed 32 33 // +4 when external -90 orb direct_2 +90 orb direct_2b TMP = reg_r8(OP1); TMP |= reg_r8(OP2); set_nz8(TMP); @@ -1190,21 +1265,21 @@ fe8f div indexed_2 reg_w8(OP2, TMP); next(4); -92 orb indirect_2 +92 orb indirect_2b TMP = any_r8(OP1); TMP |= reg_r8(OP2); set_nz8(TMP); reg_w8(OP2, TMP); post_indirect 1 6 7 // +5 when external -93 orb indexed_2 +93 orb indexed_2b TMP = any_r8(OP1); TMP |= reg_r8(OP2); set_nz8(TMP); reg_w8(OP2, TMP); post_indexed 6 7 // +5 when external -94 xorb direct_2 +94 xorb direct_2b TMP = reg_r8(OP1); TMP ^= reg_r8(OP2); set_nz8(TMP); @@ -1217,21 +1292,21 @@ fe8f div indexed_2 reg_w8(OP2, TMP); next(4); -96 xorb indirect_2 +96 xorb indirect_2b TMP = any_r8(OP1); TMP ^= reg_r8(OP2); set_nz8(TMP); reg_w8(OP2, TMP); post_indirect 1 6 7 // +5 when external -97 xorb indexed_2 +97 xorb indexed_2b TMP = any_r8(OP1); TMP ^= reg_r8(OP2); set_nz8(TMP); reg_w8(OP2, TMP); post_indexed 6 7 // +5 when external -98 cmpb direct_2 +98 cmpb direct_2b TMP = reg_r8(OP1); do_subb(reg_r8(OP2), TMP); next(4); @@ -1240,17 +1315,17 @@ fe8f div indexed_2 do_subb(reg_r8(OP2), OP1); next(4); -9a cmpb indirect_2 +9a cmpb indirect_2b TMP = any_r8(OP1); do_subb(reg_r8(OP2), TMP); post_indirect 1 6 7 // +5 when external -9b cmpb indexed_2 +9b cmpb indexed_2b TMP = any_r8(OP1); do_subb(reg_r8(OP2), TMP); post_indexed 6 7 // +5 when external -9c divub direct_2 +9c divub direct_2e PSW &= ~F_V; OP1 = reg_r8(OP1); if(OP1) { @@ -1264,7 +1339,7 @@ fe8f div indexed_2 } next(17); -9d divub immed_2b +9d divub immed_2e PSW &= ~F_V; if(OP1) { TMP = reg_r16(OP2); @@ -1277,7 +1352,7 @@ fe8f div indexed_2 } next(17); -9e divub indirect_2 +9e divub indirect_2w PSW &= ~F_V; uint32_t d = any_r8(OP1); if(d) { @@ -1291,7 +1366,7 @@ fe8f div indexed_2 } post_indirect 1 20 21 // +4 when external -9f divub indexed_2 +9f divub indexed_2w PSW &= ~F_V; uint32_t d = any_r8(OP1); if(d) { @@ -1305,7 +1380,7 @@ fe8f div indexed_2 } post_indexed 20 21 // +4 when external -fe9c divb direct_2 +fe9c divb direct_2e PSW &= ~F_V; OP1 = reg_r8(OP1); if(OP1) { @@ -1319,7 +1394,7 @@ fe9c divb direct_2 } next(21); -fe9d divb immed_2b +fe9d divb immed_2e PSW &= ~F_V; if(OP1) { TMP = reg_r16(OP2); @@ -1332,7 +1407,7 @@ fe9d divb immed_2b } next(21); -fe9e divb indirect_2 +fe9e divb indirect_2w PSW &= ~F_V; int32_t d = int8_t(any_r8(OP1)); if(d) { @@ -1346,7 +1421,7 @@ fe9e divb indirect_2 } post_indirect 1 24 25 // +4 when external -fe9f divb indexed_2 +fe9f divb indexed_2w PSW &= ~F_V; int32_t d = int8_t(any_r8(OP1)); if(d) { @@ -1360,7 +1435,7 @@ fe9f divb indexed_2 } post_indexed 1 24 25 // +4 when external -a0 ld direct_2 +a0 ld direct_2w reg_w16(OP2, reg_r16(OP1)); next(4); @@ -1368,15 +1443,15 @@ a1 ld immed_2w reg_w16(OP2, OP1); next(5); -a2 ld indirect_2 +a2 ld indirect_2w reg_w16(OP2, any_r16(OP1)); post_indirect 2 6 7 // +5 when external -a3 ld indexed_2 +a3 ld indexed_2w reg_w16(OP2, any_r16(OP1)); post_indexed 6 7 // +5 when external -a4 addc direct_2 +a4 addc direct_2w TMP = reg_r16(OP1); TMP = do_addc(reg_r16(OP2), TMP); reg_w16(OP2, TMP); @@ -1387,19 +1462,19 @@ a5 addc immed_2w reg_w16(OP2, TMP); next(5); -a6 addc indirect_2 +a6 addc indirect_2w TMP = any_r16(OP1); TMP = do_addc(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indirect 2 6 7 // +5 when external -a7 addc indexed_2 +a7 addc indexed_2w TMP = any_r16(OP1); TMP = do_addc(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indexed 6 7 // +5 when external -a8 subc direct_2 +a8 subc direct_2w TMP = reg_r16(OP1); TMP = do_subc(reg_r16(OP2), TMP); reg_w16(OP2, TMP); @@ -1410,35 +1485,35 @@ a9 subc immed_2w reg_w16(OP2, TMP); next(5); -aa subc indirect_2 +aa subc indirect_2w TMP = any_r16(OP1); TMP = do_subc(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indirect 2 6 7 // +5 when external -ab subc indexed_2 +ab subc indexed_2w TMP = any_r16(OP1); TMP = do_subc(reg_r16(OP2), TMP); reg_w16(OP2, TMP); post_indexed 6 7 // +5 when external -ac ldbze direct_2 +ac ldbze direct_2e reg_w16(OP2, uint8_t(reg_r8(OP1))); next(4); -ad ldbze immed_2b +ad ldbze immed_2e reg_w16(OP2, uint8_t(OP1)); next(4); -ae ldbze indirect_2 +ae ldbze indirect_2w reg_w16(OP2, uint8_t(any_r8(OP1))); post_indirect 1 6 7 // +5 when external -af ldbze indexed_2 +af ldbze indexed_2w reg_w16(OP2, uint8_t(any_r8(OP1))); post_indexed 6 7 // +5 when external -b0 ldb direct_2 +b0 ldb direct_2b reg_w8(OP2, reg_r8(OP1)); next(4); @@ -1446,105 +1521,105 @@ b1 ldb immed_2b reg_w8(OP2, OP1); next(4); -b2 ldb indirect_2 +b2 ldb indirect_2b reg_w8(OP2, any_r8(OP1)); post_indirect 1 6 7 // +5 when external -b3 ldb indexed_2 +b3 ldb indexed_2b reg_w8(OP2, any_r8(OP1)); post_indexed 6 7 // +5 when external -b4 addcb direct_2 +b4 addcb direct_2b TMP = reg_r8(OP1); TMP = do_addcb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); next(4); -b5 addcb immed_2w +b5 addcb immed_2b TMP = do_addcb(reg_r8(OP2), OP1); reg_w8(OP2, TMP); next(4); -b6 addcb indirect_2 +b6 addcb indirect_2b TMP = any_r8(OP1); TMP = do_addcb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indirect 1 6 7 // +5 when external -b7 addcb indexed_2 +b7 addcb indexed_2b TMP = any_r8(OP1); TMP = do_addcb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indexed 6 7 // +5 when external -b8 subcb direct_2 +b8 subcb direct_2b TMP = reg_r8(OP1); TMP = do_subcb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); next(4); -b9 subcb immed_2w +b9 subcb immed_2b TMP = do_subcb(reg_r8(OP2), OP1); reg_w8(OP2, TMP); next(4); -ba subcb indirect_2 +ba subcb indirect_2b TMP = any_r8(OP1); TMP = do_subcb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indirect 1 6 7 // +5 when external -bb subcb indexed_2 +bb subcb indexed_2b TMP = any_r8(OP1); TMP = do_subcb(reg_r8(OP2), TMP); reg_w8(OP2, TMP); post_indexed 6 7 // +5 when external -bc ldbse direct_2 +bc ldbse direct_2e reg_w16(OP2, int8_t(reg_r8(OP1))); next(4); -bd ldbse immed_2b +bd ldbse immed_2e reg_w16(OP2, int8_t(OP1)); next(4); -be ldbse indirect_2 +be ldbse indirect_2w reg_w16(OP2, int8_t(any_r8(OP1))); post_indirect 1 6 7 // +5 when external -bf ldbse indexed_2 +bf ldbse indexed_2w reg_w16(OP2, int8_t(any_r8(OP1))); post_indexed 6 7 // +5 when external -c0 st direct_2 +c0 st direct_2w reg_w16(OP1, reg_r16(OP2)); next(4); -c1 bmov direct_2 196 +c1 bmov direct_2w 196 -c2 st indirect_2 +c2 st indirect_2w any_w16(OP1, reg_r16(OP2)); post_indirect 2 7 8 // +4 when external -c3 st indexed_2 +c3 st indexed_2w any_w16(OP1, reg_r16(OP2)); post_indexed 7 8 // +4 when external -c4 stb direct_2 +c4 stb direct_2b reg_w8(OP1, reg_r8(OP2)); next(4); -c5 cmpl direct_2 196 +c5 cmpl direct_2w 196 -c6 stb indirect_2 +c6 stb indirect_2b any_w8(OP1, reg_r8(OP2)); post_indirect 1 7 8 // +4 when external -c7 stb indexed_2 +c7 stb indexed_2b any_w8(OP1, reg_r8(OP2)); post_indexed 7 8 // +5 when external -c8 push direct_1 +c8 push direct_1w TMP = reg_r16(0x18); TMP -= 2; reg_w16(0x18, TMP); @@ -1559,7 +1634,7 @@ c9 push immed_1w any_w16(TMP, OP1); next(8); // +4 is external sp -ca push indirect_1 +ca push indirect_1w TMP = reg_r16(0x18); TMP -= 2; reg_w16(0x18, TMP); @@ -1567,7 +1642,7 @@ ca push indirect_1 any_w16(TMP, OP1); post_indirect 2 11 12 // +4 when external -cb push indexed_1 +cb push indexed_1w TMP = reg_r16(0x18); TMP -= 2; reg_w16(0x18, TMP); @@ -1575,16 +1650,16 @@ cb push indexed_1 any_w16(TMP, OP1); post_indexed 11 12 // +4 when external -cc pop direct_1 +cc pop direct_1w TMP = reg_r16(0x18); reg_w16(0x18, TMP+2); TMP = any_r16(TMP); reg_w16(OP1, TMP); next(12); // +2 when external sp -cd bmovi direct_2 196 +cd bmovi direct_2w 196 -ce pop indirect_1 +ce pop indirect_1w TMP = reg_r16(0x18); reg_w16(0x18, TMP+2); TMP = any_r16(TMP); @@ -1593,7 +1668,7 @@ ce pop indirect_1 any_w16(OP1, TMP); post_indirect 2 14 14 // +2 when external sp, +4 when external write -ce pop indirect_1 196 +ce pop indirect_1w 196 TMP = reg_r16(0x18); reg_w16(0x18, TMP+2); TMP = any_r16(TMP); @@ -1602,14 +1677,14 @@ ce pop indirect_1 196 any_w16(OP1, TMP); post_indirect 2 14 14 // +2 when external sp, +4 when external write -cf pop indexed_1 +cf pop indexed_1w TMP = reg_r16(0x18); reg_w16(0x18, TMP+2); TMP = any_r16(TMP); any_w16(OP1, TMP); post_indexed 14 14 // +2 when external sp, +4 when external write -cf pop indexed_1 196 +cf pop indexed_1w 196 TMP = reg_r16(0x18); reg_w16(0x18, TMP+2); TMP = any_r16(TMP); @@ -1761,7 +1836,7 @@ e0 djnz rrel8 next(5); } -e1 djnzw rrel8 196 +e1 djnzw wrrel8 196 TMP = reg_r16(OP2); TMP = TMP-1; reg_w16(OP2, TMP); |