diff options
| author | 2022-01-14 18:13:21 -0800 | |
|---|---|---|
| committer | 2022-01-14 21:13:21 -0500 | |
| commit | a6addb11da8aa9f44ebf5449e8fe0d8c02f3d824 (patch) | |
| tree | 661c3a83a3b2d38ae5a42a5040984dafc79e6d86 /src/devices/cpu/mb88xx | |
| parent | 25dce8aa6db02bb38fe47dbe6637955caa38dae8 (diff) | |
Namco custom chip improvements (#9141)
* namco06: synchronize data writes
* namco06: Improve NMI delay.
* namco5x: use chip select lines, synchronize writes.
* mb88xx: clarify interrupt line is 'logical', not voltage-based
* mb88xx: clear the appropriate interrupt enable flag when taking the int
* galaga: use correct callback for bosco 06xx rw.
* galaga: re-order namco06 callbacks, for consistency.
* galaga: use correct clock for the second 06xx in bosco.
Diffstat (limited to 'src/devices/cpu/mb88xx')
| -rw-r--r-- | src/devices/cpu/mb88xx/mb88xx.cpp | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/devices/cpu/mb88xx/mb88xx.cpp b/src/devices/cpu/mb88xx/mb88xx.cpp index fe07ba80d2c..f606f8a80ec 100644 --- a/src/devices/cpu/mb88xx/mb88xx.cpp +++ b/src/devices/cpu/mb88xx/mb88xx.cpp @@ -368,8 +368,10 @@ int mb88_cpu_device::pla( int inA, int inB ) void mb88_cpu_device::execute_set_input(int inputnum, int state) { - /* on rising edge trigger interrupt */ - if ( (m_pio & 0x04) && !m_nf && state != CLEAR_LINE ) + /* On rising edge trigger interrupt. + * Note this is a logical level, the actual pin is high-to-low voltage + * triggered. */ + if ( (m_pio & INT_CAUSE_EXTERNAL) && !m_nf && state != CLEAR_LINE ) { m_pending_interrupt |= INT_CAUSE_EXTERNAL; } @@ -437,6 +439,9 @@ void mb88_cpu_device::update_pio( int cycles ) { /* if we have a live external source, call the irqcallback */ standard_irq_callback( 0 ); + /* The datasheet doesn't mention if the interrupt flag + * is cleared, but it seems to be only for this case. */ + m_pio &= ~INT_CAUSE_EXTERNAL; m_PC = 0x02; } else if (m_pending_interrupt & m_pio & INT_CAUSE_TIMER) |
