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author Vas Crabb <vas@vastheman.com>2018-03-25 02:03:24 +1100
committer Vas Crabb <vas@vastheman.com>2018-03-25 02:03:24 +1100
commit08dde5eb0acb30b68b403a2b9ad2fd503067f2bd (patch)
tree9ea8ba7c97d124aa4f7600ebb183667609f81224 /src/devices/cpu/mb86235
parent8142f24c4307439397ffb2c01fab76e6f2c1b95e (diff)
srcclean and regenerate localisations (nw)
Diffstat (limited to 'src/devices/cpu/mb86235')
-rw-r--r--src/devices/cpu/mb86235/mb86235.cpp16
-rw-r--r--src/devices/cpu/mb86235/mb86235.h16
-rw-r--r--src/devices/cpu/mb86235/mb86235drc.cpp14
-rw-r--r--src/devices/cpu/mb86235/mb86235ops.cpp210
4 files changed, 128 insertions, 128 deletions
diff --git a/src/devices/cpu/mb86235/mb86235.cpp b/src/devices/cpu/mb86235/mb86235.cpp
index eb1baa4565e..f61c7c4fd14 100644
--- a/src/devices/cpu/mb86235/mb86235.cpp
+++ b/src/devices/cpu/mb86235/mb86235.cpp
@@ -11,7 +11,7 @@
* - move post-opcodes outside of the execute_op() function, like increment_prp()
* (needed if opcode uses fifo in/out);
* - rewrite fifo hookups, remove them from the actual opcodes.
- * - use a phase system for the execution, like do_alu() being separated
+ * - use a phase system for the execution, like do_alu() being separated
* from control();
* - illegal delay slots unsupported, and no idea about what is supposed to happen;
* - externalize PDR / DDR (error LED flags on Model 2);
@@ -59,17 +59,17 @@ void mb86235_device::execute_run()
run_drc();
#else
uint64_t opcode;
- while(m_core->icount > 0)
+ while(m_core->icount > 0)
{
uint32_t curpc;
-
+
curpc = check_previous_op_stall() ? m_core->cur_fifo_state.pc : m_core->pc;
debugger_instruction_hook(this, curpc);
opcode = m_direct->read_qword(curpc);
-
+
m_core->ppc = curpc;
-
+
if(m_core->delay_slot == true)
{
m_core->pc = m_core->delay_pc;
@@ -77,9 +77,9 @@ void mb86235_device::execute_run()
}
else
handle_single_step_execution();
-
+
execute_op(opcode >> 32, opcode & 0xffffffff);
-
+
m_core->icount--;
}
@@ -228,7 +228,7 @@ void mb86235_device::device_reset()
#if ENABLE_DRC
flush_cache();
#endif
-
+
m_core->pc = 0;
m_core->delay_pc = 0;
m_core->ppc = 0;
diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h
index 72301d39bfd..73ee7fcb07f 100644
--- a/src/devices/cpu/mb86235/mb86235.h
+++ b/src/devices/cpu/mb86235/mb86235.h
@@ -109,13 +109,13 @@ private:
int num;
uint32_t data[16];
};
-
+
struct fifo_state
{
uint32_t pc;
bool has_stalled;
};
-
+
struct mb86235_internal_state
{
uint32_t pc;
@@ -141,7 +141,7 @@ private:
// TODO: remove this, use ST instead
mb86235_flags flags;
uint32_t st;
-
+
int icount;
uint32_t arg0;
@@ -150,8 +150,8 @@ private:
uint32_t arg3;
uint64_t arg64;
- uint32_t pcp; /**< PC stack pointer */
- uint32_t pcs[4]; /**< PC stack contents */
+ uint32_t pcp; /**< PC stack pointer */
+ uint32_t pcs[4]; /**< PC stack contents */
uint32_t jmpdest;
uint32_t alutemp;
@@ -163,7 +163,7 @@ private:
float fp0;
bool delay_slot;
-
+
fifo fifoin;
fifo fifoout0;
fifo fifoout1;
@@ -243,7 +243,7 @@ private:
bool has_register_clash(const opcode_desc *desc, int outreg);
bool aluop_has_result(int aluop);
bool check_previous_op_stall();
-
+
// interpreter
void execute_op(uint32_t h, uint32_t l);
void do_alu1(uint32_t h, uint32_t l);
@@ -261,7 +261,7 @@ private:
inline uint32_t get_mulreg(uint8_t which, bool isfloatop);
inline void set_alureg(uint8_t which, uint32_t value);
inline void decode_aluop(uint8_t opcode, uint32_t src1, uint32_t src2, uint8_t imm, uint8_t dst_which);
- inline void decode_mulop(bool isfmul, uint32_t src1, uint32_t src2, uint8_t dst_which);
+ inline void decode_mulop(bool isfmul, uint32_t src1, uint32_t src2, uint8_t dst_which);
inline bool decode_branch_jump(uint8_t which);
inline uint32_t do_control_dst(uint32_t l);
inline void push_pc(uint32_t pcval);
diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp
index 941f0f39f36..d1682d0e024 100644
--- a/src/devices/cpu/mb86235/mb86235drc.cpp
+++ b/src/devices/cpu/mb86235/mb86235drc.cpp
@@ -640,7 +640,7 @@ void mb86235_device::generate_ea(drcuml_block &block, compiler_state &compiler,
case 0x4: // @ARx+ARy
UML_ADD(block, I0, AR(arx), AR(ary));
break;
- case 0x5: // @ARx+ARy++
+ case 0x5: // @ARx+ARy++
UML_ADD(block, I0, AR(arx), AR(ary));
UML_ADD(block, AR(ary), AR(ary), 1);
break;
@@ -663,7 +663,7 @@ void mb86235_device::generate_reg_read(drcuml_block &block, compiler_state &comp
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
// MA0-7
UML_MOV(block, dst, MA(reg & 7));
- break;
+ break;
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
// AA0-7
@@ -679,7 +679,7 @@ void mb86235_device::generate_reg_read(drcuml_block &block, compiler_state &comp
// MB0-7
UML_MOV(block, dst, MB(reg & 7));
break;
-
+
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
// AB0-7
UML_MOV(block, dst, AB(reg & 7));
@@ -1331,7 +1331,7 @@ void mb86235_device::generate_alu(drcuml_block &block, compiler_state &compiler,
if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0);
break;
- case 0x19: // OR
+ case 0x19: // OR
generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false);
UML_OR(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1));
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
@@ -1339,8 +1339,8 @@ void mb86235_device::generate_alu(drcuml_block &block, compiler_state &compiler,
if (AV_CALC_REQUIRED) UML_MOV(block, FLAGS_AV, 0);
if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0);
break;
-
- case 0x1a: // XOR
+
+ case 0x1a: // XOR
generate_alumul_input(block, compiler, desc, i2, uml::I0, false, false);
UML_XOR(block, alutemp ? mem(&m_core->alutemp) : get_alu_output(io), I0, get_alu1_input(i1));
if (AN_CALC_REQUIRED) UML_SETc(block, COND_S, FLAGS_AN);
@@ -1348,7 +1348,7 @@ void mb86235_device::generate_alu(drcuml_block &block, compiler_state &compiler,
if (AV_CALC_REQUIRED) UML_MOV(block, FLAGS_AV, 0);
if (AU_CALC_REQUIRED) UML_MOV(block, FLAGS_AU, 0);
break;
-
+
case 0x1c: // LSR
generate_alumul_input(block, compiler, desc, i1, uml::I0, false, false);
UML_SHR(block, I0, I0, i2);
diff --git a/src/devices/cpu/mb86235/mb86235ops.cpp b/src/devices/cpu/mb86235/mb86235ops.cpp
index c667d745d90..024437c506a 100644
--- a/src/devices/cpu/mb86235/mb86235ops.cpp
+++ b/src/devices/cpu/mb86235/mb86235ops.cpp
@@ -18,35 +18,35 @@
*
********************/
-#define AD 0x00000001
-#define AU 0x00000002
-#define AV 0x00000004
+#define AD 0x00000001
+#define AU 0x00000002
+#define AV 0x00000004
#define AZ 0x00000008
#define AN 0x00000010
#define ZC 0x00000100
-#define IL 0x00000200
-#define NR 0x00000400
-#define ZD 0x00000800
-#define RP 0x00004000
-#define LP 0x00008000
-#define MD 0x00010000
-#define MU 0x00020000
-#define MV 0x00040000
-#define MZ 0x00080000
-#define MN 0x00100000
+#define IL 0x00000200
+#define NR 0x00000400
+#define ZD 0x00000800
+#define RP 0x00004000
+#define LP 0x00008000
+#define MD 0x00010000
+#define MU 0x00020000
+#define MV 0x00040000
+#define MZ 0x00080000
+#define MN 0x00100000
#define OFF 0x01000000
#define OFE 0x02000000
#define IFF 0x04000000
#define IFE 0x08000000
-#define F0 0x10000000
+#define F0 0x10000000
#define F1 0x20000000
#define F2 0x40000000
-#define FSET(f) m_core->st|=(f)
-#define FCLR(f) m_core->st&=~(f)
-
+#define FSET(f) m_core->st|=(f)
+#define FCLR(f) m_core->st&=~(f)
+
void mb86235_device::handle_single_step_execution()
-{
+{
if(m_core->cur_fifo_state.has_stalled == true)
return;
@@ -60,11 +60,11 @@ void mb86235_device::handle_single_step_execution()
else // normal operation
m_core->pc ++;
}
-
+
bool mb86235_device::check_previous_op_stall()
{
return (m_core->cur_fifo_state.has_stalled == true) && ((m_core->st & RP) == 0);
-}
+}
inline void mb86235_device::increment_pwp()
{
@@ -84,7 +84,7 @@ void mb86235_device::decrement_prp()
{
if(m_core->prp == 0)
m_core->prp = 24;
-
+
m_core->prp --;
}
@@ -96,7 +96,7 @@ void mb86235_device::zero_prp()
inline uint32_t mb86235_device::decode_ea(uint8_t mode, uint8_t rx, uint8_t ry, uint16_t disp, bool isbbus)
{
uint32_t res;
-
+
switch(mode)
{
case 0x00: // ARx
@@ -116,7 +116,7 @@ inline uint32_t mb86235_device::decode_ea(uint8_t mode, uint8_t rx, uint8_t ry,
m_core->ar[rx]&=0x3fff;
return res;
case 0x04: // ARx + ARy
- return m_core->ar[rx]+m_core->ar[ry];
+ return m_core->ar[rx]+m_core->ar[ry];
case 0x05: // ARx + ARy++
res = m_core->ar[ry];
if(m_core->cur_fifo_state.has_stalled == true)
@@ -136,7 +136,7 @@ inline uint32_t mb86235_device::decode_ea(uint8_t mode, uint8_t rx, uint8_t ry,
case 0x0b: // ARx + ARy + disp12
return m_core->ar[rx]+m_core->ar[ry]+disp;
}
-
+
fatalerror("TGPx4: unemulated decode_ea type %02x executed at pc=%08x\n",mode,m_core->ppc);
return 0;
@@ -151,11 +151,11 @@ inline void mb86235_device::write_bus(bool isbbus, uint32_t addr, uint32_t data)
{
if(isbbus == true)
m_datab->write_dword(addr & 0x3ff,data);
- else
+ else
m_dataa->write_dword(addr & 0x3ff,data);
}
-
+
/*********************
*
* Instruction fetch
@@ -203,7 +203,7 @@ void mb86235_device::execute_op(uint32_t h, uint32_t l)
* ALU
*
********************/
-
+
inline void mb86235_device::set_alu_flagsd(uint32_t val)
{
FCLR(AN|AZ);
@@ -236,7 +236,7 @@ inline uint32_t mb86235_device::get_prx(uint8_t which)
case 3: zero_prp(); break;
default: fatalerror("TGPx4: unimplemented get_prx %02x at pc=%08x\n",which & 7,m_core->ppc); break;
}
-
+
return res;
}
@@ -275,7 +275,7 @@ inline uint32_t mb86235_device::get_alureg(uint8_t which, bool isfloatop)
case 3: // constants
return (isfloatop == true) ? get_constfloat(which & 7) : get_constint(which & 7);
}
-
+
fatalerror("TGPx4: unimplemented get_alureg %02x at pc=%08x\n",which,m_core->ppc);
return 0;
}
@@ -293,7 +293,7 @@ inline uint32_t mb86235_device::get_mulreg(uint8_t which, bool isfloatop)
case 3: // constants
return (isfloatop == true) ? get_constfloat(which & 7) : get_constint(which & 7);
}
-
+
fatalerror("TGPx4: unimplemented get_mulreg %02x at pc=%08x\n",which,m_core->ppc);
return 0;
}
@@ -318,7 +318,7 @@ inline void mb86235_device::set_alureg(uint8_t which, uint32_t value)
}
inline void mb86235_device::decode_aluop(uint8_t opcode, uint32_t src1, uint32_t src2, uint8_t imm, uint8_t dst_which)
-{
+{
switch(opcode)
{
// floating point ops
@@ -357,7 +357,7 @@ inline void mb86235_device::decode_aluop(uint8_t opcode, uint32_t src1, uint32_t
double f1 = u2f(src1);
double f2 = u2f(src2);
double d;
-
+
if(opcode & 2)
d = fabs(f2)-fabs(f1);
else
@@ -389,7 +389,7 @@ inline void mb86235_device::decode_aluop(uint8_t opcode, uint32_t src1, uint32_t
else
exp += imm;
exp &= 0xff;
- src1 |= exp<<23;
+ src1 |= exp<<23;
set_alu_flagsd(src1);
set_alureg(dst_which,src1);
break;
@@ -455,19 +455,19 @@ inline void mb86235_device::decode_aluop(uint8_t opcode, uint32_t src1, uint32_t
uint32_t res;
FCLR(AU);
res = f2u(f);
- if(f<0)
- {
- FSET(AU);
- res=0;
+ if(f<0)
+ {
+ FSET(AU);
+ res=0;
};
FCLR(AZ);
- if(res==0)
+ if(res==0)
FSET(AZ);
FCLR(AV);
if(res>0xff)
- {
- FSET(AV);
- res=0xff;
+ {
+ FSET(AV);
+ res=0xff;
}
set_alureg(dst_which,res);
break;
@@ -525,10 +525,10 @@ inline void mb86235_device::decode_aluop(uint8_t opcode, uint32_t src1, uint32_t
if(opcode & 1)
{
FCLR(ZC);
- if(src1&0x80000000)
- {
- FSET(ZC);
- src1=0;
+ if(src1&0x80000000)
+ {
+ FSET(ZC);
+ src1=0;
}
}
set_alureg(dst_which,src1);
@@ -598,7 +598,7 @@ inline void mb86235_device::decode_aluop(uint8_t opcode, uint32_t src1, uint32_t
set_alu_flagsd(res);
set_alureg(dst_which,(uint32_t)res);
break;
- }
+ }
default:
fatalerror("TGPx4: unimplemented decode_aluop %02x at pc=%08x\n",opcode,m_core->ppc);
@@ -636,10 +636,10 @@ void mb86235_device::decode_mulop(bool isfmul, uint32_t src1, uint32_t src2, uin
#define GETAI2(x) ((x>>15)&0x1f)
#define GETAO(x) ((x>>10)&0x1f)
-#define GETMOP(x) ((x>>9)&0x1)
-#define GETMI1(x) ((x>>5)&0x0f)
-#define GETMI2(x) ((x>>0)&0x1f)
-#define GETMO(x) ((x>>27)&0x1f)
+#define GETMOP(x) ((x>>9)&0x1)
+#define GETMI1(x) ((x>>5)&0x0f)
+#define GETMI2(x) ((x>>0)&0x1f)
+#define GETMO(x) ((x>>27)&0x1f)
inline bool mb86235_device::get_alu_second_src(uint8_t which)
{
@@ -648,13 +648,13 @@ inline bool mb86235_device::get_alu_second_src(uint8_t which)
if((which & 0x1e) == 0x16) // ATRx
return false;
-
+
if((which & 0x0f) == 0x05) // ABS/FABS
return false;
-
+
if((which & 0x18) == 0x08) // floating point ops
return false;
-
+
return true;
}
@@ -662,7 +662,7 @@ void mb86235_device::do_alu1(uint32_t h, uint32_t l)
{
if(m_core->cur_fifo_state.has_stalled == true)
return;
-
+
if(h&(1<<9)) // ALU
{
uint8_t opcode = GETAOP(h);
@@ -679,7 +679,7 @@ void mb86235_device::do_alu1(uint32_t h, uint32_t l)
bool opcode = GETAOP(h) != 0;
uint32_t mulsrc1 = get_mulreg(GETAI1(h),false);
uint32_t mulsrc2 = get_mulreg(GETAI2(h),opcode);
- decode_mulop(opcode, mulsrc1, mulsrc2, GETAO(h));
+ decode_mulop(opcode, mulsrc1, mulsrc2, GETAO(h));
}
}
@@ -687,7 +687,7 @@ void mb86235_device::do_alu2(uint32_t h, uint32_t l)
{
if(m_core->cur_fifo_state.has_stalled == true)
return;
-
+
// ALU
uint8_t opcode = GETAOP(h);
uint32_t alusrc1 = get_alureg(GETAI1(h),false);
@@ -710,7 +710,7 @@ void mb86235_device::do_alu2(uint32_t h, uint32_t l)
* Transfer types
*
********************/
-
+
inline uint32_t mb86235_device::get_transfer_reg(uint8_t which)
{
switch(which >> 3)
@@ -722,7 +722,7 @@ inline uint32_t mb86235_device::get_transfer_reg(uint8_t which)
case 2:
switch(which & 7)
{
- case 0: return m_core->eb;
+ case 0: return m_core->eb;
//case 1: m_core->ebu = value; break;
//case 2: m_core->ebl = value; break;
case 3: return m_core->eo;
@@ -730,7 +730,7 @@ inline uint32_t mb86235_device::get_transfer_reg(uint8_t which)
case 5: return m_core->st;
case 6: return m_core->mod;
case 7: return m_core->lpc;
- default:
+ default:
fatalerror("TGPx4: unimplemented set_transfer_reg %02x at pc=%08x\n",which,m_core->ppc);
break;
}
@@ -754,13 +754,13 @@ inline uint32_t mb86235_device::get_transfer_reg(uint8_t which)
FCLR(IFE);
if(is_fifoin_empty() == true)
{
- FSET(IFE);
+ FSET(IFE);
m_core->cur_fifo_state.has_stalled = true;
if((m_core->st & RP) == 0)
m_core->cur_fifo_state.pc = m_core->ppc;
//else
- // fatalerror("check me %08x\n",m_core->ppc);
-
+ // fatalerror("check me %08x\n",m_core->ppc);
+
return 0;
}
@@ -770,17 +770,17 @@ inline uint32_t mb86235_device::get_transfer_reg(uint8_t which)
m_core->fifoin.rpos++;
m_core->fifoin.rpos &= FIFOIN_SIZE-1;
m_core->fifoin.num--;
-
+
return res;
}
}
}
}
-
+
fatalerror("TGPx4: unimplemented get_transfer_reg %02x at pc=%08x\n",which,m_core->ppc);
return 0;
}
-
+
inline void mb86235_device::set_transfer_reg(uint8_t which, uint32_t value)
{
switch(which >> 3)
@@ -794,7 +794,7 @@ inline void mb86235_device::set_transfer_reg(uint8_t which, uint32_t value)
case 2:
switch(which & 7)
{
- case 0: m_core->eb = value; break;
+ case 0: m_core->eb = value; break;
//case 1: m_core->ebu = value; break;
//case 2: m_core->ebl = value; break;
case 3: m_core->eo = value; break;
@@ -802,7 +802,7 @@ inline void mb86235_device::set_transfer_reg(uint8_t which, uint32_t value)
case 5: m_core->st = value; break;
case 6: m_core->mod = value; break;
case 7: m_core->lpc = value; break;
- default:
+ default:
fatalerror("TGPx4: unimplemented set_transfer_reg %02x at pc=%08x\n",which,m_core->ppc);
break;
}
@@ -833,9 +833,9 @@ inline void mb86235_device::set_transfer_reg(uint8_t which, uint32_t value)
m_core->cur_fifo_state.has_stalled = true;
if((m_core->st & RP) == 0)
m_core->cur_fifo_state.pc = m_core->ppc;
-
+
//else
- // fatalerror("check me (writes)");
+ // fatalerror("check me (writes)");
return;
}
@@ -848,24 +848,24 @@ inline void mb86235_device::set_transfer_reg(uint8_t which, uint32_t value)
break;
case 4: m_core->pdr = value; break;
case 5: m_core->ddr = value; break;
- case 6:
+ case 6:
if(value >= 24)
fatalerror("TGPx4: attempting to set prp with a %02x at pc=%08x\n",value,m_core->ppc);
- m_core->prp = value;
+ m_core->prp = value;
break;
- case 7:
+ case 7:
if(value >= 24)
fatalerror("TGPx4: attempting to set pwp with a %02x at pc=%08x\n",value,m_core->ppc);
- m_core->pwp = value;
+ m_core->pwp = value;
break;
- default:
+ default:
fatalerror("TGPx4: unimplemented set_transfer_reg %02x at pc=%08x\n",which,m_core->ppc);
break;
}
- break;
+ break;
default:
fatalerror("TGPx4: unimplemented set_transfer_reg dst %02x at pc=%08x\n",which,m_core->ppc);
break;
@@ -884,14 +884,14 @@ void mb86235_device::do_trans1_1(uint32_t h, uint32_t l)
uint8_t sr,dr;
uint32_t res;
- if(l & (1<<26)) //External transfer
+ if(l & (1<<26)) //External transfer
{
if(l & (1<<25)) // ext -> int
{
dr = (l >> 12) & 0x7f;
uint32_t addr = m_core->eb+m_core->eo;
uint8_t disp_offs = (l >> 19) & 0x3f;
-
+
res = m_dataa->read_dword(addr);
if(dr & 0x40)
{
@@ -916,7 +916,7 @@ void mb86235_device::do_trans1_1(uint32_t h, uint32_t l)
{
sr = (l>>19) & 0x7f;
dr = (l>>12) & 0x7f;
-
+
if(sr & 0x40)
{
if(sr == 0x58)
@@ -930,7 +930,7 @@ void mb86235_device::do_trans1_1(uint32_t h, uint32_t l)
}
else
res = get_transfer_reg(sr);
-
+
if(dr & 0x40)
{
if(dr == 0x58)
@@ -959,17 +959,17 @@ void mb86235_device::do_trans2_2(uint32_t h, uint32_t l)
{
uint8_t as = (h >> 1) & 0x1f;
uint8_t ada= (l >> 28) & 0xf;
- if(h&1)
+ if(h&1)
ada|=0x10;
set_transfer_reg(ada,get_transfer_reg(as));
break;
}
- default:
+ default:
fatalerror("TGPx4: unimplemented trans2_2 SDA %08x at pc=%08x\n",sda,m_core->ppc);
break;
}
-
+
// B bus
switch(sdb)
{
@@ -981,8 +981,8 @@ void mb86235_device::do_trans2_2(uint32_t h, uint32_t l)
set_transfer_reg(bd|0x20,get_transfer_reg(bs|0x20));
break;
}
-
- default:
+
+ default:
fatalerror("TGPx4: unimplemented trans2_2 SDB %08x at pc=%08x\n",sdb,m_core->ppc);
break;
}
@@ -1004,7 +1004,7 @@ void mb86235_device::do_trans1_2(uint32_t h, uint32_t l)
uint32_t res;
if(l&0x80000000)
disp_offs |= 1;
-
+
res = m_dataa->read_dword(addr);
if(dr & 0x40)
{
@@ -1027,7 +1027,7 @@ void mb86235_device::do_trans1_2(uint32_t h, uint32_t l)
uint8_t disp_offs = (h << 1) & 0x3e;
if(l&0x80000000)
disp_offs |= 1;
-
+
if(sr & 0x40)
{
if(sr == 0x58)
@@ -1041,7 +1041,7 @@ void mb86235_device::do_trans1_2(uint32_t h, uint32_t l)
}
else
res = get_transfer_reg(sr);
-
+
m_dataa->write_dword(addr,res);
if(disp_offs & 0x20)
m_core->eo -= disp_offs & 0x1f;
@@ -1055,7 +1055,7 @@ void mb86235_device::do_trans1_2(uint32_t h, uint32_t l)
dr = (l >> 24) &0x7f;
if(l & 0x80000000)
sr|=1;
-
+
if(sr & 0x40)
{
if(sr == 0x58)
@@ -1074,7 +1074,7 @@ void mb86235_device::do_trans1_2(uint32_t h, uint32_t l)
{
if(dr == 0x58)
fatalerror("TGPx4: illegal do_trans1_2 dr == 0x58 at pc=%08x\n",m_core->ppc);
-
+
bool isbbus = (dr & 0x20) == 0x20;
uint32_t addr = decode_ea(l & 0xf,dr & 7,(l >> 4) & 7, (l >> 7) & 0x3fff,isbbus);
write_bus(isbbus,addr,res);
@@ -1111,20 +1111,20 @@ inline void mb86235_device::push_pc(uint32_t pcval)
{
m_core->pcs[m_core->pcp++] = pcval;
m_core->pcp &= 3;
-// if(m_core->pcp & ~3)
-// fatalerror("TGPx4: push_pc overflow PCP=%08x PC=%08x\n",m_core->pcp,m_core->ppc);
+// if(m_core->pcp & ~3)
+// fatalerror("TGPx4: push_pc overflow PCP=%08x PC=%08x\n",m_core->pcp,m_core->ppc);
}
inline uint32_t mb86235_device::pop_pc()
{
m_core->pcp--;
m_core->pcp &= 3;
-// if(m_core->pcp & ~3)
-// fatalerror("TGPx4: pop_pc underflow PCP=%08x PC=%08x\n",m_core->pcp,m_core->ppc);
-
+// if(m_core->pcp & ~3)
+// fatalerror("TGPx4: pop_pc underflow PCP=%08x PC=%08x\n",m_core->pcp,m_core->ppc);
+
return m_core->pcs[m_core->pcp];
}
-
+
inline uint32_t mb86235_device::do_control_dst(uint32_t l)
{
switch((l>>12)&0xf)
@@ -1134,11 +1134,11 @@ inline uint32_t mb86235_device::do_control_dst(uint32_t l)
case 2: // absolute register AR
return m_core->ar[(l >> 6) & 7];
case 4: // absolute register AAx / ABx
- return (l & 1 << 11) ? m_core->ab[(l >> 6) & 7] : m_core->aa[(l >> 6) & 7];
+ return (l & 1 << 11) ? m_core->ab[(l >> 6) & 7] : m_core->aa[(l >> 6) & 7];
default:
fatalerror("TGPx4: unimplemented do_control_dst op mode %08x at pc=%08x\n",(l>>12) & 0xf,m_core->ppc);
}
-
+
return 0;
}
@@ -1153,13 +1153,13 @@ inline bool mb86235_device::decode_branch_jump(uint8_t which)
// test, should be 22
if(which < 14)
{
- const uint32_t condition_table[22] = {MN, MZ, MV, MU, ZD, NR, IL, ZC,
- AN, AZ, AV, AU, MD, AD, F0, F1,
+ const uint32_t condition_table[22] = {MN, MZ, MV, MU, ZD, NR, IL, ZC,
+ AN, AZ, AV, AU, MD, AD, F0, F1,
F2,IFF,IFE,OFF,OFE, 0};
return (m_core->st & condition_table[which]) != 0;
}
-
+
fatalerror("TGPx4: unimplemented decode_branch_jump mode %08x at pc=%08x\n",which,m_core->ppc);
return false;
}
@@ -1179,7 +1179,7 @@ void mb86235_device::do_control(uint32_t h, uint32_t l)
m_core->rpc = m_core->ar[(ef2 >> 13) & 7];
else
m_core->rpc = ef2;
-
+
FSET(RP); // set repeat flag
break;
case 0x02: // SETL
@@ -1187,7 +1187,7 @@ void mb86235_device::do_control(uint32_t h, uint32_t l)
m_core->lpc = m_core->ar[(ef2 >> 13) & 7];
else
m_core->lpc = ef2;
-
+
FSET(LP); // set repeat flag
break;
case 0x03: // CLRF
@@ -1280,7 +1280,7 @@ void mb86235_device::do_control(uint32_t h, uint32_t l)
m_core->delay_pc = m_core->pc + (l & 0xfff);
m_core->delay_pc&= 0xfff;
}
-
+
--m_core->lpc;
if(m_core->lpc == 1)
FCLR(LP);
@@ -1318,8 +1318,8 @@ void mb86235_device::do_control(uint32_t h, uint32_t l)
m_core->delay_pc = pop_pc();
break;
default:
- fatalerror("TGPx4: unimplemented control op %08x at pc=%08x\n",cop,m_core->ppc);
+ fatalerror("TGPx4: unimplemented control op %08x at pc=%08x\n",cop,m_core->ppc);
}
}
- \ No newline at end of file
+