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author Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:42 +0200
committer Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:57 +0200
commit22513fb6fe281f5ccb75aaddb6417a12a66c313d (patch)
tree3cf84032cc6482d685a8dbb57e015bd17c7f7fdc /src/devices/cpu/m6502/st2204.cpp
parente42c2d2874cf9c1092c01ab5ce9ef997d465ce25 (diff)
emumem: A little more speedup. cache and specific change syntax, and are not pointers anymore [O. Galibert]
The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
Diffstat (limited to 'src/devices/cpu/m6502/st2204.cpp')
-rw-r--r--src/devices/cpu/m6502/st2204.cpp27
1 files changed, 14 insertions, 13 deletions
diff --git a/src/devices/cpu/m6502/st2204.cpp b/src/devices/cpu/m6502/st2204.cpp
index 829ff74ac08..467e60465a5 100644
--- a/src/devices/cpu/m6502/st2204.cpp
+++ b/src/devices/cpu/m6502/st2204.cpp
@@ -67,8 +67,9 @@ st2202_device::st2202_device(const machine_config &mconfig, const char *tag, dev
void st2204_device::device_start()
{
std::unique_ptr<mi_st2204> intf = std::make_unique<mi_st2204>();
- intf->data = &space(AS_DATA);
- intf->dcache = space(AS_DATA).cache<0, 0, ENDIANNESS_LITTLE>();
+
+ space(AS_DATA).cache(intf->dcache);
+ space(AS_DATA).specific(intf->data);
intf->irr_enable = false;
intf->irr = 0;
intf->prr = 0;
@@ -178,55 +179,55 @@ const char *st2204_device::st2xxx_irq_name(int i) const
u8 st2204_device::mi_st2204::pread(u16 adr)
{
u16 bank = irq_service && irr_enable ? irr : prr;
- return data->read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff));
+ return data.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff));
}
u8 st2204_device::mi_st2204::preadc(u16 adr)
{
u16 bank = irq_service && irr_enable ? irr : prr;
- return dcache->read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff));
+ return dcache.read_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff));
}
void st2204_device::mi_st2204::pwrite(u16 adr, u8 val)
{
u16 bank = irq_service && irr_enable ? irr : prr;
- data->write_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff), val);
+ data.write_byte(u32(bank ^ 1) << 14 | (adr & 0x3fff), val);
}
u8 st2204_device::mi_st2204::dread(u16 adr)
{
- return data->read_byte(u32(drr) << 15 | (adr & 0x7fff));
+ return data.read_byte(u32(drr) << 15 | (adr & 0x7fff));
}
u8 st2204_device::mi_st2204::dreadc(u16 adr)
{
- return dcache->read_byte(u32(drr) << 15 | (adr & 0x7fff));
+ return dcache.read_byte(u32(drr) << 15 | (adr & 0x7fff));
}
void st2204_device::mi_st2204::dwrite(u16 adr, u8 val)
{
- data->write_byte(u32(drr) << 15 | (adr & 0x7fff), val);
+ data.write_byte(u32(drr) << 15 | (adr & 0x7fff), val);
}
u8 st2204_device::mi_st2204::read(u16 adr)
{
- return program->read_byte(adr);
+ return program.read_byte(adr);
}
u8 st2204_device::mi_st2204::read_sync(u16 adr)
{
- return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cache->read_byte(adr);
+ return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cprogram.read_byte(adr);
}
u8 st2204_device::mi_st2204::read_arg(u16 adr)
{
- return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cache->read_byte(adr);
+ return BIT(adr, 15) ? dreadc(adr) : BIT(adr, 14) ? preadc(adr) : cprogram.read_byte(adr);
}
u8 st2204_device::mi_st2204::read_dma(u16 adr)
{
if (BIT(adr, 15))
- return dcache->read_byte(u32(dmr) << 15 | (adr & 0x7fff));
+ return dcache.read_byte(u32(dmr) << 15 | (adr & 0x7fff));
else
return read(adr);
}
@@ -238,7 +239,7 @@ u8 st2204_device::mi_st2204::read_vector(u16 adr)
void st2204_device::mi_st2204::write(u16 adr, u8 val)
{
- program->write_byte(adr, val);
+ program.write_byte(adr, val);
}
unsigned st2204_device::st2xxx_bt_divider(int n) const