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author Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:42 +0200
committer Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:57 +0200
commit22513fb6fe281f5ccb75aaddb6417a12a66c313d (patch)
tree3cf84032cc6482d685a8dbb57e015bd17c7f7fdc /src/devices/cpu/i8085/i8085.cpp
parente42c2d2874cf9c1092c01ab5ce9ef997d465ce25 (diff)
emumem: A little more speedup. cache and specific change syntax, and are not pointers anymore [O. Galibert]
The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
Diffstat (limited to 'src/devices/cpu/i8085/i8085.cpp')
-rw-r--r--src/devices/cpu/i8085/i8085.cpp32
1 files changed, 16 insertions, 16 deletions
diff --git a/src/devices/cpu/i8085/i8085.cpp b/src/devices/cpu/i8085/i8085.cpp
index ab4c439871b..5460ab653ea 100644
--- a/src/devices/cpu/i8085/i8085.cpp
+++ b/src/devices/cpu/i8085/i8085.cpp
@@ -347,10 +347,10 @@ void i8085a_cpu_device::device_start()
}
}
- m_program = &space(AS_PROGRAM);
- m_cache = m_program->cache<0, 0, ENDIANNESS_LITTLE>();
- m_opcode_cache = has_space(AS_OPCODES) ? space(AS_OPCODES).cache<0, 0, ENDIANNESS_LITTLE>() : m_cache;
- m_io = &space(AS_IO);
+ space(AS_PROGRAM).cache(m_cprogram);
+ space(AS_PROGRAM).specific(m_program);
+ space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(m_copcodes);
+ space(AS_IO).specific(m_io);
/* resolve callbacks */
m_in_inta_func.resolve();
@@ -670,7 +670,7 @@ u8 i8085a_cpu_device::read_arg()
if (m_in_acknowledge)
return read_inta();
else
- return m_cache->read_byte(m_PC.w.l++);
+ return m_cprogram.read_byte(m_PC.w.l++);
}
PAIR i8085a_cpu_device::read_arg16()
@@ -684,8 +684,8 @@ PAIR i8085a_cpu_device::read_arg16()
}
else
{
- p.b.l = m_cache->read_byte(m_PC.w.l++);
- p.b.h = m_cache->read_byte(m_PC.w.l++);
+ p.b.l = m_cprogram.read_byte(m_PC.w.l++);
+ p.b.h = m_cprogram.read_byte(m_PC.w.l++);
}
return p;
}
@@ -693,7 +693,7 @@ PAIR i8085a_cpu_device::read_arg16()
u8 i8085a_cpu_device::read_op()
{
set_status(0xa2); // instruction fetch
- return m_opcode_cache->read_byte(m_PC.w.l++);
+ return m_copcodes.read_byte(m_PC.w.l++);
}
u8 i8085a_cpu_device::read_inta()
@@ -707,28 +707,28 @@ u8 i8085a_cpu_device::read_inta()
u8 i8085a_cpu_device::read_mem(u32 a)
{
set_status(0x82); // memory read
- return m_program->read_byte(a);
+ return m_program.read_byte(a);
}
void i8085a_cpu_device::write_mem(u32 a, u8 v)
{
set_status(0x00); // memory write
- m_program->write_byte(a, v);
+ m_program.write_byte(a, v);
}
void i8085a_cpu_device::op_push(PAIR p)
{
set_status(0x04); // stack push
- m_program->write_byte(--m_SP.w.l, p.b.h);
- m_program->write_byte(--m_SP.w.l, p.b.l);
+ m_program.write_byte(--m_SP.w.l, p.b.h);
+ m_program.write_byte(--m_SP.w.l, p.b.l);
}
PAIR i8085a_cpu_device::op_pop()
{
PAIR p;
set_status(0x86); // stack pop
- p.b.l = m_program->read_byte(m_SP.w.l++);
- p.b.h = m_program->read_byte(m_SP.w.l++);
+ p.b.l = m_program.read_byte(m_SP.w.l++);
+ p.b.h = m_program.read_byte(m_SP.w.l++);
return p;
}
@@ -1469,7 +1469,7 @@ void i8085a_cpu_device::execute_one(int opcode)
case 0xd3: // OUT nn
set_status(0x10);
m_WZ.d = read_arg();
- m_io->write_byte(m_WZ.d, m_AF.b.h);
+ m_io.write_byte(m_WZ.d, m_AF.b.h);
break;
case 0xd4: // CNC nnnn
op_call(!(m_AF.b.l & CF));
@@ -1505,7 +1505,7 @@ void i8085a_cpu_device::execute_one(int opcode)
case 0xdb: // IN nn
set_status(0x42);
m_WZ.d = read_arg();
- m_AF.b.h = m_io->read_byte(m_WZ.d);
+ m_AF.b.h = m_io.read_byte(m_WZ.d);
break;
case 0xdc: // CC nnnn
op_call(m_AF.b.l & CF);