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author | 2019-03-03 16:56:13 -0500 | |
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committer | 2019-03-03 16:56:13 -0500 | |
commit | 156619b401e85bfe14f771a59bd8d0272fa257a4 (patch) | |
tree | 4070fbab76bc74599de60c3fc974f242673e71e6 /src/devices/cpu/hpc/hpc.cpp | |
parent | 542a331fd2415f4a54da816bfbe8d3823ae3e050 (diff) |
Add skeleton CPU device and disassembler for HPC architecture
Diffstat (limited to 'src/devices/cpu/hpc/hpc.cpp')
-rw-r--r-- | src/devices/cpu/hpc/hpc.cpp | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/src/devices/cpu/hpc/hpc.cpp b/src/devices/cpu/hpc/hpc.cpp new file mode 100644 index 00000000000..6cf5f30eb37 --- /dev/null +++ b/src/devices/cpu/hpc/hpc.cpp @@ -0,0 +1,102 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/*************************************************************************** + + National Semiconductor High-Performance microController (HPC) + + Currently this device is just a stub with no actual execution core. + +***************************************************************************/ + +#include "emu.h" +#include "hpc.h" +#include "hpcdasm.h" + +// device type definitions +DEFINE_DEVICE_TYPE(HPC46104, hpc46104_device, "hpc46104", "HPC46104") + + +void hpc46104_device::internal_map(address_map &map) +{ + map(0x0000, 0x00bf).ram(); + map(0x00c0, 0x00c0).rw(FUNC(hpc46104_device::psw_r), FUNC(hpc46104_device::psw_w)); + map(0x00c4, 0x00cf).ram().share("core_regs"); + // TODO: many other internal registers + map(0x01c0, 0x02ff).ram(); +} + +std::unique_ptr<util::disasm_interface> hpc46104_device::create_disassembler() +{ + return std::make_unique<hpc16164_disassembler>(); +} + + +hpc_device::hpc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map) + : cpu_device(mconfig, type, tag, owner, clock) + , m_program_config("program", ENDIANNESS_LITTLE, 16, 16, 0, map) + , m_program(nullptr) + , m_core_regs(*this, "core_regs") + , m_psw(0) + , m_icount(0) +{ +} + +hpc46104_device::hpc46104_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : hpc_device(mconfig, HPC46104, tag, owner, clock, address_map_constructor(FUNC(hpc46104_device::internal_map), this)) +{ +} + +device_memory_interface::space_config_vector hpc_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(AS_PROGRAM, &m_program_config), + }; +} + + +void hpc_device::device_start() +{ + m_program = &space(AS_PROGRAM); + + set_icountptr(m_icount); + + state_add(HPC_PSW, "PSW", m_psw); + state_add(HPC_SP, "SP", m_core_regs[0]); + state_add(HPC_PC, "PC", m_core_regs[1]); + state_add(STATE_GENPC, "GENPC", m_core_regs[1]).callimport().noshow(); + state_add(STATE_GENPCBASE, "CURPC", m_core_regs[1]).callimport().noshow(); + state_add(HPC_A, "A", m_core_regs[2]); + state_add(HPC_K, "K", m_core_regs[3]); + state_add(HPC_B, "B", m_core_regs[4]); + state_add(HPC_X, "X", m_core_regs[5]); + + save_item(NAME(m_psw)); +} + +void hpc_device::device_reset() +{ + m_psw = 0x00; + std::fill_n(&m_core_regs[0], 6, 0x0000); +} + + +u8 hpc_device::psw_r() +{ + return m_psw; +} + +void hpc_device::psw_w(u8 data) +{ + m_psw = data; +} + + +void hpc_device::execute_run() +{ + m_icount = 0; +} + +void hpc_device::execute_set_input(int inputnum, int state) +{ + // TODO +} |