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author Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:42 +0200
committer Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:57 +0200
commit22513fb6fe281f5ccb75aaddb6417a12a66c313d (patch)
tree3cf84032cc6482d685a8dbb57e015bd17c7f7fdc /src/devices/cpu/dsp16/dsp16.cpp
parente42c2d2874cf9c1092c01ab5ce9ef997d465ce25 (diff)
emumem: A little more speedup. cache and specific change syntax, and are not pointers anymore [O. Galibert]
The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
Diffstat (limited to 'src/devices/cpu/dsp16/dsp16.cpp')
-rw-r--r--src/devices/cpu/dsp16/dsp16.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/devices/cpu/dsp16/dsp16.cpp b/src/devices/cpu/dsp16/dsp16.cpp
index f0c28c5ca32..778d2efb701 100644
--- a/src/devices/cpu/dsp16/dsp16.cpp
+++ b/src/devices/cpu/dsp16/dsp16.cpp
@@ -186,7 +186,7 @@ dsp16_device_base::dsp16_device_base(
{ "ram", ENDIANNESS_BIG, 16, yaau_bits, -1, std::move(data_map) },
{ "exm", ENDIANNESS_BIG, 16, 16, -1 } }
, m_yaau_bits(yaau_bits)
- , m_workram(*this, "workram"), m_spaces{ nullptr, nullptr, nullptr }, m_pcache(nullptr), m_workram_mask(0U)
+ , m_workram(*this, "workram"), m_spaces{ nullptr, nullptr, nullptr }, m_workram_mask(0U)
, m_drc_cache(CACHE_SIZE), m_core(nullptr, [] (core_state *core) { core->~core_state(); }), m_recompiler()
, m_cache_mode(cache::NONE), m_phase(phase::PURGE), m_int_enable{ 0U, 0U }, m_flags(FLAGS_NONE), m_cache_ptr(0U), m_cache_limit(0U), m_cache_iterations(0U)
, m_exm_in(1U), m_int_in(CLEAR_LINE), m_iack_out(1U)
@@ -231,7 +231,7 @@ void dsp16_device_base::device_start()
m_spaces[AS_PROGRAM] = &space(AS_PROGRAM);
m_spaces[AS_DATA] = &space(AS_DATA);
m_spaces[AS_IO] = &space(AS_IO);
- m_pcache = m_spaces[AS_PROGRAM]->cache<1, -1, ENDIANNESS_BIG>();
+ m_spaces[AS_PROGRAM]->cache(m_pcache);
m_workram_mask = u16((m_workram.bytes() >> 1) - 1);
if (allow_drc())
@@ -1133,7 +1133,7 @@ template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_so
set_predicate(predicate);
if (fetch_target)
- *fetch_target = m_pcache->read_word(fetch_addr);
+ *fetch_target = m_pcache.read_word(fetch_addr);
if (phase::OP1 == m_phase)
{
@@ -1274,7 +1274,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache()
m_core->op_dau_ad(op) = d;
if (last_instruction)
{
- m_rom_data = m_pcache->read_word(m_core->xaau_pt);
+ m_rom_data = m_pcache.read_word(m_core->xaau_pt);
m_phase = phase::OP2;
}
else
@@ -1289,7 +1289,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache()
m_core->op_dau_ad(op) = m_core->dau_f1(op);
m_core->dau_temp = s16(m_core->dau_y >> 16);
m_core->dau_set_y(yaau_read<Debugger>(op));
- m_rom_data = m_pcache->read_word(m_core->xaau_pt);
+ m_rom_data = m_pcache.read_word(m_core->xaau_pt);
m_phase = phase::OP2;
break;
@@ -1298,7 +1298,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache()
m_core->dau_set_y(yaau_read<Debugger>(op));
if (last_instruction)
{
- m_rom_data = m_pcache->read_word(m_core->xaau_pt);
+ m_rom_data = m_pcache.read_word(m_core->xaau_pt);
m_phase = phase::OP2;
}
else
@@ -1384,7 +1384,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache()
// overlapped fetch of next instruction from ROM
mode_change = true;
m_cache_mode = cache::NONE;
- m_cache[m_cache_ptr = 0] = m_pcache->read_word(m_core->xaau_pc);
+ m_cache[m_cache_ptr = 0] = m_pcache.read_word(m_core->xaau_pc);
m_st_pcbase = m_core->xaau_pc;
}
else
@@ -1420,7 +1420,7 @@ inline void dsp16_device_base::overlap_rom_data_read()
case 0x19: // F1 ; y = a0 ; x = *pt++[i]
case 0x1b: // F1 ; y = a1 ; x = *pt++[i]
case 0x1f: // F1 ; y = Y ; x = *pt++[i]
- m_rom_data = m_pcache->read_word(m_core->xaau_pt);
+ m_rom_data = m_pcache.read_word(m_core->xaau_pt);
break;
}
}