diff options
author | 2017-12-17 15:31:20 +0000 | |
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committer | 2017-12-20 09:15:11 +0000 | |
commit | f1a8729c5c2cd575a1815afea20b48113edf389b (patch) | |
tree | 380ffa12cba7626d304c9452b01290804caf41e1 /src/devices/bus/isa/xtide.cpp | |
parent | 286bc6b5126d1a2eec11fdca8c437bed88793e68 (diff) |
ATA: Simplified class hierarchy so there is no ambiguity with 16 & 32 bit methods. Removed the memory system read/write handler trampolines from the ATA devices as they are not required. (nw)
Diffstat (limited to 'src/devices/bus/isa/xtide.cpp')
-rw-r--r-- | src/devices/bus/isa/xtide.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/devices/bus/isa/xtide.cpp b/src/devices/bus/isa/xtide.cpp index 29656b7c464..a8df13dee9c 100644 --- a/src/devices/bus/isa/xtide.cpp +++ b/src/devices/bus/isa/xtide.cpp @@ -63,13 +63,13 @@ READ8_MEMBER( xtide_device::read ) if (offset == 0) { - uint16_t data16 = m_ata->read16_cs0(offset & 7); + uint16_t data16 = m_ata->read_cs0(offset & 7); result = data16 & 0xff; m_d8_d15_latch = data16 >> 8; } else if (offset < 8) { - result = m_ata->read16_cs0(offset & 7, 0xff); + result = m_ata->read_cs0(offset & 7, 0xff); } else if (offset == 8) { @@ -77,7 +77,7 @@ READ8_MEMBER( xtide_device::read ) } else { - result = m_ata->read16_cs1(offset & 7, 0xff); + result = m_ata->read_cs1(offset & 7, 0xff); } // logerror("%s xtide_device::read: offset=%d, result=%2X\n",device->machine().describe_context(),offset,result); @@ -93,11 +93,11 @@ WRITE8_MEMBER( xtide_device::write ) { // Data register transfer low byte and latched high uint16_t data16 = (m_d8_d15_latch << 8) | data; - m_ata->write16_cs0(offset & 7, data16); + m_ata->write_cs0(offset & 7, data16); } else if (offset < 8) { - m_ata->write16_cs0(offset & 7, data, 0xff); + m_ata->write_cs0(offset & 7, data, 0xff); } else if (offset == 8) { @@ -105,7 +105,7 @@ WRITE8_MEMBER( xtide_device::write ) } else { - m_ata->write16_cs1(offset & 7, data, 0xff); + m_ata->write_cs1(offset & 7, data, 0xff); } } |