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author cracyc <cracyc@users.noreply.github.com>2016-03-19 21:13:00 -0500
committer cracyc <cracyc@users.noreply.github.com>2016-03-19 21:13:00 -0500
commit8fc8fc5ca3a402ce4ee0292c2d8695d9ffcf1013 (patch)
tree6cbba239a80c62b9d3a3b3f028c09dce19f64f34 /src/devices/bus/isa/sblaster.cpp
parent9328fa902887c15a58c95bfdf69cfa28e9a012c2 (diff)
pcat_dyn: add sound and mark toursol working [Carl]
Diffstat (limited to 'src/devices/bus/isa/sblaster.cpp')
-rw-r--r--src/devices/bus/isa/sblaster.cpp115
1 files changed, 114 insertions, 1 deletions
diff --git a/src/devices/bus/isa/sblaster.cpp b/src/devices/bus/isa/sblaster.cpp
index 6895716c7af..20dd6c6b2ed 100644
--- a/src/devices/bus/isa/sblaster.cpp
+++ b/src/devices/bus/isa/sblaster.cpp
@@ -1069,6 +1069,118 @@ WRITE8_MEMBER( sb16_device::mixer_w )
return;
}
+void sb8_device::drq_w(int state)
+{
+ switch(m_config->read() & 0x0c)
+ {
+ case 0:
+ default:
+ m_isa->drq1_w(state);
+ break;
+ case 4:
+ m_isa->drq3_w(state);
+ break;
+ }
+}
+
+void sb8_device::irq_w(int state, int source)
+{
+ switch(m_config->read() & 0x03)
+ {
+ case 0:
+ default:
+ m_isa->irq5_w(state);
+ break;
+ case 1:
+ m_isa->irq7_w(state);
+ break;
+ }
+}
+
+// TODO: sb16 irq/drq is software set
+void sb16_device::drq_w(int state)
+{
+ switch(m_config->read() & 0x0c)
+ {
+ case 0:
+ default:
+ m_isa->drq1_w(state);
+ break;
+ case 4:
+ m_isa->drq3_w(state);
+ break;
+ }
+}
+
+void sb16_device::irq_w(int state, int source)
+{
+ if(state)
+ m_dsp.irq_active |= source;
+ else
+ m_dsp.irq_active &= ~source;
+
+ switch(m_config->read() & 0x03)
+ {
+ case 0:
+ default:
+ m_isa->irq5_w(m_dsp.irq_active != 0);
+ break;
+ case 1:
+ m_isa->irq7_w(m_dsp.irq_active != 0);
+ break;
+ }
+}
+
+void sb16_device::drq16_w(int state)
+{
+ switch(m_config->read() & 0xc0)
+ {
+ case 0:
+ default:
+ m_isa->drq5_w(state);
+ break;
+ case 0x40:
+ m_isa->drq6_w(state);
+ break;
+ case 0x80:
+ m_isa->drq7_w(state);
+ break;
+ }
+}
+
+static INPUT_PORTS_START( sb8 )
+ PORT_START("CONFIG")
+ PORT_CONFNAME(0x03, 0x00, "Default IRQ")
+ PORT_CONFSETTING( 0x00, "IRQ5")
+ PORT_CONFSETTING( 0x01, "IRQ7")
+ PORT_CONFNAME(0x0c, 0x00, "Default DMA")
+ PORT_CONFSETTING( 0x00, "DMA1")
+ PORT_CONFSETTING( 0x04, "DMA3")
+ //PORT_CONFNAME(0x30, 0x00, "Default Port Base")
+ //PORT_CONFSETTING( 0x00, "220")
+ //PORT_CONFSETTING( 0x10, "240")
+ //PORT_CONFSETTING( 0x20, "260")
+INPUT_PORTS_END
+
+static INPUT_PORTS_START( sb16 )
+ PORT_INCLUDE(sb8)
+ PORT_MODIFY("CONFIG")
+ PORT_CONFNAME(0xc0, 0x00, "Default DMA16")
+ PORT_CONFSETTING( 0x00, "DMA5")
+ PORT_CONFSETTING( 0x40, "DMA6")
+ PORT_CONFSETTING( 0x80, "DMA7")
+INPUT_PORTS_END
+
+ioport_constructor sb8_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME(sb8);
+}
+
+ioport_constructor sb16_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME(sb16);
+}
+
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
@@ -1107,7 +1219,8 @@ sb_device::sb_device(const machine_config &mconfig, device_type type, const char
m_dacl(*this, "sbdacl"),
m_dacr(*this, "sbdacr"),
m_joy(*this, "pc_joy"),
- m_mdout(*this, "mdout"), m_dack_out(0), m_onebyte_midi(false), m_uart_midi(false), m_uart_irq(false), m_mpu_midi(false), m_rx_waiting(0), m_tx_waiting(0), m_xmit_read(0), m_xmit_write(0), m_recv_read(0), m_recv_write(0), m_tx_busy(false), m_timer(nullptr)
+ m_mdout(*this, "mdout"),
+ m_config(*this, "CONFIG"), m_dack_out(0), m_onebyte_midi(false), m_uart_midi(false), m_uart_irq(false), m_mpu_midi(false), m_rx_waiting(0), m_tx_waiting(0), m_xmit_read(0), m_xmit_write(0), m_recv_read(0), m_recv_write(0), m_tx_busy(false), m_timer(nullptr)
{
}