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author Vas Crabb <vas@vastheman.com>2018-01-28 14:25:52 +1100
committer Vas Crabb <vas@vastheman.com>2018-01-28 14:25:52 +1100
commit4e8bb7c7e5c84ee384fd2c3b68896ca74cff9884 (patch)
tree5a185ef6a4070f53ad73122f280ca872f7580719 /src/devices/bus/isa/mach32.cpp
parent46af74afdfc4735a47db4ccea6263932e118b198 (diff)
srcclean and regenerate localisations (nw)
Diffstat (limited to 'src/devices/bus/isa/mach32.cpp')
-rw-r--r--src/devices/bus/isa/mach32.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/devices/bus/isa/mach32.cpp b/src/devices/bus/isa/mach32.cpp
index 7d498310a28..8f58eb4858c 100644
--- a/src/devices/bus/isa/mach32.cpp
+++ b/src/devices/bus/isa/mach32.cpp
@@ -92,7 +92,7 @@ READ16_MEMBER(mach32_8514a_device::mach32_config1_r)
* bits 6-7 16bpp colour mode (0=555, 1=565, 2=655, 3=664)
* bit 8 Multiplex pixels - processes 4 pixels in parallel by the DAC
* bit 9 24bpp config (0=3Bytes/pixel, 1=4Bytes/pixel)
- * bit 10 24bpp colour order (0=RGB, LSB reserved in 4Bpp, 1=BGR, MSB reserved in 4Bpp)
+ * bit 10 24bpp colour order (0=RGB, LSB reserved in 4Bpp, 1=BGR, MSB reserved in 4Bpp)
* bit 11 Display pixel size to be written
* bits 12-13 DAC extended address inputs RS2,RS3
* bit 14 Enabled 8-bit DAC (0=6-bit)
@@ -164,7 +164,7 @@ void mach32_device::ati_define_video_mode()
ati_vga_device::ati_define_video_mode();
return;
}
-
+
set_dot_clock();
}