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author | 2015-09-13 08:41:44 +0200 | |
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committer | 2015-09-13 08:41:44 +0200 | |
commit | f88cefad27a1737c76e09d99c9fb43e173506081 (patch) | |
tree | 2d8167d03579c46e226471747eb4407bd00ed6fa /src/devices/bus/generic/ram.h | |
parent | e92ac9e0fa8e99869894bea00589bbb526be30aa (diff) |
Move all devices into separate part of src tree (nw)
Diffstat (limited to 'src/devices/bus/generic/ram.h')
-rw-r--r-- | src/devices/bus/generic/ram.h | 109 |
1 files changed, 109 insertions, 0 deletions
diff --git a/src/devices/bus/generic/ram.h b/src/devices/bus/generic/ram.h new file mode 100644 index 00000000000..ac3cfdbb113 --- /dev/null +++ b/src/devices/bus/generic/ram.h @@ -0,0 +1,109 @@ +// license:BSD-3-Clause +// copyright-holders:Fabio Priuli +#ifndef __GENERIC_RAM_H +#define __GENERIC_RAM_H + +#include "slot.h" + + +// ======================> generic_ram_plain_device + +class generic_ram_plain_device : public device_t, + public device_generic_cart_interface +{ +public: + // construction/destruction + generic_ram_plain_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 size, const char *shortname, const char *source); + + // device-level overrides + virtual void device_start(); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_ram); + virtual DECLARE_WRITE8_MEMBER(write_ram); + +private: + UINT32 m_size; +}; + + +// ======================> generic_ram_linear_device + +class generic_ram_linear_device : public device_t, + public device_generic_cart_interface +{ +public: + // construction/destruction + generic_ram_linear_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 size, const char *shortname, const char *source); + + // device-level overrides + virtual void device_start(); + + // reading and writing + virtual DECLARE_READ8_MEMBER(read_ram); + virtual DECLARE_WRITE8_MEMBER(write_ram); + +private: + UINT32 m_size; +}; + + +// ======================> generic_ram_*k_plain_device + +class generic_ram_32k_plain_device : public generic_ram_plain_device +{ +public: + // construction/destruction + generic_ram_32k_plain_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); +}; + +class generic_ram_64k_plain_device : public generic_ram_plain_device +{ +public: + // construction/destruction + generic_ram_64k_plain_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); +}; + +class generic_ram_128k_plain_device : public generic_ram_plain_device +{ +public: + // construction/destruction + generic_ram_128k_plain_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); +}; + + +// ======================> generic_ram_*k_linear_device + +class generic_ram_32k_linear_device : public generic_ram_linear_device +{ +public: + // construction/destruction + generic_ram_32k_linear_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); +}; + +class generic_ram_64k_linear_device : public generic_ram_linear_device +{ +public: + // construction/destruction + generic_ram_64k_linear_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); +}; + +class generic_ram_128k_linear_device : public generic_ram_linear_device +{ +public: + // construction/destruction + generic_ram_128k_linear_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); +}; + + + +// device type definition +extern const device_type GENERIC_RAM_32K_PLAIN; +extern const device_type GENERIC_RAM_64K_PLAIN; +extern const device_type GENERIC_RAM_128K_PLAIN; +extern const device_type GENERIC_RAM_32K_LINEAR; +extern const device_type GENERIC_RAM_64K_LINEAR; +extern const device_type GENERIC_RAM_128K_LINEAR; + + +#endif |