summaryrefslogtreecommitdiffstatshomepage
path: root/nl_examples
diff options
context:
space:
mode:
author couriersud <couriersud@arcor.de>2015-06-30 21:46:42 +0200
committer couriersud <couriersud@arcor.de>2015-06-30 21:47:01 +0200
commit045ffafb42c06066048a0e66308e7df4040affce (patch)
tree3ac2217b0c04c9189147db3f5e21a386e409e764 /nl_examples
parent876d364e0f6e72f052d6e81ddf62c983cd815187 (diff)
Added Voltage source and Current source to netlist. [Couriersud]
Diffstat (limited to 'nl_examples')
-rw-r--r--nl_examples/vs_cs.c50
1 files changed, 50 insertions, 0 deletions
diff --git a/nl_examples/vs_cs.c b/nl_examples/vs_cs.c
new file mode 100644
index 00000000000..4e6bb9615fe
--- /dev/null
+++ b/nl_examples/vs_cs.c
@@ -0,0 +1,50 @@
+/*
+ * vs_cs.c
+ *
+ * Voltage and current source test
+ *
+ */
+
+#include "netlist/devices/net_lib.h"
+
+NETLIST_START(rc)
+
+ /*
+ * delay circuit
+ *
+ */
+
+ /* Standard stuff */
+
+ SOLVER(Solver, 48000)
+ PARAM(Solver.ACCURACY, 1e-6)
+ CLOCK(clk, 20000)
+
+ /* Voltage source. Inner resistance will make clock visible */
+
+ RES(R1, 1000)
+ VS(VS1, 1)
+ NET_C(R1.1, clk)
+ NET_C(R1.2, VS1.P)
+ NET_C(GND, VS1.N)
+
+ /* Current source. Current flows from "+" to "-", thus for a source we
+ * need negative current
+ */
+
+ RES(R2, 1000)
+ RES(R3, 1000)
+ CS(CS1, -0.001)
+ NET_C(CS1.P, R2.1)
+ NET_C(R2.2, R3.1)
+ NET_C(GND, CS1.N, R3.2)
+
+ CAP(C1, CAP_U(1))
+ NET_C(C1.1, R3.1)
+ NET_C(C1.2, R3.2)
+
+
+ LOG(tt, VS1.P)
+ LOG(tx, R2.2)
+
+NETLIST_END()