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author Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:42 +0200
committer Olivier Galibert <galibert@pobox.com>2020-05-25 16:42:57 +0200
commit22513fb6fe281f5ccb75aaddb6417a12a66c313d (patch)
tree3cf84032cc6482d685a8dbb57e015bd17c7f7fdc /docs/source/techspecs
parente42c2d2874cf9c1092c01ab5ce9ef997d465ce25 (diff)
emumem: A little more speedup. cache and specific change syntax, and are not pointers anymore [O. Galibert]
The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
Diffstat (limited to 'docs/source/techspecs')
-rw-r--r--docs/source/techspecs/device_rom_interface.rst21
1 files changed, 9 insertions, 12 deletions
diff --git a/docs/source/techspecs/device_rom_interface.rst b/docs/source/techspecs/device_rom_interface.rst
index 576800e634a..366fa763233 100644
--- a/docs/source/techspecs/device_rom_interface.rst
+++ b/docs/source/techspecs/device_rom_interface.rst
@@ -15,12 +15,13 @@ as rom. In the region/block cases, banking is automatically handled.
2. Setup
--------
-| **device_rom_interface**\ (const machine_config &mconfig, device_t &device, u8 addrwidth, endianness_t endian = ENDIANNESS_LITTLE, u8 datawidth = 8)
+| device_rom_interface<AddrWidth, DataWidth=0, AddrShift=0, Endian=ENDIANNESS_LITTLE>
-The constructor of the interface wants, in addition to the standard
-parameters, the address bus width of the dedicated bus. In addition
-the endianness (if not little endian or byte-sized bus) and data bus
-width (if not byte) can be provided.
+The interface is a template that takes the address bus width of the
+dedicated bus as a parameter. In addition the data bus width (if not
+byte), address shift (if not 0) and endianness (if not little endian
+or byte-sized bus) can be provided. Data bus width is 0 for byte, 1
+for word, etc.
| **MCFG_DEVICE_ADDRESS_MAP**\ (AS_0, map)
@@ -41,14 +42,10 @@ rom description for the system, it will be automatically picked up as
the connected rom. An address map has priority over the region if
present in the machine config.
-| void **set_rom_endianness**\ (endianness_t endian)
-| void **set_rom_data_width**\ (u8 width)
-| void **set_rom_addr_width**\ (u8 width)
+| void **override_address_width**\ (u8 width)
-These methods, intended for generic devices with indefinite hardware
-specifications, override the endianness, data bus width and address
-bus width assigned through the constructor. They must be called from
-within the device before **config_complete** time.
+This method allows to override the address bus width. It must be
+called from within the device before **config_complete** time.
| void **set_rom**\ (const void \*base, u32 size);