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author mooglyguy <therealmogminer@gmail.com>2018-11-08 20:59:02 +0100
committer mooglyguy <therealmogminer@gmail.com>2018-11-08 20:59:33 +0100
commitffeabc4560e10b782cf2015e6fddf3c5dfdc7583 (patch)
tree4c4740216d3a3994a18782a1bc04bd860fe56ef1
parent7301399d2e41c797842a5a813843d88099c31715 (diff)
-indy_indigo2.cpp: Various changes: [Ryan Holtz]
* Split Indigo 2 into a derived class. * Eliminated MACHINE_CONFIG_START/END. * Hooked up pullups on EISA I/O space. -ioc2.cpp: Various changes: [Ryan Holtz] * Converted to use logmacro. * Made logging more verbose. * Added savestate support. * Hooked up Timer1/Timer0 interrupts. -hpc3.cpp: Various changes: [Ryan Holtz] * Updated to MAME code standards. * Converted to use logmacro. * Made logging more verbose. * Added savestate support. * Partially hooked up second SCSI controller for Indigo 2. * Hooked up second DAC. * Fixed a bug that prevented the DAC DMA timer from stopping. * Hooked up PIO/DMA config register logging. -sgi.cpp: Various changes: [Ryan Holtz] * Updated to MAME code standards. * Converted to use logmacro. * Made logging more verbose. * Made RPSS counter more accurate. * Added semaphore registers. -newport.cpp: Various changes: [Ryan Holtz] * Updated to MAME code standards. * Converted to use logmacro. * Made logging more verbose.
-rw-r--r--src/mame/drivers/indy_indigo2.cpp211
-rw-r--r--src/mame/machine/hpc3.cpp415
-rw-r--r--src/mame/machine/hpc3.h48
-rw-r--r--src/mame/machine/ioc2.cpp251
-rw-r--r--src/mame/machine/ioc2.h4
-rw-r--r--src/mame/machine/sgi.cpp714
-rw-r--r--src/mame/machine/sgi.h92
-rw-r--r--src/mame/video/newport.cpp1871
-rw-r--r--src/mame/video/newport.h238
9 files changed, 2130 insertions, 1714 deletions
diff --git a/src/mame/drivers/indy_indigo2.cpp b/src/mame/drivers/indy_indigo2.cpp
index a7dec8acfd3..ff20c6d8549 100644
--- a/src/mame/drivers/indy_indigo2.cpp
+++ b/src/mame/drivers/indy_indigo2.cpp
@@ -4,21 +4,39 @@
*
* SGI IP22 Indigo2/Indy workstation
*
-* Todo: Fix tod clock set problem
-* Fix NVRAM saving
-* Fix SCSI DMA to handle chains properly
-* Probably many more things
+* Known Issues:
+* - The proper hookup for the MAC address is unknown, requiring
+* a fake MAC to be set up before any IRIX installers will proceed.
+* - The IRIX 6.5.x installer kernel-panics on startup.
+* - The IRIX 5.3 installer hangs after loading.
+* - The Gentoo Linux live CD hangs on starting the kernel.
+* - The disk formatting/partitioning utility for IRIX, fx, has
+* various issues, from the disk formatting too quickly to hanging
+* when exercising the disk.
+* - Disk accesses frequently result in a "SYNC negotiation error"
+* message.
*
* Memory map:
*
+* 00000000 - 0007ffff Alias for first 512kbyte of RAM
+* 00080000 - 0008ffff EISA I/O space (pullups on Indy)
+* 00090000 - 0009ffff EISA I/O space Alias (pullups on Indy)
+* 000a0000 - 07ffffff EISA Memory
+* 08000000 - 17ffffff Low System Memory
* 18000000 - 1effffff RESERVED - Unused
* 1f000000 - 1f3fffff GIO - GFX
* 1f400000 - 1f5fffff GIO - EXP0
* 1f600000 - 1f9fffff GIO - EXP1 - Unused
-* 1fa00000 - 1fa02047 Memory Controller
+* 1fa00000 - 1fa1ffff Memory Controller
* 1fb00000 - 1fb1a7ff HPC3 CHIP1
* 1fb80000 - 1fb9a7ff HPC3 CHIP0
-* 1fc00000 - 1fc7ffff BIOS
+* 1fc00000 - 1fffffff BIOS
+* 20000000 - 2fffffff High System Memory
+* 30000000 - 7fffffff Reserved
+* 80000000 - ffffffff EISA Memory
+*
+* IP22/24 has 2 pieces of PC-compatible hardware: the 8042 PS/2 keyboard/mouse
+* interface and the 8254 PIT. Both are licensed cores embedded in the IOC custom chip.
*
* References used:
* MipsLinux: http://www.mips-linux.org/
@@ -29,14 +47,15 @@
* NetBSD: http://www.netbsd.org/
* gxemul: http://gavare.se/gxemul/
*
-* Gentoo LiveCD r5 boot instructions:
-* mess -cdrom gentoor5.chd ip225015
-* enter the command interpreter and type "sashARCS". press enter and
-* it'll autoboot.
+* Gentoo LiveCD r5 boot instructions:
+* - Specify an appropriate LiveCD image at the command line.
+* - Enter the command interpreter and type "sashARCS". Press enter and
+* it will autoboot.
*
-* IRIX boot instructions:
-* mess -cdrom irix656inst1.chd ip225015
-* at the menu, choose either "run diagnostics" or "install system software"
+* IRIX boot instructions:
+* - Specify an appropriate IRIX CD image at the command line.
+* - At the menu, choose either "run diagnostics" or "install
+* system software".
*
\*********************************************************************/
@@ -72,7 +91,8 @@ public:
, m_mainram(*this, "mainram")
, m_mem_ctrl(*this, "memctrl")
, m_scsi_ctrl(*this, "wd33c93")
- , m_dac(*this, "dac")
+ , m_ldac(*this, "ldac")
+ , m_rdac(*this, "rdac")
, m_newport(*this, "newport")
, m_hal2(*this, HAL2_TAG)
, m_hpc3(*this, HPC3_TAG)
@@ -81,22 +101,21 @@ public:
{
}
+ void ip22_base(machine_config &config);
void ip225015(machine_config &config);
void ip224613(machine_config &config);
- void ip244415(machine_config &config);
- void init_ip225015();
-
-private:
- virtual void machine_start() override;
+protected:
virtual void machine_reset() override;
+ DECLARE_READ32_MEMBER(unknown_r);
DECLARE_READ32_MEMBER(enet_r);
DECLARE_WRITE32_MEMBER(enet_w);
+ DECLARE_READ32_MEMBER(eisa_io_r);
DECLARE_WRITE32_MEMBER(ip22_write_ram);
- void ip225015_map(address_map &map);
+ void ip22_map(address_map &map);
static void cdrom_config(device_t *device);
@@ -109,7 +128,8 @@ private:
required_shared_ptr<uint32_t> m_mainram;
required_device<sgi_mc_device> m_mem_ctrl;
required_device<wd33c93_device> m_scsi_ctrl;
- required_device<dac_16bit_r2r_twos_complement_device> m_dac;
+ required_device<dac_16bit_r2r_twos_complement_device> m_ldac;
+ required_device<dac_16bit_r2r_twos_complement_device> m_rdac;
required_device<newport_video_device> m_newport;
required_device<hal2_device> m_hal2;
required_device<hpc3_device> m_hpc3;
@@ -124,6 +144,23 @@ private:
/*static*/ char const *const ip22_state::IOC2_TAG = "ioc2";
/*static*/ char const *const ip22_state::RTC_TAG = "rtc";
+class ip24_state : public ip22_state
+{
+public:
+ ip24_state(const machine_config &mconfig, device_type type, const char *tag)
+ : ip22_state(mconfig, type, tag)
+ , m_scsi_ctrl2(*this, "wd33c93_2")
+ {
+ }
+
+ void ip244415(machine_config &config);
+
+private:
+ void ip24_map(address_map &map);
+
+ required_device<wd33c93_device> m_scsi_ctrl2;
+};
+
#define VERBOSE_LEVEL ( 0 )
inline void ATTR_PRINTF(3,4) ip22_state::verboselog(int n_level, const char *s_fmt, ... )
@@ -162,6 +199,11 @@ WRITE32_MEMBER(ip22_state::enet_w)
}
}
+READ32_MEMBER(ip22_state::eisa_io_r)
+{
+ return 0xffffffff;
+}
+
// a bit hackish, but makes the memory detection work properly and allows a big cleanup of the mapping
WRITE32_MEMBER(ip22_state::ip22_write_ram)
{
@@ -181,29 +223,43 @@ WRITE32_MEMBER(ip22_state::ip22_write_ram)
COMBINE_DATA(&m_mainram[offset]);
}
-void ip22_state::ip225015_map(address_map &map)
+READ32_MEMBER(ip22_state::unknown_r)
+{
+ return 0x043b2800;
+}
+
+void ip22_state::ip22_map(address_map &map)
{
map(0x00000000, 0x0007ffff).bankrw("bank1"); /* mirror of first 512k of main RAM */
+ map(0x00080000, 0x0009ffff).r(FUNC(ip22_state::eisa_io_r));
map(0x08000000, 0x0fffffff).share("mainram").ram().w(FUNC(ip22_state::ip22_write_ram)); /* 128 MB of main RAM */
map(0x1f0f0000, 0x1f0f1fff).rw(m_newport, FUNC(newport_video_device::rex3_r), FUNC(newport_video_device::rex3_w));
+ //map(0x1f4f0100, 0x1f4f0103).r(FUNC(ip22_state::unknown_r));
map(0x1fa00000, 0x1fa1ffff).rw(m_mem_ctrl, FUNC(sgi_mc_device::read), FUNC(sgi_mc_device::write));
+
+ map(0x1fb80000, 0x1fb8ffff).rw(m_hpc3, FUNC(hpc3_device::pbusdma_r), FUNC(hpc3_device::pbusdma_w));
map(0x1fb90000, 0x1fb9ffff).rw(m_hpc3, FUNC(hpc3_device::hd_enet_r), FUNC(hpc3_device::hd_enet_w));
map(0x1fbb0000, 0x1fbb0003).ram(); /* unknown, but read a lot and discarded */
- map(0x1fbc0000, 0x1fbc7fff).rw(m_hpc3, FUNC(hpc3_device::hd0_r), FUNC(hpc3_device::hd0_w));
- map(0x1fbc8000, 0x1fbcffff).rw(m_hpc3, FUNC(hpc3_device::unkpbus0_r), FUNC(hpc3_device::unkpbus0_w)).share("unkpbus0");
- map(0x1fb80000, 0x1fb8ffff).rw(m_hpc3, FUNC(hpc3_device::pbusdma_r), FUNC(hpc3_device::pbusdma_w));
+ map(0x1fbc0000, 0x1fbc7fff).rw(m_hpc3, FUNC(hpc3_device::hd_r<0>), FUNC(hpc3_device::hd_w<0>));
map(0x1fbd4000, 0x1fbd44ff).rw(FUNC(ip22_state::enet_r), FUNC(ip22_state::enet_w));
map(0x1fbd8000, 0x1fbd83ff).rw(m_hal2, FUNC(hal2_device::read), FUNC(hal2_device::write));
map(0x1fbd8400, 0x1fbd87ff).ram(); /* hack */
map(0x1fbd9000, 0x1fbd93ff).rw(m_hpc3, FUNC(hpc3_device::pbus4_r), FUNC(hpc3_device::pbus4_w));
map(0x1fbd9800, 0x1fbd9bff).rw(m_ioc2, FUNC(ioc2_device::read), FUNC(ioc2_device::write));
- map(0x1fbdc000, 0x1fbdc7ff).ram();
- map(0x1fbdd000, 0x1fbdd3ff).ram();
+ map(0x1fbdc000, 0x1fbdcfff).rw(m_hpc3, FUNC(hpc3_device::dma_config_r), FUNC(hpc3_device::dma_config_w));
+ map(0x1fbdd000, 0x1fbddfff).rw(m_hpc3, FUNC(hpc3_device::pio_config_r), FUNC(hpc3_device::pio_config_w));
+
map(0x1fbe0000, 0x1fbe04ff).rw(m_rtc, FUNC(ds1386_device::data_r), FUNC(ds1386_device::data_w)).umask32(0x000000ff);
map(0x1fc00000, 0x1fc7ffff).rom().region("user1", 0);
map(0x20000000, 0x27ffffff).share("mainram").ram().w(FUNC(ip22_state::ip22_write_ram));
}
+void ip24_state::ip24_map(address_map &map)
+{
+ ip22_map(map);
+ map(0x1fbc8000, 0x1fbcffff).rw(m_hpc3, FUNC(hpc3_device::hd_r<1>), FUNC(hpc3_device::hd_w<1>));
+}
+
void ip22_state::machine_reset()
{
// set up low RAM mirror
@@ -212,16 +268,6 @@ void ip22_state::machine_reset()
m_maincpu->mips3drc_set_options(MIPS3DRC_COMPATIBLE_OPTIONS | MIPS3DRC_CHECK_OVERFLOWS);
}
-void ip22_state::machine_start()
-{
-}
-
-void ip22_state::init_ip225015()
-{
- // IP22 uses 2 pieces of PC-compatible hardware: the 8042 PS/2 keyboard/mouse
- // interface and the 8254 PIT. Both are licensed cores embedded in the IOC custom chip.
-}
-
static INPUT_PORTS_START( ip225015 )
PORT_START("IN0") // unused IN0
PORT_START("DSW0") // unused IN1
@@ -237,11 +283,8 @@ void ip22_state::cdrom_config(device_t *device)
MCFG_SOUND_ROUTE(1, ":rspeaker", 1.0)
}
-void ip22_state::ip225015(machine_config &config)
+void ip22_state::ip22_base(machine_config &config)
{
- R5000BE(config, m_maincpu, 50000000*3);
- m_maincpu->set_addrmap(AS_PROGRAM, &ip22_state::ip225015_map);
-
/* video hardware */
screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
screen.set_refresh_hz(60);
@@ -249,24 +292,29 @@ void ip22_state::ip225015(machine_config &config)
screen.set_size(1280+64, 1024+64);
screen.set_visarea(0, 1279, 0, 1023);
screen.set_screen_update("newport", FUNC(newport_video_device::screen_update));
+ screen.screen_vblank().set(m_newport, FUNC(newport_video_device::vblank_w));
PALETTE(config, "palette", 65536);
- NEWPORT_VIDEO(config, m_newport);
+ NEWPORT_VIDEO(config, m_newport, m_maincpu, m_ioc2);
SGI_MC(config, m_mem_ctrl);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
- DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_dac, 0);
- m_dac->add_route(ALL_OUTPUTS, "lspeaker", 0.25);
- m_dac->add_route(ALL_OUTPUTS, "rspeaker", 0.25);
+ DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_ldac, 0);
+ m_ldac->add_route(ALL_OUTPUTS, "lspeaker", 0.25);
+
+ DAC_16BIT_R2R_TWOS_COMPLEMENT(config, m_rdac, 0);
+ m_rdac->add_route(ALL_OUTPUTS, "rspeaker", 0.25);
voltage_regulator_device &vreg = VOLTAGE_REGULATOR(config, "vref");
vreg.set_output(5.0);
- vreg.add_route(0, "dac", 1.0, DAC_VREF_POS_INPUT);
- vreg.add_route(0, "dac", -1.0, DAC_VREF_NEG_INPUT);
+ vreg.add_route(0, "ldac", 1.0, DAC_VREF_POS_INPUT);
+ vreg.add_route(0, "rdac", 1.0, DAC_VREF_POS_INPUT);
+ vreg.add_route(0, "ldac", -1.0, DAC_VREF_NEG_INPUT);
+ vreg.add_route(0, "rdac", -1.0, DAC_VREF_NEG_INPUT);
scsi_port_device &scsi(SCSI_PORT(config, "scsi"));
scsi.set_slot_device(1, "harddisk", SCSIHD, DEVICE_INPUT_DEFAULTS_NAME(SCSI_ID_1));
@@ -279,26 +327,51 @@ void ip22_state::ip225015(machine_config &config)
SGI_HAL2(config, m_hal2);
SGI_IOC2_GUINNESS(config, m_ioc2, m_maincpu);
- SGI_HPC3(config, m_hpc3, m_maincpu, m_scsi_ctrl, m_ioc2, m_dac);
DS1386_8K(config, m_rtc, 32768);
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(ip22_state::ip224613)
- ip225015(config);
- MCFG_DEVICE_REPLACE("maincpu", R4600BE, 133333333)
- //MCFG_MIPS3_ICACHE_SIZE(32768)
- //MCFG_MIPS3_DCACHE_SIZE(32768)
- MCFG_DEVICE_PROGRAM_MAP( ip225015_map)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(ip22_state::ip244415)
- ip225015(config);
- MCFG_DEVICE_REPLACE("maincpu", R4600BE, 150000000)
- //MCFG_MIPS3_ICACHE_SIZE(32768)
- //MCFG_MIPS3_DCACHE_SIZE(32768)
- MCFG_DEVICE_PROGRAM_MAP(ip225015_map)
-MACHINE_CONFIG_END
+}
+
+void ip22_state::ip225015(machine_config &config)
+{
+ ip22_base(config);
+
+ R5000BE(config, m_maincpu, 50000000*3);
+ m_maincpu->set_icache_size(32768);
+ m_maincpu->set_dcache_size(32768);
+ m_maincpu->set_addrmap(AS_PROGRAM, &ip22_state::ip22_map);
+
+ SGI_HPC3(config, m_hpc3, m_maincpu, m_scsi_ctrl, m_ioc2, m_ldac, m_rdac);
+}
+
+void ip22_state::ip224613(machine_config &config)
+{
+ ip22_base(config);
+
+ R4600BE(config, m_maincpu, 33333333*4);
+ m_maincpu->set_icache_size(32768);
+ m_maincpu->set_dcache_size(32768);
+ m_maincpu->set_addrmap(AS_PROGRAM, &ip22_state::ip22_map);
+
+ SGI_HPC3(config, m_hpc3, m_maincpu, m_scsi_ctrl, m_ioc2, m_ldac, m_rdac);
+}
+
+void ip24_state::ip244415(machine_config &config)
+{
+ ip22_base(config);
+
+ R4400BE(config, m_maincpu, 50000000*3);
+ m_maincpu->set_icache_size(32768);
+ m_maincpu->set_dcache_size(32768);
+ m_maincpu->set_addrmap(AS_PROGRAM, &ip24_state::ip24_map);
+
+ SCSI_PORT(config, "scsi2");
+
+ WD33C93(config, m_scsi_ctrl2);
+ m_scsi_ctrl2->set_scsi_port("scsi2");
+ m_scsi_ctrl2->irq_cb().set(m_hpc3, FUNC(hpc3_device::scsi_irq));
+
+ SGI_HPC3(config, m_hpc3, m_maincpu, m_scsi_ctrl, m_scsi_ctrl2, m_ioc2, m_ldac, m_rdac);
+}
/* SCC init ip225015
* Channel A
@@ -344,7 +417,7 @@ ROM_START( ip244415 )
ROM_LOAD( "ip244415.bin", 0x000000, 0x080000, CRC(2f37825a) SHA1(0d48c573b53a307478820b85aacb57b868297ca3) )
ROM_END
-// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
-COMP( 1993, ip225015, 0, 0, ip225015, ip225015, ip22_state, init_ip225015, "Silicon Graphics Inc", "Indy (R5000, 150MHz)", MACHINE_NOT_WORKING )
-COMP( 1993, ip224613, 0, 0, ip224613, ip225015, ip22_state, init_ip225015, "Silicon Graphics Inc", "Indy (R4600, 133MHz)", MACHINE_NOT_WORKING )
-COMP( 1994, ip244415, 0, 0, ip244415, ip225015, ip22_state, init_ip225015, "Silicon Graphics Inc", "Indigo2 (R4400, 150MHz)", MACHINE_NOT_WORKING )
+// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
+COMP( 1993, ip225015, 0, 0, ip225015, ip225015, ip22_state, empty_init, "Silicon Graphics Inc", "Indy (R5000, 150MHz)", MACHINE_NOT_WORKING )
+COMP( 1993, ip224613, 0, 0, ip224613, ip225015, ip22_state, empty_init, "Silicon Graphics Inc", "Indy (R4600, 133MHz)", MACHINE_NOT_WORKING )
+COMP( 1994, ip244415, 0, 0, ip244415, ip225015, ip24_state, empty_init, "Silicon Graphics Inc", "Indigo2 (R4400, 150MHz)", MACHINE_NOT_WORKING )
diff --git a/src/mame/machine/hpc3.cpp b/src/mame/machine/hpc3.cpp
index e1c11332e4e..ded3ed6c466 100644
--- a/src/mame/machine/hpc3.cpp
+++ b/src/mame/machine/hpc3.cpp
@@ -9,95 +9,157 @@
#include "emu.h"
#include "machine/hpc3.h"
+#define LOG_UNKNOWN (1 << 0)
+#define LOG_PBUS_DMA (1 << 1)
+#define LOG_SCSI (1 << 2)
+#define LOG_ETHERNET (1 << 3)
+#define LOG_PBUS4 (1 << 4)
+#define LOG_CHAIN (1 << 5)
+
+#define VERBOSE (0)
+#include "logmacro.h"
+
DEFINE_DEVICE_TYPE(SGI_HPC3, hpc3_device, "hpc3", "SGI HPC3")
hpc3_device::hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SGI_HPC3, tag, owner, clock)
, m_maincpu(*this, finder_base::DUMMY_TAG)
, m_wd33c93(*this, finder_base::DUMMY_TAG)
+ , m_wd33c93_2(*this, finder_base::DUMMY_TAG)
, m_ioc2(*this, finder_base::DUMMY_TAG)
- , m_dac(*this, finder_base::DUMMY_TAG)
+ , m_ldac(*this, finder_base::DUMMY_TAG)
+ , m_rdac(*this, finder_base::DUMMY_TAG)
, m_mainram(*this, ":mainram")
- , m_unkpbus0(*this, ":unkpbus0")
{
}
-#define VERBOSE_LEVEL (0)
-
-inline void ATTR_PRINTF(3,4) hpc3_device::verboselog(int n_level, const char *s_fmt, ...)
+void hpc3_device::device_start()
{
- if (VERBOSE_LEVEL >= n_level)
+ save_item(NAME(m_enetr_nbdp));
+ save_item(NAME(m_enetr_cbp));
+
+ save_item(NAME(m_unk0));
+ save_item(NAME(m_unk1));
+ save_item(NAME(m_ic_unk0));
+ save_item(NAME(m_scsi0_desc));
+ save_item(NAME(m_scsi0_addr));
+ save_item(NAME(m_scsi0_flags));
+ save_item(NAME(m_scsi0_byte_count));
+ save_item(NAME(m_scsi0_next_addr));
+ save_item(NAME(m_scsi0_dma_ctrl));
+ save_item(NAME(m_pio_config));
+
+ for (uint32_t i = 0; i < 8; i++)
{
- va_list v;
- char buf[32768];
- va_start(v, s_fmt);
- vsprintf(buf, s_fmt, v);
- va_end(v);
- logerror("%s: %s", machine().describe_context(), buf);
+ save_item(NAME(m_pbus_dma[i].m_active), i);
+ save_item(NAME(m_pbus_dma[i].m_cur_ptr), i);
+ save_item(NAME(m_pbus_dma[i].m_desc_ptr), i);
+ save_item(NAME(m_pbus_dma[i].m_desc_flags), i);
+ save_item(NAME(m_pbus_dma[i].m_next_ptr), i);
+ save_item(NAME(m_pbus_dma[i].m_bytes_left), i);
+ save_item(NAME(m_pbus_dma[i].m_config), i);
+
+ m_pbus_dma[i].m_timer = timer_alloc(TIMER_PBUS_DMA + i);
+ m_pbus_dma[i].m_timer->adjust(attotime::never);
}
}
-void hpc3_device::device_start()
-{
- m_pbus_dma_timer = timer_alloc(TIMER_PBUS_DMA);
- m_pbus_dma_timer->adjust(attotime::never);
-}
-
void hpc3_device::device_reset()
{
m_enetr_nbdp = 0x80000000;
m_enetr_cbp = 0x80000000;
- m_pbus_dma.m_active = 0;
- m_pbus_dma_timer->adjust(attotime::never);
+
+ m_unk0 = 0;
+ m_unk1 = 0;
+ m_ic_unk0 = 0;
+
+ m_scsi0_desc = 0;
+ m_scsi0_addr = 0;
+ m_scsi0_flags = 0;
+ m_scsi0_byte_count = 0;
+ m_scsi0_next_addr = 0;
+ m_scsi0_dma_ctrl = 0;
+
+ for (uint32_t i = 0; i < 8; i++)
+ {
+ m_pbus_dma[i].m_active = 0;
+ m_pbus_dma[i].m_cur_ptr = 0;
+ m_pbus_dma[i].m_desc_ptr = 0;
+ m_pbus_dma[i].m_desc_flags = 0;
+ m_pbus_dma[i].m_next_ptr = 0;
+ m_pbus_dma[i].m_bytes_left = 0;
+ m_pbus_dma[i].m_config = 0;
+
+ m_pbus_dma[i].m_active = false;
+ m_pbus_dma[i].m_timer->adjust(attotime::never);
+ }
}
void hpc3_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
- case TIMER_PBUS_DMA:
- do_dma(ptr, param);
+ case TIMER_PBUS_DMA+1:
+ case TIMER_PBUS_DMA+2:
+ do_pbus_dma(id - TIMER_PBUS_DMA);
+ break;
+ case TIMER_PBUS_DMA+0:
+ case TIMER_PBUS_DMA+3:
+ case TIMER_PBUS_DMA+4:
+ case TIMER_PBUS_DMA+5:
+ case TIMER_PBUS_DMA+6:
+ case TIMER_PBUS_DMA+7:
+ LOGMASKED(LOG_UNKNOWN, "HPC3: Ignoring active PBUS DMA on channel %d\n", id - TIMER_PBUS_DMA);
break;
default:
assert_always(false, "Unknown id in hpc3_device::device_timer");
}
}
-TIMER_CALLBACK_MEMBER(hpc3_device::do_dma)
+void hpc3_device::do_pbus_dma(uint32_t channel)
{
- m_pbus_dma_timer->adjust(attotime::never);
+ pbus_dma_t &dma = m_pbus_dma[channel];
- if (m_pbus_dma.m_active)
+ if (dma.m_active && (channel == 1 || channel == 2))
{
address_space &space = m_maincpu->space(AS_PROGRAM);
- uint16_t temp16 = space.read_dword(m_pbus_dma.m_cur_ptr) >> 16;
+ uint16_t temp16 = space.read_dword(dma.m_cur_ptr) >> 16;
int16_t stemp16 = (int16_t)((temp16 >> 8) | (temp16 << 8));
- m_dac->write(stemp16);
+ if (channel == 1)
+ m_ldac->write(stemp16);
+ else
+ m_rdac->write(stemp16);
- m_pbus_dma.m_cur_ptr += 4;
- m_pbus_dma.m_words_left -= 4;
+ dma.m_cur_ptr += 4;
+ dma.m_bytes_left -= 4;
- if (m_pbus_dma.m_words_left == 0)
+ if (dma.m_bytes_left == 0)
{
- if (m_pbus_dma.m_next_ptr != 0)
+ if (!BIT(dma.m_desc_flags, 31))
{
- m_pbus_dma.m_desc_ptr = m_pbus_dma.m_next_ptr;
- logerror("Next PBUS_DMA_DescPtr = %08x\n", m_pbus_dma.m_desc_ptr); fflush(stdout);
- m_pbus_dma.m_cur_ptr = space.read_dword(m_pbus_dma.m_desc_ptr);
- m_pbus_dma.m_words_left = space.read_dword(m_pbus_dma.m_desc_ptr + 4);
- m_pbus_dma.m_next_ptr = space.read_dword(m_pbus_dma.m_desc_ptr + 8);
- logerror("Next PBUS_DMA_CurPtr = %08x\n", m_pbus_dma.m_cur_ptr); fflush(stdout);
- logerror("Next PBUS_DMA_WordsLeft = %08x\n", m_pbus_dma.m_words_left); fflush(stdout);
- logerror("Next PBUS_DMA_NextPtr = %08x\n", m_pbus_dma.m_next_ptr); fflush(stdout);
+ dma.m_desc_ptr = dma.m_next_ptr;
+ LOGMASKED(LOG_PBUS_DMA, "Channel %d Next PBUS_DMA_DescPtr = %08x\n", channel, dma.m_desc_ptr); fflush(stdout);
+ dma.m_cur_ptr = space.read_dword(dma.m_desc_ptr);
+ dma.m_desc_flags = space.read_dword(dma.m_desc_ptr + 4);
+ dma.m_bytes_left = dma.m_desc_flags & 0x7fffffff;
+ dma.m_next_ptr = space.read_dword(dma.m_desc_ptr + 8);
+ LOGMASKED(LOG_PBUS_DMA, "Channel %d Next PBUS_DMA_CurPtr = %08x\n", channel, dma.m_cur_ptr); fflush(stdout);
+ LOGMASKED(LOG_PBUS_DMA, "Channel %d Next PBUS_DMA_BytesLeft = %08x\n", channel, dma.m_bytes_left); fflush(stdout);
+ LOGMASKED(LOG_PBUS_DMA, "Channel %d Next PBUS_DMA_NextPtr = %08x\n", channel, dma.m_next_ptr); fflush(stdout);
}
else
{
- m_pbus_dma.m_active = 0;
+ dma.m_active = false;
+ dma.m_timer->adjust(attotime::never);
return;
}
}
- m_pbus_dma_timer->adjust(attotime::from_hz(44100));
+ dma.m_timer->adjust(attotime::from_hz(44100));
+ }
+ else
+ {
+ dma.m_timer->adjust(attotime::never);
}
}
@@ -106,19 +168,19 @@ READ32_MEMBER(hpc3_device::hd_enet_r)
switch (offset)
{
case 0x0004/4:
- //verboselog(machine, 0, "HPC3 SCSI0DESC Read: %08x (%08x): %08x\n", 0x1fb90000 + (offset << 2), mem_mask, m_scsi0_desc);
+ LOGMASKED(LOG_SCSI, "%s: HPC3 SCSI0DESC Read: %08x (%08x): %08x\n", machine().describe_context(), 0x1fb90000 + (offset << 2), mem_mask, m_scsi0_desc);
return m_scsi0_desc;
case 0x1004/4:
- //verboselog(machine, 0, "HPC3 SCSI0DMACTRL Read: %08x (%08x): %08x\n", 0x1fb90000 + (offset << 2), mem_mask, m_scsi0_dma_ctrl);
+ LOGMASKED(LOG_SCSI, "%s: HPC3 SCSI0DMACTRL Read: %08x (%08x): %08x\n", machine().describe_context(), 0x1fb90000 + (offset << 2), mem_mask, m_scsi0_dma_ctrl);
return m_scsi0_dma_ctrl;
case 0x4000/4:
- //verboselog(machine, 2, "HPC3 ENETR CBP Read: %08x (%08x): %08x\n", 0x1fb90000 + (offset << 2), mem_mask, m_enetr_nbdp);
+ LOGMASKED(LOG_ETHERNET, "%s: HPC3 ENETR CBP Read: %08x (%08x): %08x\n", machine().describe_context(), 0x1fb90000 + (offset << 2), mem_mask, m_enetr_nbdp);
return m_enetr_cbp;
case 0x4004/4:
- //verboselog(machine, 2, "HPC3 ENETR NBDP Read: %08x (%08x): %08x\n", 0x1fb90000 + (offset << 2), mem_mask, m_enetr_nbdp);
+ LOGMASKED(LOG_ETHERNET, "%s: HPC3 ENETR NBDP Read: %08x (%08x): %08x\n", machine().describe_context(), 0x1fb90000 + (offset << 2), mem_mask, m_enetr_nbdp);
return m_enetr_nbdp;
default:
- //verboselog(machine, 0, "Unknown HPC3 ENET/HDx Read: %08x (%08x)\n", 0x1fb90000 + (offset << 2), mem_mask);
+ LOGMASKED(LOG_UNKNOWN, "%s: Unknown HPC3 ENET/HDx Read: %08x (%08x)\n", machine().describe_context(), 0x1fb90000 + (offset << 2), mem_mask);
return 0;
}
}
@@ -128,101 +190,104 @@ WRITE32_MEMBER(hpc3_device::hd_enet_w)
switch (offset)
{
case 0x0004/4:
- //verboselog(machine, 2, "HPC3 SCSI0DESC Write: %08x\n", data);
+ LOGMASKED(LOG_SCSI, "%s: HPC3 SCSI0DESC Write: %08x\n", machine().describe_context(), data);
m_scsi0_desc = data;
break;
case 0x1004/4:
- //verboselog(machine, 2, "HPC3 SCSI0DMACTRL Write: %08x\n", data);
+ LOGMASKED(LOG_SCSI, "%s: HPC3 SCSI0DMACTRL Write: %08x\n", machine().describe_context(), data);
m_scsi0_dma_ctrl = data;
break;
case 0x4000/4:
- //verboselog(machine, 2, "HPC3 ENETR CBP Write: %08x\n", data);
+ LOGMASKED(LOG_ETHERNET, "%s: HPC3 ENETR CBP Write: %08x\n", machine().describe_context(), data);
m_enetr_cbp = data;
break;
case 0x4004/4:
- //verboselog(machine, 2, "HPC3 ENETR NBDP Write: %08x\n", data);
+ LOGMASKED(LOG_ETHERNET, "%s: HPC3 ENETR NBDP Write: %08x\n", machine().describe_context(), data);
m_enetr_nbdp = data;
break;
default:
- //verboselog(machine, 0, "Unknown HPC3 ENET/HDx write: %08x (%08x): %08x\n", 0x1fb90000 + (offset << 2), mem_mask, data);
+ LOGMASKED(LOG_UNKNOWN, "%s: Unknown HPC3 ENET/HDx write: %08x (%08x): %08x\n", machine().describe_context(), 0x1fb90000 + (offset << 2), mem_mask, data);
break;
}
}
-READ32_MEMBER(hpc3_device::hd0_r)
+template<uint32_t index>
+READ32_MEMBER(hpc3_device::hd_r)
{
switch (offset)
{
case 0x0000/4:
case 0x4000/4:
-// //verboselog(machine, 2, "HPC3 HD0 Status Read: %08x (%08x): %08x\n", 0x1fb90000 + (offset << 2), mem_mask, nHPC3_hd0_regs[0x17]);
if (ACCESSING_BITS_0_7)
{
- return m_wd33c93->read(space, 0);
- }
- else
- {
- return 0;
+ const uint8_t ret = index ? m_wd33c93_2->read(space, 0) : m_wd33c93->read(space, 0);
+ LOGMASKED(LOG_SCSI, "%s: SCSI%d Read 0: %02x\n", machine().describe_context(), index, ret);
+ return ret;
}
+ break;
case 0x0004/4:
case 0x4004/4:
-// //verboselog(machine, 2, "HPC3 HD0 Register Read: %08x (%08x): %08x\n", 0x1fb90000 + (offset << 2), mem_mask, nHPC3_hd0_regs[nHPC3_hd0_register]);
if (ACCESSING_BITS_0_7)
{
- return m_wd33c93->read(space, 1);
- }
- else
- {
- return 0;
+ const uint8_t ret = index ? m_wd33c93_2->read(space, 1) : m_wd33c93->read(space, 1);
+ LOGMASKED(LOG_SCSI, "%s: SCSI%d Read 1: %02x\n", machine().describe_context(), index, ret);
+ return ret;
}
+ break;
default:
- //verboselog(machine, 0, "Unknown HPC3 HD0 Read: %08x (%08x) [%x] PC=%x\n", 0x1fbc0000 + (offset << 2), mem_mask, offset, m_maincpu->pc());
- return 0;
+ LOGMASKED(LOG_SCSI | LOG_UNKNOWN, "%s: %s: Unknown HPC3 HD%d Read: %08x & %08x\n", machine().describe_context(), machine().describe_context(),
+ index, 0x1fbc4000 + (offset << 2) + index * 0x8000, mem_mask);
+ break;
}
+ return 0;
}
-WRITE32_MEMBER(hpc3_device::hd0_w)
+template<uint32_t index>
+WRITE32_MEMBER(hpc3_device::hd_w)
{
switch (offset)
{
- case 0x0000/4:
- case 0x4000/4:
-// //verboselog(machine, 2, "HPC3 HD0 Register Select Write: %08x\n", data);
+ case 0x0000:
if (ACCESSING_BITS_0_7)
{
- m_wd33c93->write(space, 0, data & 0x000000ff);
+ LOGMASKED(LOG_SCSI, "%s: SCSI%d Write 0 = %02x\n", machine().describe_context(), index, (uint8_t)data);
+ index ? m_wd33c93_2->write(space, 0, data & 0xff) : m_wd33c93->write(space, 0, data & 0xff);
}
break;
- case 0x0004/4:
- case 0x4004/4:
-// //verboselog(machine, 2, "HPC3 HD0 Register %d Write: %08x\n", nHPC3_hd0_register, data);
+ case 0x0001:
if (ACCESSING_BITS_0_7)
{
- m_wd33c93->write(space, 1, data & 0x000000ff);
+ LOGMASKED(LOG_SCSI, "%s: SCSI%d Write 1 = %02x\n", machine().describe_context(), index, (uint8_t)data);
+ index ? m_wd33c93_2->write(space, 1, data & 0xff) : m_wd33c93->write(space, 1, data & 0xff);
}
break;
default:
- //verboselog(machine, 0, "Unknown HPC3 HD0 Write: %08x (%08x): %08x\n", 0x1fbc0000 + (offset << 2), mem_mask, data);
+ LOGMASKED(LOG_SCSI | LOG_UNKNOWN, "%s: %s: Unknown HPC3 HD%d Write: %08x = %08x & %08x\n", machine().describe_context(), machine().describe_context(),
+ index, 0x1fbc4000 + (offset << 2) + index * 0x8000, data, mem_mask);
break;
}
}
+template DECLARE_READ32_MEMBER(hpc3_device::hd_r<0>);
+template DECLARE_READ32_MEMBER(hpc3_device::hd_r<1>);
+template DECLARE_WRITE32_MEMBER(hpc3_device::hd_w<0>);
+template DECLARE_WRITE32_MEMBER(hpc3_device::hd_w<1>);
READ32_MEMBER(hpc3_device::pbus4_r)
{
switch (offset)
{
case 0x0004/4:
- //verboselog(machine, 2, "HPC3 PBUS4 Unknown 0 Read: (%08x): %08x\n", mem_mask, m_unk0);
+ LOGMASKED(LOG_PBUS4, "%s: HPC3 PBUS4 Unknown 0 Read: (%08x): %08x\n", machine().describe_context(), mem_mask, m_unk0);
return m_unk0;
case 0x000c/4:
- //verboselog(machine, 2, "Interrupt Controller(?) Read: (%08x): %08x\n", mem_mask, m_ic_unk0);
+ LOGMASKED(LOG_PBUS4, "%s: Interrupt Controller(?) Read: (%08x): %08x\n", machine().describe_context(), mem_mask, m_ic_unk0);
return m_ic_unk0;
case 0x0014/4:
- //verboselog(machine, 2, "HPC3 PBUS4 Unknown 1 Read: (%08x): %08x\n", mem_mask, m_unk1);
+ LOGMASKED(LOG_PBUS4, "%s: HPC3 PBUS4 Unknown 1 Read: (%08x): %08x\n", machine().describe_context(), mem_mask, m_unk1);
return m_unk1;
default:
- //verboselog(machine, 0, "Unknown HPC3 PBUS4 Read: %08x (%08x)\n", 0x1fbd9000 + (offset << 2), mem_mask);
+ LOGMASKED(LOG_PBUS4 | LOG_UNKNOWN, "%s: Unknown HPC3 PBUS4 Read: %08x (%08x)\n", machine().describe_context(), 0x1fbd9000 + (offset << 2), mem_mask);
return 0;
}
}
@@ -232,112 +297,163 @@ WRITE32_MEMBER(hpc3_device::pbus4_w)
switch (offset)
{
case 0x0004/4:
- //verboselog(machine, 2, "HPC3 PBUS4 Unknown 0 Write: %08x (%08x)\n", data, mem_mask);
+ LOGMASKED(LOG_PBUS4, "%s: HPC3 PBUS4 Unknown 0 Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
m_unk0 = data;
break;
case 0x000c/4:
- //verboselog(machine, 2, "Interrupt Controller(?) Write: (%08x): %08x\n", mem_mask, data);
+ LOGMASKED(LOG_PBUS4, "%s: Interrupt Controller(?) Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
m_ic_unk0 = data;
break;
case 0x0014/4:
- //verboselog(machine, 2, "HPC3 PBUS4 Unknown 1 Write: %08x (%08x)\n", data, mem_mask);
+ LOGMASKED(LOG_PBUS4, "%s: HPC3 PBUS4 Unknown 1 Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
m_unk1 = data;
break;
default:
- //verboselog(machine, 0, "Unknown HPC3 PBUS4 Write: %08x (%08x): %08x\n", 0x1fbd9000 + (offset << 2), mem_mask, data);
+ LOGMASKED(LOG_PBUS4 | LOG_UNKNOWN, "%s: Unknown HPC3 PBUS4 Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbd9000 + (offset << 2), data, mem_mask);
break;
}
}
READ32_MEMBER(hpc3_device::pbusdma_r)
{
- //uint32_t channel = offset / (0x2000/4);
- //verboselog(machine(), 0, "PBUS DMA Channel %d Read: 0x%08x (%08x)\n", channel, 0x1fb80000 + offset*4, mem_mask);
+ uint32_t channel = offset / (0x2000/4);
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS DMA Channel %d Read: %08x & %08x\n", machine().describe_context(), channel, 0x1fb80000 + offset*4, mem_mask);
return 0;
}
WRITE32_MEMBER(hpc3_device::pbusdma_w)
{
uint32_t channel = offset / (0x2000/4);
+ pbus_dma_t &dma = m_pbus_dma[channel];
switch (offset & 0x07ff)
{
case 0x0000/4:
- //verboselog(machine, 0, "PBUS DMA Channel %d Buffer Pointer Write: 0x%08x\n", channel, data);
- return;
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS DMA Channel %d Buffer Pointer Write: %08x\n", machine().describe_context(), channel, data);
+ break;
case 0x0004/4:
- //verboselog(machine, 0, "PBUS DMA Channel %d Descriptor Pointer Write: 0x%08x\n", channel, data);
- if (channel == 1)
- {
- m_pbus_dma.m_desc_ptr = data;
- logerror("PBUS_DMA_DescPtr = %08x\n", m_pbus_dma.m_desc_ptr); fflush(stdout);
- m_pbus_dma.m_cur_ptr = space.read_dword(m_pbus_dma.m_desc_ptr);
- m_pbus_dma.m_words_left = space.read_dword(m_pbus_dma.m_desc_ptr + 4);
- m_pbus_dma.m_next_ptr = space.read_dword(m_pbus_dma.m_desc_ptr + 8);
- logerror("PBUS_DMA_CurPtr = %08x\n", m_pbus_dma.m_cur_ptr); fflush(stdout);
- logerror("PBUS_DMA_WordsLeft = %08x\n", m_pbus_dma.m_words_left); fflush(stdout);
- logerror("PBUS_DMA_NextPtr = %08x\n", m_pbus_dma.m_next_ptr); fflush(stdout);
- }
- return;
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS DMA Channel %d Descriptor Pointer Write: %08x\n", machine().describe_context(), channel, data);
+ dma.m_desc_ptr = data;
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS_DMA_DescPtr = %08x\n", machine().describe_context(), dma.m_desc_ptr); fflush(stdout);
+ dma.m_cur_ptr = space.read_dword(dma.m_desc_ptr);
+ dma.m_desc_flags = space.read_dword(dma.m_desc_ptr + 4);
+ dma.m_next_ptr = space.read_dword(dma.m_desc_ptr + 8);
+ dma.m_bytes_left = dma.m_desc_flags & 0x7fffffff;
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS_DMA_CurPtr = %08x\n", machine().describe_context(), dma.m_cur_ptr); fflush(stdout);
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS_DMA_BytesLeft = %08x\n", machine().describe_context(), dma.m_bytes_left); fflush(stdout);
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS_DMA_NextPtr = %08x\n", machine().describe_context(), dma.m_next_ptr); fflush(stdout);
+ break;
case 0x1000/4:
- logerror("PBUS DMA Channel %d Control Register Write: 0x%08x\n", channel, data);
+ LOGMASKED(LOG_PBUS_DMA, "%s: PBUS DMA Channel %d Control Register Write: %08x\n", machine().describe_context(), channel, data);
if (data & PBUS_CTRL_ENDIAN)
- {
- logerror(" Little Endian\n");
- }
+ LOGMASKED(LOG_PBUS_DMA, " Little Endian\n");
else
- {
- logerror(" Big Endian\n");
- }
+ LOGMASKED(LOG_PBUS_DMA, " Big Endian\n");
+
if (data & PBUS_CTRL_RECV)
- {
- logerror(" RX DMA\n");
- }
+ LOGMASKED(LOG_PBUS_DMA, " RX DMA\n");
else
- {
- logerror(" TX DMA\n");
- }
+ LOGMASKED(LOG_PBUS_DMA, " TX DMA\n");
+
if (data & PBUS_CTRL_FLUSH)
- {
- logerror(" Flush for RX\n");
- }
+ LOGMASKED(LOG_PBUS_DMA, " Flush for RX\n");
if (data & PBUS_CTRL_DMASTART)
- {
- logerror(" Start DMA\n");
- }
+ LOGMASKED(LOG_PBUS_DMA, " Start DMA\n");
+
if (data & PBUS_CTRL_LOAD_EN)
+ LOGMASKED(LOG_PBUS_DMA, " Load Enable\n");
+
+ LOGMASKED(LOG_PBUS_DMA, " High Water Mark: %04x bytes\n", (data & PBUS_CTRL_HIGHWATER) >> 8);
+ LOGMASKED(LOG_PBUS_DMA, " FIFO Begin: Row %04x\n", (data & PBUS_CTRL_FIFO_BEG) >> 16);
+ LOGMASKED(LOG_PBUS_DMA, " FIFO End: Row %04x\n", (data & PBUS_CTRL_FIFO_END) >> 24);
+
+ if (((data & PBUS_CTRL_DMASTART) && (data & PBUS_CTRL_LOAD_EN)) && (channel == 1 || channel == 2))
{
- logerror(" Load Enable\n");
- }
- logerror(" High Water Mark: %04x bytes\n", (data & PBUS_CTRL_HIGHWATER) >> 8);
- logerror(" FIFO Begin: Row %04x\n", (data & PBUS_CTRL_FIFO_BEG) >> 16);
- logerror(" FIFO End: Rowe %04x\n", (data & PBUS_CTRL_FIFO_END) >> 24);
- if ((data & PBUS_CTRL_DMASTART) || (data & PBUS_CTRL_LOAD_EN))
- {
- m_pbus_dma_timer->adjust(attotime::from_hz(44100));
- m_pbus_dma.m_active = 1;
+ LOGMASKED(LOG_PBUS_DMA, " Starting DMA\n");
+ dma.m_timer->adjust(attotime::from_hz(44100));
+ dma.m_active = true;
}
- return;
+ break;
+ default:
+ LOGMASKED(LOG_PBUS_DMA | LOG_UNKNOWN, "%s: Unknown PBUS DMA Channel %d Write: %08x = %08x & %08x\n", machine().describe_context(), channel, 0x1fb80000 + offset*4, data, mem_mask);
+ break;
+ }
+}
+
+READ32_MEMBER(hpc3_device::dma_config_r)
+{
+ const uint32_t channel = (offset >> 7) & 7;
+ const uint32_t data = m_pbus_dma[channel].m_config;
+ LOGMASKED(LOG_PBUS_DMA, "%s: Read Channel %d DMA Configuration: %08x & %08x\n", machine().describe_context(), channel, data, mem_mask);
+ return data;
+}
+
+WRITE32_MEMBER(hpc3_device::dma_config_w)
+{
+ const uint32_t channel = (offset >> 7) & 7;
+ COMBINE_DATA(&m_pbus_dma[channel].m_config);
+
+ LOGMASKED(LOG_PBUS_DMA, "%s: Write Channel %d DMA Configuration: %08x & %08x\n", machine().describe_context(), channel, data, mem_mask);
+ LOGMASKED(LOG_PBUS_DMA, " DMA Read State D3 gio_clk cycles: %d\n", BIT(data, 0) ? 2 : 3);
+ LOGMASKED(LOG_PBUS_DMA, " DMA Read State D4 gio_clk cycles: %d\n", (data >> 1) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " DMA Read State D5 gio_clk cycles: %d\n", (data >> 5) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " DMA Write State D3 gio_clk cycles: %d\n", BIT(data, 9) ? 2 : 3);
+ LOGMASKED(LOG_PBUS_DMA, " DMA Write State D4 gio_clk cycles: %d\n", (data >> 10) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " DMA Write State D5 gio_clk cycles: %d\n", (data >> 14) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " Device Bit Width: %d\n", BIT(data, 18) ? 16 : 32);
+ LOGMASKED(LOG_PBUS_DMA, " Even Address Bytes on %s\n", BIT(data, 19) ? "15..8" : "7..0");
+ LOGMASKED(LOG_PBUS_DMA, " Device %s Real-Time\n", BIT(data, 21) ? "is" : "is not");
+ LOGMASKED(LOG_PBUS_DMA, " Burst Count: %d\n", (data >> 22) & 0x1f);
+ LOGMASKED(LOG_PBUS_DMA, " %sUse Unsynchronized DREQ\n", BIT(data, 27) ? "" : "Do Not ");
+}
+
+READ32_MEMBER(hpc3_device::pio_config_r)
+{
+ uint32_t channel = (offset >> 6) & 15;
+ if (channel >= 10)
+ {
+ channel = (channel & 1) ? 9 : 8;
+ }
+
+ const uint32_t data = m_pio_config[channel];
+ LOGMASKED(LOG_PBUS_DMA, "%s: Read Channel %d PIO Configuration: %08x & %08x\n", machine().describe_context(), channel, data, mem_mask);
+ return data;
+}
+
+WRITE32_MEMBER(hpc3_device::pio_config_w)
+{
+ uint32_t channel = (offset >> 6) & 15;
+ if (channel >= 10)
+ {
+ channel = (channel & 1) ? 9 : 8;
}
- logerror("Unknown PBUS DMA Channel %d Write: 0x%08x: 0x%08x (%08x)\n", channel, 0x1fb80000 + offset*4, data, mem_mask);
+
+ COMBINE_DATA(&m_pio_config[channel]);
+ LOGMASKED(LOG_PBUS_DMA, "%s: Write Channel %d PIO Configuration: %08x & %08x\n", machine().describe_context(), channel, data, mem_mask);
+ LOGMASKED(LOG_PBUS_DMA, " PIO Read State P2 gio_clk cycles: %d\n", BIT(data, 0) ? 1 : 2);
+ LOGMASKED(LOG_PBUS_DMA, " PIO Read State P3 gio_clk cycles: %d\n", (data >> 1) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " PIO Read State P4 gio_clk cycles: %d\n", (data >> 5) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " PIO Write State P2 gio_clk cycles: %d\n", BIT(data, 9) ? 1 : 2);
+ LOGMASKED(LOG_PBUS_DMA, " PIO Write State P3 gio_clk cycles: %d\n", (data >> 10) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " PIO Write State P4 gio_clk cycles: %d\n", (data >> 14) & 0xf);
+ LOGMASKED(LOG_PBUS_DMA, " Device Bit Width: %d\n", BIT(data, 18) ? 16 : 32);
+ LOGMASKED(LOG_PBUS_DMA, " Even Address Bytes on %s\n", BIT(data, 19) ? "15..8" : "7..0");
}
READ32_MEMBER(hpc3_device::unkpbus0_r)
{
+ LOGMASKED(LOG_UNKNOWN, "%s: Unknown PBUS Read: %08x & %08x\n", machine().describe_context(), 0x1fbc8000 + offset*4, mem_mask);
return 0;
- //logerror("Unknown PBUS Read: 0x%08x (%08x)\n", 0x1fbc8000 + offset*4, mem_mask);
- //return m_unkpbus0[offset];
}
WRITE32_MEMBER(hpc3_device::unkpbus0_w)
{
- //logerror("Unknown PBUS Write: 0x%08x = 0x%08x (%08x)\n", 0x1fbc8000 + offset*4, data, mem_mask);
- //COMBINE_DATA(&m_unkpbus0[offset]);
+ LOGMASKED(LOG_UNKNOWN, "%s: Unknown PBUS Write: %08x = %08x & %08x\n", machine().describe_context(), 0x1fbc8000 + offset*4, data, mem_mask);
}
void hpc3_device::dump_chain(address_space &space, uint32_t ch_base)
{
- logerror("node: %08x %08x %08x (len = %x)\n", space.read_dword(ch_base), space.read_dword(ch_base+4), space.read_dword(ch_base+8), space.read_dword(ch_base+4) & 0x3fff);
+ LOGMASKED(LOG_CHAIN, "node: %08x %08x %08x (len = %x)\n", space.read_dword(ch_base), space.read_dword(ch_base+4), space.read_dword(ch_base+8), space.read_dword(ch_base+4) & 0x3fff);
if ((space.read_dword(ch_base+8) != 0) && !(space.read_dword(ch_base+4) & 0x80000000))
{
@@ -351,7 +467,7 @@ void hpc3_device::fetch_chain(address_space &space)
m_scsi0_flags = space.read_dword(m_scsi0_desc+4);
m_scsi0_byte_count = m_scsi0_flags & 0x3fff;
m_scsi0_next_addr = space.read_dword(m_scsi0_desc+8);
- //logerror("Fetching chain from %08x: %08x %08x %08x (length %04x)\n", m_scsi0_desc, m_scsi0_addr, m_scsi0_flags, m_scsi0_next_addr, m_scsi0_byte_count);
+ LOGMASKED(LOG_CHAIN, "Fetching chain from %08x: %08x %08x %08x (length %04x)\n", m_scsi0_desc, m_scsi0_addr, m_scsi0_flags, m_scsi0_next_addr, m_scsi0_byte_count);
}
bool hpc3_device::decrement_chain(address_space &space)
@@ -375,13 +491,14 @@ WRITE_LINE_MEMBER(hpc3_device::scsi_irq)
if (state)
{
+ uint8_t dma_buffer[4096];
if (m_wd33c93->get_dma_count())
{
- //logerror("m_wd33c93->get_dma_count() is %d\n", m_wd33c93->get_dma_count());
+ LOGMASKED(LOG_SCSI, "m_wd33c93->get_dma_count() is %d\n", m_wd33c93->get_dma_count());
if (m_scsi0_dma_ctrl & HPC3_DMACTRL_ENABLE)
{
if (m_scsi0_dma_ctrl & HPC3_DMACTRL_IRQ)
- logerror("IP22: Unhandled SCSI DMA IRQ\n");
+ LOGMASKED(LOG_SCSI, "IP22: Unhandled SCSI DMA IRQ\n");
}
bool big_endian = (m_scsi0_dma_ctrl & HPC3_DMACTRL_ENDIAN);
@@ -394,18 +511,18 @@ WRITE_LINE_MEMBER(hpc3_device::scsi_irq)
//dump_chain(space, m_scsi0_desc);
fetch_chain(space);
- //logerror("DMA to device: %d bytes @ %x\n", byte_count, m_scsi0_addr);
+ LOGMASKED(LOG_SCSI, "DMA to SCSI device: %d bytes from %08x\n", byte_count, m_scsi0_addr);
if (byte_count <= 512)
{
for (int i = 0; i < byte_count; i++)
{
- m_dma_buffer[big_endian ? BYTE4_XOR_BE(i) : BYTE4_XOR_LE(i)] = space.read_byte(m_scsi0_addr+i);
+ dma_buffer[big_endian ? BYTE4_XOR_BE(i) : BYTE4_XOR_LE(i)] = space.read_byte(m_scsi0_addr+i);
if (!decrement_chain(space))
break;
}
- m_wd33c93->dma_write_data(byte_count, m_dma_buffer);
+ m_wd33c93->dma_write_data(byte_count, dma_buffer);
}
else
{
@@ -416,13 +533,13 @@ WRITE_LINE_MEMBER(hpc3_device::scsi_irq)
for (int i = 0; i < sub_count; i++)
{
- m_dma_buffer[big_endian ? BYTE4_XOR_BE(dstoffs+i) : BYTE4_XOR_LE(dstoffs+i)] = space.read_byte(m_scsi0_addr);
+ dma_buffer[big_endian ? BYTE4_XOR_BE(dstoffs+i) : BYTE4_XOR_LE(dstoffs+i)] = space.read_byte(m_scsi0_addr);
m_scsi0_addr++;
if (!decrement_chain(space))
break;
}
- m_wd33c93->dma_write_data(sub_count, m_dma_buffer);
+ m_wd33c93->dma_write_data(sub_count, dma_buffer);
byte_count -= sub_count;
}
@@ -438,15 +555,15 @@ WRITE_LINE_MEMBER(hpc3_device::scsi_irq)
//dump_chain(space, m_scsi0_desc);
fetch_chain(space);
- // logerror("DMA from device: %d words @ %x\n", words, dstoffs);
+ LOGMASKED(LOG_SCSI, "DMA from SCSI device: %d bytes to %08x\n", byte_count, m_scsi0_addr);
if (byte_count < 512)
{
- m_wd33c93->dma_read_data(byte_count, m_dma_buffer);
+ m_wd33c93->dma_read_data(byte_count, dma_buffer);
for (int i = 0; i < byte_count; i++)
{
- space.write_byte(big_endian ? BYTE4_XOR_BE(m_scsi0_addr+i) : BYTE4_XOR_LE(m_scsi0_addr+i), m_dma_buffer[i]);
+ space.write_byte(big_endian ? BYTE4_XOR_BE(m_scsi0_addr+i) : BYTE4_XOR_LE(m_scsi0_addr+i), dma_buffer[i]);
if (!decrement_chain(space))
break;
}
@@ -455,11 +572,11 @@ WRITE_LINE_MEMBER(hpc3_device::scsi_irq)
{
while (byte_count)
{
- int sub_count = m_wd33c93->dma_read_data(512, m_dma_buffer);
+ int sub_count = m_wd33c93->dma_read_data(512, dma_buffer);
for (int i = 0; i < sub_count; i++)
{
- space.write_byte(big_endian ? BYTE4_XOR_BE(m_scsi0_addr) : BYTE4_XOR_LE(m_scsi0_addr), m_dma_buffer[i]);
+ space.write_byte(big_endian ? BYTE4_XOR_BE(m_scsi0_addr) : BYTE4_XOR_LE(m_scsi0_addr), dma_buffer[i]);
m_scsi0_addr++;
if (!decrement_chain(space))
break;
diff --git a/src/mame/machine/hpc3.h b/src/mame/machine/hpc3.h
index b46c3068420..bfc1ad8cd5f 100644
--- a/src/mame/machine/hpc3.h
+++ b/src/mame/machine/hpc3.h
@@ -19,22 +19,33 @@
class hpc3_device : public device_t
{
public:
- template <typename T, typename U, typename V, typename W>
- hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag, U &&scsi_tag, V &&ioc2_tag, W &&dac_tag)
+ template <typename T, typename U, typename V, typename W, typename X>
+ hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner
+ , T &&cpu_tag, U &&scsi_tag, V &&ioc2_tag, W &&ldac_tag, X &&rdac_tag)
: hpc3_device(mconfig, tag, owner, (uint32_t)0)
{
m_maincpu.set_tag(std::forward<T>(cpu_tag));
m_wd33c93.set_tag(std::forward<U>(scsi_tag));
m_ioc2.set_tag(std::forward<V>(ioc2_tag));
- m_dac.set_tag(std::forward<W>(dac_tag));
+ m_ldac.set_tag(std::forward<W>(ldac_tag));
+ m_rdac.set_tag(std::forward<X>(rdac_tag));
+ }
+
+ template <typename T, typename U, typename V, typename W, typename X, typename Y>
+ hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner
+ , T &&cpu_tag, U &&scsi_tag, V &&scsi2_tag, W &&ioc2_tag, X &&ldac_tag, Y &&rdac_tag)
+ : hpc3_device(mconfig, tag, owner
+ , std::forward<T>(cpu_tag), std::forward<U>(scsi_tag), std::forward<W>(ioc2_tag), std::forward<X>(ldac_tag), std::forward<Y>(rdac_tag))
+ {
+ m_wd33c93_2.set_tag(std::forward<V>(scsi2_tag));
}
hpc3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER(hd_enet_r);
DECLARE_WRITE32_MEMBER(hd_enet_w);
- DECLARE_READ32_MEMBER(hd0_r);
- DECLARE_WRITE32_MEMBER(hd0_w);
+ template <uint32_t index> DECLARE_READ32_MEMBER(hd_r);
+ template <uint32_t index> DECLARE_WRITE32_MEMBER(hd_w);
DECLARE_READ32_MEMBER(pbus4_r);
DECLARE_WRITE32_MEMBER(pbus4_w);
DECLARE_READ32_MEMBER(pbusdma_r);
@@ -42,15 +53,20 @@ public:
DECLARE_READ32_MEMBER(unkpbus0_r);
DECLARE_WRITE32_MEMBER(unkpbus0_w);
- DECLARE_WRITE_LINE_MEMBER(scsi_irq);
+ DECLARE_READ32_MEMBER(dma_config_r);
+ DECLARE_WRITE32_MEMBER(dma_config_w);
+ DECLARE_READ32_MEMBER(pio_config_r);
+ DECLARE_WRITE32_MEMBER(pio_config_w);
- TIMER_CALLBACK_MEMBER(do_dma);
+ DECLARE_WRITE_LINE_MEMBER(scsi_irq);
protected:
void device_start() override;
void device_reset() override;
void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+ void do_pbus_dma(uint32_t channel);
+
void dump_chain(address_space &space, uint32_t ch_base);
void fetch_chain(address_space &space);
bool decrement_chain(address_space &space);
@@ -59,11 +75,14 @@ protected:
struct pbus_dma_t
{
- uint8_t m_active;
+ bool m_active;
uint32_t m_cur_ptr;
uint32_t m_desc_ptr;
+ uint32_t m_desc_flags;
uint32_t m_next_ptr;
- uint32_t m_words_left;
+ uint32_t m_bytes_left;
+ uint32_t m_config;
+ emu_timer *m_timer;
};
enum
@@ -99,10 +118,11 @@ protected:
required_device<mips3_device> m_maincpu;
required_device<wd33c93_device> m_wd33c93;
+ optional_device<wd33c93_device> m_wd33c93_2;
required_device<ioc2_device> m_ioc2;
- required_device<dac_16bit_r2r_twos_complement_device> m_dac;
+ required_device<dac_16bit_r2r_twos_complement_device> m_ldac;
+ required_device<dac_16bit_r2r_twos_complement_device> m_rdac;
required_shared_ptr<uint32_t> m_mainram;
- required_shared_ptr<uint32_t> m_unkpbus0;
uint32_t m_enetr_nbdp;
uint32_t m_enetr_cbp;
@@ -115,10 +135,8 @@ protected:
uint32_t m_scsi0_byte_count;
uint32_t m_scsi0_next_addr;
uint32_t m_scsi0_dma_ctrl;
- pbus_dma_t m_pbus_dma;
- emu_timer *m_pbus_dma_timer;
-
- uint8_t m_dma_buffer[4096];
+ pbus_dma_t m_pbus_dma[8];
+ uint32_t m_pio_config[10];
inline void ATTR_PRINTF(3,4) verboselog(int n_level, const char *s_fmt, ... );
};
diff --git a/src/mame/machine/ioc2.cpp b/src/mame/machine/ioc2.cpp
index 34fa8f26210..4132799c675 100644
--- a/src/mame/machine/ioc2.cpp
+++ b/src/mame/machine/ioc2.cpp
@@ -10,6 +10,23 @@
#include "bus/rs232/rs232.h"
#include "machine/ioc2.h"
+#define LOG_PI1 (1 << 0)
+#define LOG_SERIAL (1 << 1)
+#define LOG_MOUSEKBD (1 << 2)
+#define LOG_PANEL (1 << 3)
+#define LOG_SYSID (1 << 4)
+#define LOG_READ (1 << 5)
+#define LOG_DMA_SEL (1 << 6)
+#define LOG_RESET (1 << 7)
+#define LOG_WRITE (1 << 8)
+#define LOG_INT3 (1 << 9)
+#define LOG_PIT (1 << 10)
+#define LOG_ALL (LOG_PI1 | LOG_SERIAL | LOG_MOUSEKBD | LOG_PANEL | LOG_SYSID | LOG_READ | LOG_DMA_SEL | LOG_RESET | LOG_WRITE | LOG_INT3 | LOG_PIT)
+#define LOG_DEFAULT (LOG_ALL & ~(LOG_SYSID | LOG_MOUSEKBD))
+
+#define VERBOSE (0)
+#include "logmacro.h"
+
/*static*/ char const *const ioc2_device::SCC_TAG = "scc";
/*static*/ char const *const ioc2_device::PI1_TAG = "pi1";
/*static*/ char const *const ioc2_device::KBDC_TAG = "kbdc";
@@ -79,6 +96,8 @@ void ioc2_device::device_add_mconfig(machine_config &config)
m_pit->set_clk<0>(1000000);
m_pit->set_clk<1>(1000000);
m_pit->set_clk<2>(1000000);
+ m_pit->out_handler<0>().set(FUNC(ioc2_device::timer0_int));
+ m_pit->out_handler<1>().set(FUNC(ioc2_device::timer1_int));
m_pit->out_handler<2>().set(m_kbdc, FUNC(kbdc8042_device::write_out2));
}
@@ -105,7 +124,6 @@ ioc2_device::ioc2_device(const machine_config &mconfig, device_type type, const
, m_int3_map_mask0_reg(0)
, m_int3_map_mask1_reg(0)
, m_int3_map_pol_reg(0)
- , m_int3_timer_clear_reg(0)
, m_int3_err_status_reg(0)
, m_par_read_cnt(0)
, m_par_cntl(0)
@@ -114,7 +132,27 @@ ioc2_device::ioc2_device(const machine_config &mconfig, device_type type, const
void ioc2_device::device_start()
{
- m_front_panel_reg = FRONT_PANEL_POWER_STATE;
+ save_item(NAME(m_par_read_cnt));
+ save_item(NAME(m_par_cntl));
+
+ save_item(NAME(m_gen_ctrl_select_reg));
+ save_item(NAME(m_gen_ctrl_reg));
+ save_item(NAME(m_front_panel_reg));
+
+ save_item(NAME(m_read_reg));
+ save_item(NAME(m_dma_sel));
+ save_item(NAME(m_reset_reg));
+ save_item(NAME(m_write_reg));
+
+ save_item(NAME(m_int3_local0_status_reg));
+ save_item(NAME(m_int3_local0_mask_reg));
+ save_item(NAME(m_int3_local1_status_reg));
+ save_item(NAME(m_int3_local1_mask_reg));
+ save_item(NAME(m_int3_map_status_reg));
+ save_item(NAME(m_int3_map_mask0_reg));
+ save_item(NAME(m_int3_map_mask1_reg));
+ save_item(NAME(m_int3_map_pol_reg));
+ save_item(NAME(m_int3_err_status_reg));
}
void ioc2_device::device_reset()
@@ -139,7 +177,6 @@ void ioc2_device::device_reset()
m_int3_map_mask0_reg = 0;
m_int3_map_mask1_reg = 0;
m_int3_map_pol_reg = 0;
- m_int3_timer_clear_reg = 0;
m_int3_err_status_reg = 0;
}
@@ -165,41 +202,112 @@ void ioc2_device::lower_local1_irq(uint8_t source_mask)
m_int3_local1_status_reg &= ~source_mask;
}
-READ32_MEMBER( ioc2_device::read )
+WRITE_LINE_MEMBER(ioc2_device::timer0_int)
+{
+ m_maincpu->set_input_line(MIPS3_IRQ2, ASSERT_LINE);
+}
+
+WRITE_LINE_MEMBER(ioc2_device::timer1_int)
+{
+ m_maincpu->set_input_line(MIPS3_IRQ3, ASSERT_LINE);
+}
+
+READ32_MEMBER(ioc2_device::read)
{
switch (offset)
{
case PI1_DATA_REG:
+ {
+ const uint8_t data = m_pi1->read(space, offset, 0xff);;
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Data Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case PI1_CTRL_REG:
+ {
+ const uint8_t data = m_pi1->read(space, offset, 0xff);
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Control Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case PI1_STATUS_REG:
- return m_pi1->read(space, offset, 0xff);
+ {
+ const uint8_t data = m_pi1->read(space, offset, 0xff);
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Status Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case PI1_DMA_CTRL_REG:
+ LOGMASKED(LOG_PI1, "%s: Read PI1 DMA Control Register: 00\n", machine().describe_context());
+ return 0;
case PI1_INT_STATUS_REG:
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Interrupt Status Register: 00\n", machine().describe_context());
+ return 0;
case PI1_INT_MASK_REG:
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Interrupt Mask Register: 00\n", machine().describe_context());
+ return 0;
case PI1_TIMER1_REG:
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Timer1 Register: 00\n", machine().describe_context());
+ return 0;
case PI1_TIMER2_REG:
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Timer2 Register: 00\n", machine().describe_context());
+ return 0;
case PI1_TIMER3_REG:
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Timer3 Register: 00\n", machine().describe_context());
+ return 0;
case PI1_TIMER4_REG:
+ LOGMASKED(LOG_PI1, "%s: Read PI1 Timer4 Register: 00\n", machine().describe_context());
return 0;
case SERIAL1_CMD_REG:
+ {
+ const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3);
+ LOGMASKED(LOG_SERIAL, "%s: Read Serial 1 Command Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case SERIAL1_DATA_REG:
+ {
+ const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3);
+ LOGMASKED(LOG_SERIAL, "%s: Read Serial 1 Data Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case SERIAL2_CMD_REG:
+ {
+ const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3);
+ LOGMASKED(LOG_SERIAL, "%s: Read Serial 2 Command Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case SERIAL2_DATA_REG:
- return m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3);
+ {
+ const uint8_t data = m_scc->ba_cd_r(space, (offset - SERIAL1_CMD_REG) ^ 3);
+ LOGMASKED(LOG_SERIAL, "%s: Read Serial 2 Data Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case KBD_MOUSE_REGS1:
+ {
+ const uint8_t data = m_kbdc->data_r(space, (offset - KBD_MOUSE_REGS1) * 4);
+ LOGMASKED(LOG_MOUSEKBD, "%s: Read Keyboard/Mouse Register 1: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case KBD_MOUSE_REGS2:
- return m_kbdc->data_r(space, (offset - KBD_MOUSE_REGS1) * 4);
+ {
+ const uint8_t data = m_kbdc->data_r(space, (offset - KBD_MOUSE_REGS1) * 4);
+ LOGMASKED(LOG_MOUSEKBD, "%s: Read Keyboard/Mouse Register 2: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case PANEL_REG:
+ LOGMASKED(LOG_PANEL, "%s: Read Front Panel Register: %02x\n", machine().describe_context(), m_front_panel_reg);
return m_front_panel_reg;
case SYSID_REG:
- return get_system_id();
+ {
+ const uint8_t data = get_system_id();
+ LOGMASKED(LOG_SYSID, "%s: Read System ID Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case READ_REG:
+ LOGMASKED(LOG_READ, "%s: Read Read Register: %02x\n", machine().describe_context(), m_read_reg);
return m_read_reg;
case DMA_SEL_REG:
@@ -208,9 +316,11 @@ READ32_MEMBER( ioc2_device::read )
// 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.]
// 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?]
// 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?]
+ LOGMASKED(LOG_DMA_SEL, "%s: Read DMA Select Register: %02x\n", machine().describe_context(), m_dma_sel);
return m_dma_sel;
case RESET_REG:
+ LOGMASKED(LOG_RESET, "%s: Read Reset Register: %02x\n", machine().describe_context(), m_reset_reg);
return m_reset_reg;
case WRITE_REG:
@@ -225,43 +335,93 @@ READ32_MEMBER( ioc2_device::read )
// 2 RW Ethernet Port Select. Set low for TP, high for AUI. This setting is only used when Auto Select is in manual mode. Cleared at reset.
// 1 RW Ethernet UTP/STP select. Set low to select 150 ohm termination fro shielded TP (default), set high to select 100 ohm termination for unshielded TP. Cleared at reset.
// 0 RW Ethernet Normal Threshold (NTH) select. Set low to select the normal TP squelch threshold (default), high to reduce threshold by 4.5 dB (set low when reset).
+ LOGMASKED(LOG_WRITE, "%s: Read Write Register: %02x\n", machine().describe_context(), m_write_reg);
return m_write_reg;
case INT3_LOCAL0_STATUS_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Local0 Status Register: %02x\n", machine().describe_context(), m_int3_local0_status_reg);
return m_int3_local0_status_reg;
+ }
case INT3_LOCAL0_MASK_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Local0 Mask Register: %02x\n", machine().describe_context(), m_int3_local0_mask_reg);
return m_int3_local0_mask_reg;
+ }
case INT3_LOCAL1_STATUS_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Local1 Status Register: %02x\n", machine().describe_context(), m_int3_local1_status_reg);
return m_int3_local1_status_reg;
+ }
case INT3_LOCAL1_MASK_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Local1 Mask Register: %02x\n", machine().describe_context(), m_int3_local1_mask_reg);
return m_int3_local1_mask_reg;
+ }
case INT3_MAP_STATUS_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Status Register: %02x\n", machine().describe_context(), m_int3_map_status_reg);
return m_int3_map_status_reg;
+ }
case INT3_MAP_MASK0_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Mask0 Register: %02x\n", machine().describe_context(), m_int3_map_mask0_reg);
return m_int3_map_mask0_reg;
+ }
case INT3_MAP_MASK1_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Mask1 Register: %02x\n", machine().describe_context(), m_int3_map_mask1_reg);
return m_int3_map_mask1_reg;
+ }
case INT3_MAP_POLARITY_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Map Polarity Register: %02x\n", machine().describe_context(), m_int3_map_pol_reg);
return m_int3_map_pol_reg;
+ }
case INT3_TIMER_CLEAR_REG:
- return m_int3_timer_clear_reg;
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Timer Clear (ignored)\n", machine().describe_context());
+ return 0;
+ }
case INT3_ERROR_STATUS_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Read Interrupt Error Status Register: %02x\n", machine().describe_context(), m_int3_err_status_reg);
return m_int3_err_status_reg;
+ }
case TIMER_COUNT0_REG:
+ {
+ const uint8_t data = m_pit->read(offset - TIMER_COUNT0_REG);
+ LOGMASKED(LOG_PIT, "%s: Read Timer Count0 Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case TIMER_COUNT1_REG:
+ {
+ const uint8_t data = m_pit->read(offset - TIMER_COUNT0_REG);
+ LOGMASKED(LOG_PIT, "%s: Read Timer Count1 Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case TIMER_COUNT2_REG:
+ {
+ const uint8_t data = m_pit->read(offset - TIMER_COUNT0_REG);
+ LOGMASKED(LOG_PIT, "%s: Read Timer Count2 Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
case TIMER_CONTROL_REG:
- return m_pit->read(offset - TIMER_COUNT0_REG);
+ {
+ const uint8_t data = m_pit->read(offset - TIMER_COUNT0_REG);
+ LOGMASKED(LOG_PIT, "%s: Read Timer Control Register: %02x\n", machine().describe_context(), data);
+ return data;
+ }
}
return 0;
@@ -272,33 +432,68 @@ WRITE32_MEMBER( ioc2_device::write )
switch (offset)
{
case PI1_DATA_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Data Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_pi1->write(space, offset, data & 0xff, 0xff);
+ return;
case PI1_CTRL_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Control Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_pi1->write(space, offset, data & 0xff, 0xff);
+ return;
case PI1_STATUS_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Status Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_pi1->write(space, offset, data & 0xff, 0xff);
return;
case PI1_DMA_CTRL_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 DMA Control Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ return;
case PI1_INT_STATUS_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Interrupt Status Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ return;
case PI1_INT_MASK_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Interrupt Mask Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ return;
case PI1_TIMER1_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Timer1 Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ return;
case PI1_TIMER2_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Timer2 Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ return;
case PI1_TIMER3_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Timer3 Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ return;
case PI1_TIMER4_REG:
+ LOGMASKED(LOG_PI1, "%s: Write PI1 Timer4 Register: %02x\n", machine().describe_context(), (uint8_t)data);
return;
case SERIAL1_CMD_REG:
+ LOGMASKED(LOG_SERIAL, "%s: Write Serial 1 Command Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_scc->ba_cd_w(space, (offset - SERIAL1_CMD_REG) ^ 3, data & 0xff);
+ return;
case SERIAL1_DATA_REG:
+ LOGMASKED(LOG_SERIAL, "%s: Write Serial 1 Data Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_scc->ba_cd_w(space, (offset - SERIAL1_CMD_REG) ^ 3, data & 0xff);
+ return;
case SERIAL2_CMD_REG:
+ LOGMASKED(LOG_SERIAL, "%s: Write Serial 2 Command Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_scc->ba_cd_w(space, (offset - SERIAL1_CMD_REG) ^ 3, data & 0xff);
+ return;
case SERIAL2_DATA_REG:
+ LOGMASKED(LOG_SERIAL, "%s: Write Serial 2 Data Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_scc->ba_cd_w(space, (offset - SERIAL1_CMD_REG) ^ 3, data & 0xff);
return;
case KBD_MOUSE_REGS1:
+ LOGMASKED(LOG_MOUSEKBD, "%s: Write Keyboard/Mouse Register 1: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_kbdc->data_w(space, (offset - KBD_MOUSE_REGS1) * 4, data & 0xff);
+ return;
case KBD_MOUSE_REGS2:
+ LOGMASKED(LOG_MOUSEKBD, "%s: Write Keyboard/Mouse Register 2: %02x\n", machine().describe_context(), (uint8_t)data);
m_kbdc->data_w(space, (offset - KBD_MOUSE_REGS1) * 4, data & 0xff);
return;
case PANEL_REG:
+ LOGMASKED(LOG_PANEL, "%s: Write Front Panel Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_front_panel_reg &= ~(data & (FRONT_PANEL_VOL_UP_INT | FRONT_PANEL_VOL_DOWN_INT | FRONT_PANEL_POWER_BUTTON_INT));
return;
@@ -310,14 +505,15 @@ WRITE32_MEMBER( ioc2_device::write )
// 2 RW Parallel Port DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [this makes sense. -ed.]
// 1 RW ISDN Channel B DMA Select. A high bit selects the Parallel Port DMA channel. 0\h is the default after reset. [is this a copy/paste error? perhaps "Parallel Port" should be "ISDN Channel B"?]
// 0 RW [same text as above. Another copy/paste error, maybe? Should be channel A, with the bit selecting DMA channel 0/1 for ISDN channel A, the and the same for ISDN channel B in bit 1?]
+ LOGMASKED(LOG_DMA_SEL, "%s: Write DMA Select Register: %02x\n", machine().describe_context(), (uint8_t)data);
uint8_t old = m_dma_sel;
m_dma_sel = data;
- uint8_t diff = old ^ m_dma_sel;
- if (diff & DMA_SEL_CLOCK_SEL_MASK)
+ uint8_t changed = old ^ m_dma_sel;
+ if (changed & DMA_SEL_CLOCK_SEL_MASK)
{
- if (diff & DMA_SEL_CLOCK_SEL_EXT)
+ if (changed & DMA_SEL_CLOCK_SEL_EXT)
{
- logerror("%s: External clock select %sselected\n", machine().describe_context(), (old & DMA_SEL_CLOCK_SEL_EXT) != 0 ? "de" : "");
+ LOGMASKED(LOG_DMA_SEL, "%s: External clock select %sselected\n", machine().describe_context(), (old & DMA_SEL_CLOCK_SEL_EXT) != 0 ? "de" : "");
// TODO: verify the external Rx/Tx clock, is it fixed or programmable?
}
}
@@ -326,10 +522,12 @@ WRITE32_MEMBER( ioc2_device::write )
}
case RESET_REG:
+ LOGMASKED(LOG_RESET, "%s: Write Reset Register: %02x\n", machine().describe_context(), (uint8_t)data);
handle_reset_reg_write(data);
return;
case WRITE_REG:
+ LOGMASKED(LOG_RESET, "%s: Write Write Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_write_reg = data;
return;
@@ -342,6 +540,7 @@ WRITE32_MEMBER( ioc2_device::write )
case INT3_LOCAL0_MASK_REG:
{
+ LOGMASKED(LOG_INT3, "%s: Write Interrupt Local0 Mask Register: %02x\n", machine().describe_context(), (uint8_t)data);
uint8_t old = m_int3_local0_mask_reg;
m_int3_local0_mask_reg = data;
bool old_line = (old & m_int3_local0_status_reg) != 0;
@@ -356,6 +555,7 @@ WRITE32_MEMBER( ioc2_device::write )
case INT3_LOCAL1_MASK_REG:
{
+ LOGMASKED(LOG_INT3, "%s: Write Interrupt Local1 Mask Register: %02x\n", machine().describe_context(), (uint8_t)data);
uint8_t old = m_int3_local1_mask_reg;
m_int3_local1_mask_reg = data;
bool old_line = (old & m_int3_local1_status_reg) != 0;
@@ -370,23 +570,46 @@ WRITE32_MEMBER( ioc2_device::write )
case INT3_MAP_MASK0_REG:
// TODO: Implement mappable interrupts
+ LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Mask0 Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_int3_map_mask0_reg = data;
return;
case INT3_MAP_MASK1_REG:
// TODO: Implement mappable interrupts
+ LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Mask1 Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_int3_map_mask1_reg = data;
return;
case INT3_MAP_POLARITY_REG:
// TODO: Mappable interrupt polarity select
+ LOGMASKED(LOG_INT3, "%s: Write Interrupt Map Polarity Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_int3_map_pol_reg = data;
return;
+ case INT3_TIMER_CLEAR_REG:
+ {
+ LOGMASKED(LOG_INT3, "%s: Write Interrupt Timer Clear Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ if (BIT(data, 0))
+ m_maincpu->set_input_line(MIPS3_IRQ2, CLEAR_LINE);
+ if (BIT(data, 1))
+ m_maincpu->set_input_line(MIPS3_IRQ3, CLEAR_LINE);
+ return;
+ }
+
case TIMER_COUNT0_REG:
+ LOGMASKED(LOG_PIT, "%s: Write Timer Count0 Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_pit->write(offset - TIMER_COUNT0_REG, data & 0xff);
+ return;
case TIMER_COUNT1_REG:
+ LOGMASKED(LOG_PIT, "%s: Write Timer Count1 Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_pit->write(offset - TIMER_COUNT0_REG, data & 0xff);
+ return;
case TIMER_COUNT2_REG:
+ LOGMASKED(LOG_PIT, "%s: Write Timer Count2 Register: %02x\n", machine().describe_context(), (uint8_t)data);
+ m_pit->write(offset - TIMER_COUNT0_REG, data & 0xff);
+ return;
case TIMER_CONTROL_REG:
+ LOGMASKED(LOG_PIT, "%s: Write Timer Control Register: %02x\n", machine().describe_context(), (uint8_t)data);
m_pit->write(offset - TIMER_COUNT0_REG, data & 0xff);
return;
}
diff --git a/src/mame/machine/ioc2.h b/src/mame/machine/ioc2.h
index bfe637f206a..54898e95b46 100644
--- a/src/mame/machine/ioc2.h
+++ b/src/mame/machine/ioc2.h
@@ -67,6 +67,9 @@ protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual ioport_constructor device_input_ports() const override;
+ DECLARE_WRITE_LINE_MEMBER(timer0_int);
+ DECLARE_WRITE_LINE_MEMBER(timer1_int);
+
enum
{
PI1_DATA_REG = 0x00/4,
@@ -160,7 +163,6 @@ protected:
uint8_t m_int3_map_mask0_reg;
uint8_t m_int3_map_mask1_reg;
uint8_t m_int3_map_pol_reg;
- uint8_t m_int3_timer_clear_reg;
uint8_t m_int3_err_status_reg;
uint32_t m_par_read_cnt;
diff --git a/src/mame/machine/sgi.cpp b/src/mame/machine/sgi.cpp
index ed0967130c4..1bbf910dc28 100644
--- a/src/mame/machine/sgi.cpp
+++ b/src/mame/machine/sgi.cpp
@@ -11,69 +11,65 @@
#include "emu.h"
#include "sgi.h"
-#define VERBOSE_LEVEL ( 2 )
+#define LOG_READS (1 << 0)
+#define LOG_WRITES (1 << 1)
+#define LOG_WATCHDOG (1 << 2)
+#define LOG_MEMCFG (1 << 3)
+#define LOG_UNKNOWN (1 << 4)
+#define LOG_DEFAULT (LOG_READS | LOG_WRITES | LOG_WATCHDOG)
-#if 0
-static inline void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ... )
-{
- if( VERBOSE_LEVEL >= n_level )
- {
- va_list v;
- char buf[ 32768 ];
- va_start( v, s_fmt );
- vsprintf( buf, s_fmt, v );
- va_end( v );
- logerror( "%s: %s", machine.describe_context(), buf );
- }
-}
-#endif
+#define VERBOSE (0)
+#include "logmacro.h"
DEFINE_DEVICE_TYPE(SGI_MC, sgi_mc_device, "sgi_mc", "SGI Memory Controller")
sgi_mc_device::sgi_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SGI_MC, tag, owner, clock),
- m_tUpdateTimer(nullptr),
- m_nCPUControl0(0),
- m_nCPUControl1(0),
- m_nWatchdog(0),
- m_nSysID(0),
- m_nRPSSDiv(0),
- m_nRefCntPreload(0),
- m_nRefCnt(0),
- m_nGIO64ArbParam(0),
- m_nArbCPUTime(0),
- m_nArbBurstTime(0),
- m_nMemCfg0(0),
- m_nMemCfg1(0),
- m_nCPUMemAccCfg(0),
- m_nGIOMemAccCfg(0),
- m_nCPUErrorAddr(0),
- m_nCPUErrorStatus(0),
- m_nGIOErrorAddr(0),
- m_nGIOErrorStatus(0),
- m_nSysSemaphore(0),
- m_nGIOLock(0),
- m_nEISALock(0),
- m_nGIO64TransMask(0),
- m_nGIO64Subst(0),
- m_nDMAIntrCause(0),
- m_nDMAControl(0),
- m_nDMATLBEntry0Hi(0),
- m_nDMATLBEntry0Lo(0),
- m_nDMATLBEntry1Hi(0),
- m_nDMATLBEntry1Lo(0),
- m_nDMATLBEntry2Hi(0),
- m_nDMATLBEntry2Lo(0),
- m_nDMATLBEntry3Hi(0),
- m_nDMATLBEntry3Lo(0),
- m_nRPSSCounter(0),
- m_nDMAMemAddr(0),
- m_nDMALineCntWidth(0),
- m_nDMALineZoomStride(0),
- m_nDMAGIO64Addr(0),
- m_nDMAMode(0),
- m_nDMAZoomByteCnt(0),
- m_nDMARunning(0)
+ m_rpss_timer(nullptr),
+ m_cpu_control0(0),
+ m_cpu_control1(0),
+ m_watchdog(0),
+ m_sys_id(0),
+ m_rpss_divider(0),
+ m_refcnt_preload(0),
+ m_refcnt(0),
+ m_gio64_arb_param(0),
+ m_arb_cpu_time(0),
+ m_arb_burst_time(0),
+ m_mem_config0(0),
+ m_mem_config1(0),
+ m_cpu_mem_access_config(0),
+ m_gio_mem_access_config(0),
+ m_cpu_error_addr(0),
+ m_cpu_error_status(0),
+ m_gio_error_addr(0),
+ m_gio_error_status(0),
+ m_sys_semaphore(0),
+ m_gio_lock(0),
+ m_eisa_lock(0),
+ m_gio64_translate_mask(0),
+ m_gio64_substitute_bits(0),
+ m_dma_int_cause(0),
+ m_dma_control(0),
+ m_dma_tlb_entry0_hi(0),
+ m_dma_tlb_entry0_lo(0),
+ m_dma_tlb_entry1_hi(0),
+ m_dma_tlb_entry1_lo(0),
+ m_dma_tlb_entry2_hi(0),
+ m_dma_tlb_entry2_lo(0),
+ m_dma_tlb_entry3_hi(0),
+ m_dma_tlb_entry3_lo(0),
+ m_rpss_counter(0),
+ m_dma_mem_addr(0),
+ m_dma_size(0),
+ m_dma_stride(0),
+ m_dma_gio64_addr(0),
+ m_dma_mode(0),
+ m_dma_count(0),
+ m_dma_running(0),
+ m_rpss_divide_counter(0),
+ m_rpss_divide_count(0),
+ m_rpss_increment(0)
{
}
@@ -86,477 +82,449 @@ void sgi_mc_device::device_start()
// if Indigo2, ID appropriately
if (!strcmp(machine().system().name, "ip244415"))
{
- m_nSysID = 0x11; // rev. B MC, EISA bus present
+ m_sys_id = 0x11; // rev. B MC, EISA bus present
}
- timer_init();
+ m_rpss_timer = timer_alloc(TIMER_RPSS);
+ m_rpss_timer->adjust(attotime::never);
+
+ save_item(NAME(m_cpu_control0));
+ save_item(NAME(m_cpu_control1));
+ save_item(NAME(m_watchdog));
+ save_item(NAME(m_sys_id));
+ save_item(NAME(m_rpss_divider));
+ save_item(NAME(m_refcnt_preload));
+ save_item(NAME(m_refcnt));
+ save_item(NAME(m_gio64_arb_param));
+ save_item(NAME(m_arb_cpu_time));
+ save_item(NAME(m_arb_burst_time));
+ save_item(NAME(m_mem_config0));
+ save_item(NAME(m_mem_config1));
+ save_item(NAME(m_cpu_mem_access_config));
+ save_item(NAME(m_gio_mem_access_config));
+ save_item(NAME(m_cpu_error_addr));
+ save_item(NAME(m_cpu_error_status));
+ save_item(NAME(m_gio_error_addr));
+ save_item(NAME(m_gio_error_status));
+ save_item(NAME(m_sys_semaphore));
+ save_item(NAME(m_gio_lock));
+ save_item(NAME(m_eisa_lock));
+ save_item(NAME(m_gio64_translate_mask));
+ save_item(NAME(m_gio64_substitute_bits));
+ save_item(NAME(m_dma_int_cause));
+ save_item(NAME(m_dma_control));
+ save_item(NAME(m_dma_tlb_entry0_hi));
+ save_item(NAME(m_dma_tlb_entry0_lo));
+ save_item(NAME(m_dma_tlb_entry1_hi));
+ save_item(NAME(m_dma_tlb_entry1_lo));
+ save_item(NAME(m_dma_tlb_entry2_hi));
+ save_item(NAME(m_dma_tlb_entry2_lo));
+ save_item(NAME(m_dma_tlb_entry3_hi));
+ save_item(NAME(m_dma_tlb_entry3_lo));
+ save_item(NAME(m_rpss_counter));
+ save_item(NAME(m_dma_mem_addr));
+ save_item(NAME(m_dma_size));
+ save_item(NAME(m_dma_stride));
+ save_item(NAME(m_dma_gio64_addr));
+ save_item(NAME(m_dma_mode));
+ save_item(NAME(m_dma_count));
+ save_item(NAME(m_dma_running));
+ save_item(NAME(m_semaphore));
+ save_item(NAME(m_rpss_divide_counter));
+ save_item(NAME(m_rpss_divide_count));
+ save_item(NAME(m_rpss_increment));
+}
- save_item(NAME(m_nCPUControl0));
- save_item(NAME(m_nCPUControl1));
- save_item(NAME(m_nWatchdog));
- save_item(NAME(m_nSysID));
- save_item(NAME(m_nRPSSDiv));
- save_item(NAME(m_nRefCntPreload));
- save_item(NAME(m_nRefCnt));
- save_item(NAME(m_nGIO64ArbParam));
- save_item(NAME(m_nArbCPUTime));
- save_item(NAME(m_nArbBurstTime));
- save_item(NAME(m_nMemCfg0));
- save_item(NAME(m_nMemCfg1));
- save_item(NAME(m_nCPUMemAccCfg));
- save_item(NAME(m_nGIOMemAccCfg));
- save_item(NAME(m_nCPUErrorAddr));
- save_item(NAME(m_nCPUErrorStatus));
- save_item(NAME(m_nGIOErrorAddr));
- save_item(NAME(m_nGIOErrorStatus));
- save_item(NAME(m_nSysSemaphore));
- save_item(NAME(m_nGIOLock));
- save_item(NAME(m_nEISALock));
- save_item(NAME(m_nGIO64TransMask));
- save_item(NAME(m_nGIO64Subst));
- save_item(NAME(m_nDMAIntrCause));
- save_item(NAME(m_nDMAControl));
- save_item(NAME(m_nDMATLBEntry0Hi));
- save_item(NAME(m_nDMATLBEntry0Lo));
- save_item(NAME(m_nDMATLBEntry1Hi));
- save_item(NAME(m_nDMATLBEntry1Lo));
- save_item(NAME(m_nDMATLBEntry2Hi));
- save_item(NAME(m_nDMATLBEntry2Lo));
- save_item(NAME(m_nDMATLBEntry3Hi));
- save_item(NAME(m_nDMATLBEntry3Lo));
- save_item(NAME(m_nRPSSCounter));
- save_item(NAME(m_nDMAMemAddr));
- save_item(NAME(m_nDMALineCntWidth));
- save_item(NAME(m_nDMALineZoomStride));
- save_item(NAME(m_nDMAGIO64Addr));
- save_item(NAME(m_nDMAMode));
- save_item(NAME(m_nDMAZoomByteCnt));
- save_item(NAME(m_nDMARunning));
+void sgi_mc_device::device_reset()
+{
+ memset(m_semaphore, 0, sizeof(uint32_t) * 16);
+ m_rpss_timer->adjust(attotime::from_hz(10000000), 0, attotime::from_hz(10000000));
+ m_rpss_divider = 0x0104;
+ m_rpss_divide_counter = 4;
+ m_rpss_divide_count = 4;
+ m_rpss_increment = 1;
}
-READ32_MEMBER( sgi_mc_device::read )
+READ32_MEMBER(sgi_mc_device::read)
{
offset <<= 2;
- switch( offset )
+ switch (offset & ~4)
{
case 0x0000:
- case 0x0004:
- //verboselog( machine(), 3, "CPU Control 0 Read: %08x (%08x)\n", m_nCPUControl0, mem_mask );
- return m_nCPUControl0;
+ LOGMASKED(LOG_READS, "%s: CPU Control 0 Read: %08x & %08x\n", machine().describe_context(), m_cpu_control0, mem_mask);
+ return m_cpu_control0;
case 0x0008:
- case 0x000c:
- //verboselog( machine(), 2, "CPU Control 1 Read: %08x (%08x)\n", m_nCPUControl1, mem_mask );
- return m_nCPUControl1;
+ LOGMASKED(LOG_READS, "%s: CPU Control 1 Read: %08x & %08x\n", machine().describe_context(), m_cpu_control1, mem_mask);
+ return m_cpu_control1;
case 0x0010:
- case 0x0014:
- //verboselog( machine(), 2, "Watchdog Timer Read: %08x (%08x)\n", m_nWatchdog, mem_mask );
- return m_nWatchdog;
+ LOGMASKED(LOG_WATCHDOG, "%s: Watchdog Timer Read: %08x & %08x\n", machine().describe_context(), m_watchdog, mem_mask);
+ return m_watchdog;
case 0x0018:
- case 0x001c:
- //verboselog( machine(), 2, "System ID Read: %08x (%08x)\n", m_nSysID, mem_mask );
- return m_nSysID;
+ LOGMASKED(LOG_READS, "%s: System ID Read: %08x & %08x\n", machine().describe_context(), m_sys_id, mem_mask);
+ return m_sys_id;
case 0x0028:
- case 0x002c:
- //verboselog( machine(), 2, "RPSS Divider Read: %08x (%08x)\n", m_nRPSSDiv, mem_mask );
- return m_nRPSSDiv;
+ LOGMASKED(LOG_READS, "%s: RPSS Divider Read: %08x & %08x\n", machine().describe_context(), m_rpss_divider, mem_mask);
+ return m_rpss_divider;
case 0x0030:
- case 0x0034:
- //verboselog( machine(), 2, "R4000 EEPROM Read\n" );
+ LOGMASKED(LOG_READS, "%s: R4000 EEPROM Read\n", machine().describe_context());
return 0;
case 0x0040:
- case 0x0044:
- //verboselog( machine(), 2, "Refresh Count Preload Read: %08x (%08x)\n", m_nRefCntPreload, mem_mask );
- return m_nRefCntPreload;
+ LOGMASKED(LOG_READS, "%s: Refresh Count Preload Read: %08x & %08x\n", machine().describe_context(), m_refcnt_preload, mem_mask);
+ return m_refcnt_preload;
case 0x0048:
- case 0x004c:
- //verboselog( machine(), 2, "Refresh Count Read: %08x (%08x)\n", m_nRefCnt, mem_mask );
- return m_nRefCnt;
+ LOGMASKED(LOG_READS, "%s: Refresh Count Read: %08x & %08x\n", machine().describe_context(), m_refcnt, mem_mask);
+ return m_refcnt;
case 0x0080:
- case 0x0084:
- //verboselog( machine(), 2, "GIO64 Arbitration Param Read: %08x (%08x)\n", m_nGIO64ArbParam, mem_mask );
- return m_nGIO64ArbParam;
+ LOGMASKED(LOG_READS, "%s: GIO64 Arbitration Param Read: %08x & %08x\n", machine().describe_context(), m_gio64_arb_param, mem_mask);
+ return m_gio64_arb_param;
case 0x0088:
- case 0x008c:
- //verboselog( machine(), 2, "Arbiter CPU Time Read: %08x (%08x)\n", m_nArbCPUTime, mem_mask );
- return m_nArbCPUTime;
+ LOGMASKED(LOG_READS, "%s: Arbiter CPU Time Read: %08x & %08x\n", machine().describe_context(), m_arb_cpu_time, mem_mask);
+ return m_arb_cpu_time;
case 0x0098:
- case 0x009c:
- //verboselog( machine(), 2, "Arbiter Long Burst Time Read: %08x (%08x)\n", m_nArbBurstTime, mem_mask );
- return m_nArbBurstTime;
+ LOGMASKED(LOG_READS, "%s: Arbiter Long Burst Time Read: %08x & %08x\n", machine().describe_context(), m_arb_burst_time, mem_mask);
+ return m_arb_burst_time;
case 0x00c0:
- case 0x00c4:
- //verboselog( machine(), 3, "Memory Configuration Register 0 Read: %08x (%08x)\n", m_nMemCfg0, mem_mask );
- return m_nMemCfg0;
+ LOGMASKED(LOG_MEMCFG, "%s: Memory Configuration Register 0 Read: %08x & %08x\n", machine().describe_context(), m_mem_config0, mem_mask);
+ return m_mem_config0;
case 0x00c8:
- case 0x00cc:
- //verboselog( machine(), 3, "Memory Configuration Register 1 Read: %08x (%08x)\n", m_nMemCfg1, mem_mask );
- return m_nMemCfg1;
+ LOGMASKED(LOG_MEMCFG, "%s: Memory Configuration Register 1 Read: %08x & %08x\n", machine().describe_context(), m_mem_config1, mem_mask);
+ return m_mem_config1;
case 0x00d0:
- case 0x00d4:
- //verboselog( machine(), 2, "CPU Memory Access Config Params Read: %08x (%08x)\n", m_nCPUMemAccCfg, mem_mask );
- return m_nCPUMemAccCfg;
+ LOGMASKED(LOG_READS, "%s: CPU Memory Access Config Params Read: %08x & %08x\n", machine().describe_context(), m_cpu_mem_access_config, mem_mask);
+ return m_cpu_mem_access_config;
case 0x00d8:
- case 0x00dc:
- //verboselog( machine(), 2, "GIO Memory Access Config Params Read: %08x (%08x)\n", m_nGIOMemAccCfg, mem_mask );
- return m_nGIOMemAccCfg;
+ LOGMASKED(LOG_READS, "%s: GIO Memory Access Config Params Read: %08x & %08x\n", machine().describe_context(), m_gio_mem_access_config, mem_mask);
+ return m_gio_mem_access_config;
case 0x00e0:
- case 0x00e4:
- //verboselog( machine(), 2, "CPU Error Address Read: %08x (%08x)\n", m_nCPUErrorAddr, mem_mask );
- return m_nCPUErrorAddr;
+ LOGMASKED(LOG_READS, "%s: CPU Error Address Read: %08x & %08x\n", machine().describe_context(), m_cpu_error_addr, mem_mask);
+ return m_cpu_error_addr;
case 0x00e8:
- case 0x00ec:
- //verboselog( machine(), 2, "CPU Error Status Read: %08x (%08x)\n", m_nCPUErrorStatus, mem_mask );
- return m_nCPUErrorStatus;
+ LOGMASKED(LOG_READS, "%s: CPU Error Status Read: %08x & %08x\n", machine().describe_context(), m_cpu_error_status, mem_mask);
+ return m_cpu_error_status;
case 0x00f0:
- case 0x00f4:
- //verboselog( machine(), 2, "GIO Error Address Read: %08x (%08x)\n", m_nGIOErrorAddr, mem_mask );
- return m_nGIOErrorAddr;
+ LOGMASKED(LOG_READS, "%s: GIO Error Address Read: %08x & %08x\n", machine().describe_context(), m_gio_error_addr, mem_mask);
+ return m_gio_error_addr;
case 0x00f8:
- case 0x00fc:
- //verboselog( machine(), 2, "GIO Error Status Read: %08x (%08x)\n", m_nGIOErrorStatus, mem_mask );
- return m_nGIOErrorStatus;
+ LOGMASKED(LOG_READS, "%s: GIO Error Status Read: %08x & %08x\n", machine().describe_context(), m_gio_error_status, mem_mask);
+ return m_gio_error_status;
case 0x0100:
- case 0x0104:
- //verboselog( machine(), 2, "System Semaphore Read: %08x (%08x)\n", m_nSysSemaphore, mem_mask );
- return m_nSysSemaphore;
+ LOGMASKED(LOG_READS, "%s: System Semaphore Read: %08x & %08x\n", machine().describe_context(), m_sys_semaphore, mem_mask);
+ return m_sys_semaphore;
case 0x0108:
- case 0x010c:
- //verboselog( machine(), 2, "GIO Lock Read: %08x (%08x)\n", m_nGIOLock, mem_mask );
- return m_nGIOLock;
+ LOGMASKED(LOG_READS, "%s: GIO Lock Read: %08x & %08x\n", machine().describe_context(), m_gio_lock, mem_mask);
+ return m_gio_lock;
case 0x0110:
- case 0x0114:
- //verboselog( machine(), 2, "EISA Lock Read: %08x (%08x)\n", m_nEISALock, mem_mask );
- return m_nEISALock;
+ LOGMASKED(LOG_READS, "%s: EISA Lock Read: %08x & %08x\n", machine().describe_context(), m_eisa_lock, mem_mask);
+ return m_eisa_lock;
case 0x0150:
- case 0x0154:
- //verboselog( machine(), 2, "GIO64 Translation Address Mask Read: %08x (%08x)\n", m_nGIO64TransMask, mem_mask );
- return m_nGIO64TransMask;
+ LOGMASKED(LOG_READS, "%s: GIO64 Translation Address Mask Read: %08x & %08x\n", machine().describe_context(), m_gio64_translate_mask, mem_mask);
+ return m_gio64_translate_mask;
case 0x0158:
- case 0x015c:
- //verboselog( machine(), 2, "GIO64 Translation Address Substitution Bits Read: %08x (%08x)\n", m_nGIO64Subst, mem_mask );
- return m_nGIO64Subst;
+ LOGMASKED(LOG_READS, "%s: GIO64 Translation Address Substitution Bits Read: %08x & %08x\n", machine().describe_context(), m_gio64_substitute_bits, mem_mask);
+ return m_gio64_substitute_bits;
case 0x0160:
- case 0x0164:
- //verboselog( machine(), 2, "DMA Interrupt Cause: %08x (%08x)\n", m_nDMAIntrCause, mem_mask );
- return m_nDMAIntrCause;
+ LOGMASKED(LOG_READS, "%s: DMA Interrupt Cause: %08x & %08x\n", machine().describe_context(), m_dma_int_cause, mem_mask);
+ return m_dma_int_cause;
case 0x0168:
- case 0x016c:
- //verboselog( machine(), 2, "DMA Control Read: %08x (%08x)\n", m_nDMAControl, mem_mask );
- return m_nDMAControl;
+ LOGMASKED(LOG_READS, "%s: DMA Control Read: %08x & %08x\n", machine().describe_context(), m_dma_control, mem_mask);
+ return m_dma_control;
case 0x0180:
- case 0x0184:
- //verboselog( machine(), 2, "DMA TLB Entry 0 High Read: %08x (%08x)\n", m_nDMATLBEntry0Hi, mem_mask );
- return m_nDMATLBEntry0Hi;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 0 High Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry0_hi, mem_mask);
+ return m_dma_tlb_entry0_hi;
case 0x0188:
- case 0x018c:
- //verboselog( machine(), 2, "DMA TLB Entry 0 Low Read: %08x (%08x)\n", m_nDMATLBEntry0Lo, mem_mask );
- return m_nDMATLBEntry0Lo;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 0 Low Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry0_lo, mem_mask);
+ return m_dma_tlb_entry0_lo;
case 0x0190:
- case 0x0194:
- //verboselog( machine(), 2, "DMA TLB Entry 1 High Read: %08x (%08x)\n", m_nDMATLBEntry1Hi, mem_mask );
- return m_nDMATLBEntry1Hi;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 1 High Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry1_hi, mem_mask);
+ return m_dma_tlb_entry1_hi;
case 0x0198:
- case 0x019c:
- //verboselog( machine(), 2, "DMA TLB Entry 1 Low Read: %08x (%08x)\n", m_nDMATLBEntry1Lo, mem_mask );
- return m_nDMATLBEntry1Lo;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 1 Low Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry1_lo, mem_mask);
+ return m_dma_tlb_entry1_lo;
case 0x01a0:
- case 0x01a4:
- //verboselog( machine(), 2, "DMA TLB Entry 2 High Read: %08x (%08x)\n", m_nDMATLBEntry2Hi, mem_mask );
- return m_nDMATLBEntry2Hi;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 2 High Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry2_hi, mem_mask);
+ return m_dma_tlb_entry2_hi;
case 0x01a8:
- case 0x01ac:
- //verboselog( machine(), 2, "DMA TLB Entry 2 Low Read: %08x (%08x)\n", m_nDMATLBEntry2Lo, mem_mask );
- return m_nDMATLBEntry2Lo;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 2 Low Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry2_lo, mem_mask);
+ return m_dma_tlb_entry2_lo;
case 0x01b0:
- case 0x01b4:
- //verboselog( machine(), 2, "DMA TLB Entry 3 High Read: %08x (%08x)\n", m_nDMATLBEntry3Hi, mem_mask );
- return m_nDMATLBEntry3Hi;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 3 High Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry3_hi, mem_mask);
+ return m_dma_tlb_entry3_hi;
case 0x01b8:
- case 0x01bc:
- //verboselog( machine(), 2, "DMA TLB Entry 3 Low Read: %08x (%08x)\n", m_nDMATLBEntry3Lo, mem_mask );
- return m_nDMATLBEntry3Lo;
+ LOGMASKED(LOG_READS, "%s: DMA TLB Entry 3 Low Read: %08x & %08x\n", machine().describe_context(), m_dma_tlb_entry3_lo, mem_mask);
+ return m_dma_tlb_entry3_lo;
case 0x1000:
- case 0x1004:
- //verboselog( machine(), 2, "RPSS 100ns Counter Read: %08x (%08x)\n", m_nRPSSCounter, mem_mask );
- return m_nRPSSCounter;
+ LOGMASKED(LOG_READS, "%s: RPSS 100ns Counter Read: %08x & %08x\n", machine().describe_context(), m_rpss_counter, mem_mask);
+ return m_rpss_counter;
case 0x2000:
- case 0x2004:
case 0x2008:
- case 0x200c:
- //verboselog( machine(), 0, "DMA Memory Address Read: %08x (%08x)\n", m_nDMAMemAddr, mem_mask );
- return m_nDMAMemAddr;
+ LOGMASKED(LOG_READS, "%s: DMA Memory Address Read: %08x & %08x\n", machine().describe_context(), m_dma_mem_addr, mem_mask);
+ return m_dma_mem_addr;
case 0x2010:
- case 0x2014:
- //verboselog( machine(), 0, "DMA Line Count and Width Read: %08x (%08x)\n", m_nDMALineCntWidth, mem_mask );
- return m_nDMALineCntWidth;
+ LOGMASKED(LOG_READS, "%s: DMA Line Count and Width Read: %08x & %08x\n", machine().describe_context(), m_dma_size, mem_mask);
+ return m_dma_size;
case 0x2018:
- case 0x201c:
- //verboselog( machine(), 0, "DMA Line Zoom and Stride Read: %08x (%08x)\n", m_nDMALineZoomStride, mem_mask );
- return m_nDMALineZoomStride;
+ LOGMASKED(LOG_READS, "%s: DMA Line Zoom and Stride Read: %08x & %08x\n", machine().describe_context(), m_dma_stride, mem_mask);
+ return m_dma_stride;
case 0x2020:
- case 0x2024:
case 0x2028:
- case 0x202c:
- //verboselog( machine(), 0, "DMA GIO64 Address Read: %08x (%08x)\n", m_nDMAGIO64Addr, mem_mask );
- return m_nDMAGIO64Addr;
+ LOGMASKED(LOG_READS, "%s: DMA GIO64 Address Read: %08x & %08x\n", machine().describe_context(), m_dma_gio64_addr, mem_mask);
+ return m_dma_gio64_addr;
case 0x2030:
- case 0x2034:
- //verboselog( machine(), 0, "DMA Mode Write: %08x (%08x)\n", m_nDMAMode, mem_mask );
- return m_nDMAMode;
+ LOGMASKED(LOG_READS, "%s: DMA Mode Write: %08x & %08x\n", machine().describe_context(), m_dma_mode, mem_mask);
+ return m_dma_mode;
case 0x2038:
- case 0x203c:
- //verboselog( machine(), 0, "DMA Zoom Count Read: %08x (%08x)\n", m_nDMAZoomByteCnt, mem_mask );
- return m_nDMAZoomByteCnt;
-// case 0x2040:
-// case 0x2044:
-// //verboselog( machine(), 2, "DMA Start Write: %08x (%08x)\n", data, mem_mask );
- // Start DMA
-// m_nDMARunning = 1;
-// break;
+ LOGMASKED(LOG_READS, "%s: DMA Zoom Count Read: %08x & %08x\n", machine().describe_context(), m_dma_count, mem_mask);
+ return m_dma_count;
+ case 0x2040:
+ LOGMASKED(LOG_READS, "%s: DMA Start Read\n", machine().describe_context());
+ return 0;
case 0x2048:
- case 0x204c:
- //verboselog( machine(), 0, "VDMA Running Read: %08x (%08x)\n", m_nDMARunning, mem_mask );
- if( m_nDMARunning == 1 )
+ LOGMASKED(LOG_READS, "%s: VDMA Running Read: %08x & %08x\n", machine().describe_context(), m_dma_running, mem_mask);
+ if (m_dma_running == 1)
{
- m_nDMARunning = 0;
+ m_dma_running = 0;
return 0x00000040;
}
else
{
return 0;
}
+ case 0x10000:
+ case 0x11000:
+ case 0x12000:
+ case 0x13000:
+ case 0x14000:
+ case 0x15000:
+ case 0x16000:
+ case 0x17000:
+ case 0x18000:
+ case 0x19000:
+ case 0x1a000:
+ case 0x1b000:
+ case 0x1c000:
+ case 0x1d000:
+ case 0x1e000:
+ case 0x1f000:
+ {
+ const uint32_t data = m_semaphore[(offset - 0x10000) >> 12];
+ LOGMASKED(LOG_READS, "%s: Semaphore %d Read: %08x & %08x\n", machine().describe_context(), (offset - 0x10000) >> 12, data, mem_mask);
+ m_semaphore[(offset - 0x10000) >> 12] = 1;
+ return data;
+ }
+ default:
+ LOGMASKED(LOG_READS | LOG_UNKNOWN, "%s: Unmapped MC read: %08x & %08x\n", machine().describe_context(), 0x1fa00000 + offset, mem_mask);
+ return 0;
}
- //verboselog( machine(), 0, "Unmapped MC read: 0x%08x (%08x)\n", 0x1fa00000 + offset, mem_mask );
return 0;
}
WRITE32_MEMBER( sgi_mc_device::write )
{
offset <<= 2;
- switch( offset )
+ switch (offset & ~4)
{
case 0x0000:
- case 0x0004:
- //verboselog( machine(), 2, "CPU Control 0 Write: %08x (%08x)\n", data, mem_mask );
- m_nCPUControl0 = data;
+ LOGMASKED(LOG_WRITES, "%s: CPU Control 0 Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_cpu_control0 = data;
break;
case 0x0008:
- case 0x000c:
- //verboselog( machine(), 2, "CPU Control 1 Write: %08x (%08x)\n", data, mem_mask );
- m_nCPUControl1 = data;
+ LOGMASKED(LOG_WRITES, "%s: CPU Control 1 Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_cpu_control1 = data;
break;
case 0x0010:
- case 0x0014:
- //verboselog( machine(), 2, "Watchdog Timer Clear" );
- m_nWatchdog = 0;
+ LOGMASKED(LOG_WATCHDOG, "%s: Watchdog Timer Clear\n", machine().describe_context());
+ m_watchdog = 0;
break;
case 0x0028:
- case 0x002c:
- //verboselog( machine(), 2, "RPSS Divider Write: %08x (%08x)\n", data, mem_mask );
- m_nRPSSDiv = data;
+ LOGMASKED(LOG_WRITES, "%s: RPSS Divider Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_rpss_divider = data;
+ m_rpss_divide_count = (int)(m_rpss_divider & 0xff);
+ m_rpss_divide_counter = m_rpss_divide_count;
+ m_rpss_increment = (m_rpss_divider >> 8) & 0xff;
break;
case 0x0030:
- case 0x0034:
- //verboselog( machine(), 2, "R4000 EEPROM Write\n" );
+ LOGMASKED(LOG_WRITES, "%s: R4000 EEPROM Write: CS:%d, SCK:%d, SO:%d\n", machine().describe_context(),
+ BIT(data, 1), BIT(data, 2), BIT(data, 3));
break;
case 0x0040:
- case 0x0044:
- //verboselog( machine(), 2, "Refresh Count Preload Write: %08x (%08x)\n", data, mem_mask );
- m_nRefCntPreload = data;
+ LOGMASKED(LOG_WRITES, "%s: Refresh Count Preload Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_refcnt_preload = data;
break;
case 0x0080:
- case 0x0084:
- //verboselog( machine(), 2, "GIO64 Arbitration Param Write: %08x (%08x)\n", data, mem_mask );
- m_nGIO64ArbParam = data;
+ LOGMASKED(LOG_WRITES, "%s: GIO64 Arbitration Param Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_gio64_arb_param = data;
break;
case 0x0088:
- case 0x008c:
- //verboselog( machine(), 3, "Arbiter CPU Time Write: %08x (%08x)\n", data, mem_mask );
- m_nArbCPUTime = data;
+ LOGMASKED(LOG_WRITES, "%s: Arbiter CPU Time Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_arb_cpu_time = data;
break;
case 0x0098:
- case 0x009c:
- //verboselog( machine(), 3, "Arbiter Long Burst Time Write: %08x (%08x)\n", data, mem_mask );
- m_nArbBurstTime = data;
+ LOGMASKED(LOG_WRITES, "%s: Arbiter Long Burst Time Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_arb_burst_time = data;
break;
case 0x00c0:
- case 0x00c4:
- //verboselog( machine(), 3, "Memory Configuration Register 0 Write: %08x (%08x)\n", data, mem_mask );
- m_nMemCfg0 = data;
+ LOGMASKED(LOG_MEMCFG, "%s: Memory Configuration Register 0 Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_mem_config0 = data;
break;
case 0x00c8:
- case 0x00cc:
- //verboselog( machine(), 3, "Memory Configuration Register 1 Write: %08x (%08x)\n", data, mem_mask );
- m_nMemCfg1 = data;
+ LOGMASKED(LOG_MEMCFG, "%s: Memory Configuration Register 1 Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_mem_config1 = data;
break;
case 0x00d0:
- case 0x00d4:
- //verboselog( machine(), 2, "CPU Memory Access Config Params Write: %08x (%08x)\n", data, mem_mask );
- m_nCPUMemAccCfg = data;
+ LOGMASKED(LOG_WRITES, "%s: CPU Memory Access Config Params Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_cpu_mem_access_config = data;
break;
case 0x00d8:
- case 0x00dc:
- //verboselog( machine(), 2, "GIO Memory Access Config Params Write: %08x (%08x)\n", data, mem_mask );
- m_nGIOMemAccCfg = data;
+ LOGMASKED(LOG_WRITES, "%s: GIO Memory Access Config Params Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_gio_mem_access_config = data;
break;
case 0x00e8:
- case 0x00ec:
- //verboselog( machine(), 2, "CPU Error Status Clear\n" );
- m_nCPUErrorStatus = 0;
+ LOGMASKED(LOG_WRITES, "%s: CPU Error Status Clear\n", machine().describe_context());
+ m_cpu_error_status = 0;
break;
case 0x00f8:
- case 0x00fc:
- //verboselog( machine(), 2, "GIO Error Status Clear\n" );
- m_nGIOErrorStatus = 0;
+ LOGMASKED(LOG_WRITES, "%s: GIO Error Status Clear\n", machine().describe_context());
+ m_gio_error_status = 0;
break;
case 0x0100:
- case 0x0104:
- //verboselog( machine(), 2, "System Semaphore Write: %08x (%08x)\n", data, mem_mask );
- m_nSysSemaphore = data;
+ LOGMASKED(LOG_WRITES, "%s: System Semaphore Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_sys_semaphore = data;
break;
case 0x0108:
- case 0x010c:
- //verboselog( machine(), 2, "GIO Lock Write: %08x (%08x)\n", data, mem_mask );
- m_nGIOLock = data;
+ LOGMASKED(LOG_WRITES, "%s: GIO Lock Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_gio_lock = data;
break;
case 0x0110:
- case 0x0114:
- //verboselog( machine(), 2, "EISA Lock Write: %08x (%08x)\n", data, mem_mask );
- m_nEISALock = data;
+ LOGMASKED(LOG_WRITES, "%s: EISA Lock Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_eisa_lock = data;
break;
case 0x0150:
- case 0x0154:
- //verboselog( machine(), 2, "GIO64 Translation Address Mask Write: %08x (%08x)\n", data, mem_mask );
- m_nGIO64TransMask = data;
+ LOGMASKED(LOG_WRITES, "%s: GIO64 Translation Address Mask Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_gio64_translate_mask = data;
break;
case 0x0158:
- case 0x015c:
- //verboselog( machine(), 2, "GIO64 Translation Address Substitution Bits Write: %08x (%08x)\n", data, mem_mask );
- m_nGIO64Subst = data;
+ LOGMASKED(LOG_WRITES, "%s: GIO64 Translation Address Substitution Bits Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_gio64_substitute_bits = data;
break;
case 0x0160:
- case 0x0164:
- //verboselog( machine(), 0, "DMA Interrupt Cause Write: %08x (%08x)\n", data, mem_mask );
- m_nDMAIntrCause = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Interrupt Cause Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_int_cause = data;
break;
case 0x0168:
- case 0x016c:
- //verboselog( machine(), 0, "DMA Control Write: %08x (%08x)\n", data, mem_mask );
- m_nDMAControl = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Control Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_control = data;
break;
case 0x0180:
- case 0x0184:
- //verboselog( machine(), 0, "DMA TLB Entry 0 High Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry0Hi = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 0 High Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry0_hi = data;
break;
case 0x0188:
- case 0x018c:
- //verboselog( machine(), 0, "DMA TLB Entry 0 Low Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry0Lo = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 0 Low Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry0_lo = data;
break;
case 0x0190:
- case 0x0194:
- //verboselog( machine(), 0, "DMA TLB Entry 1 High Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry1Hi = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 1 High Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry1_hi = data;
break;
case 0x0198:
- case 0x019c:
- //verboselog( machine(), 0, "DMA TLB Entry 1 Low Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry1Lo = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 1 Low Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry1_lo = data;
break;
case 0x01a0:
- case 0x01a4:
- //verboselog( machine(), 0, "DMA TLB Entry 2 High Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry2Hi = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 2 High Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry2_hi = data;
break;
case 0x01a8:
- case 0x01ac:
- //verboselog( machine(), 0, "DMA TLB Entry 2 Low Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry2Lo = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 2 Low Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry2_lo = data;
break;
case 0x01b0:
- case 0x01b4:
- //verboselog( machine(), 0, "DMA TLB Entry 3 High Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry3Hi = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 3 High Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry3_hi = data;
break;
case 0x01b8:
- case 0x01bc:
- //verboselog( machine(), 0, "DMA TLB Entry 3 Low Write: %08x (%08x)\n", data, mem_mask );
- m_nDMATLBEntry3Lo = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA TLB Entry 3 Low Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_tlb_entry3_lo = data;
break;
case 0x2000:
- case 0x2004:
- //verboselog( machine(), 0, "DMA Memory Address Write: %08x (%08x)\n", data, mem_mask );
- m_nDMAMemAddr = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Memory Address Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_mem_addr = data;
break;
case 0x2008:
- case 0x200c:
- //verboselog( machine(), 0, "DMA Memory Address + Default Params Write: %08x (%08x)\n", data, mem_mask );
- m_nDMAMemAddr = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Memory Address + Default Params Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_mem_addr = data;
break;
case 0x2010:
- case 0x2014:
- //verboselog( machine(), 0, "DMA Line Count and Width Write: %08x (%08x)\n", data, mem_mask );
- m_nDMALineCntWidth = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Line Count and Width Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_size = data;
break;
case 0x2018:
- case 0x201c:
- //verboselog( machine(), 0, "DMA Line Zoom and Stride Write: %08x (%08x)\n", data, mem_mask );
- m_nDMALineZoomStride = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Line Zoom and Stride Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_stride = data;
break;
case 0x2020:
- case 0x2024:
- //verboselog( machine(), 0, "DMA GIO64 Address Write: %08x (%08x)\n", data, mem_mask );
- m_nDMAGIO64Addr = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA GIO64 Address Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_gio64_addr = data;
break;
case 0x2028:
- case 0x202c:
- //verboselog( machine(), 0, "DMA GIO64 Address Write + Start DMA: %08x (%08x)\n", data, mem_mask );
- m_nDMAGIO64Addr = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA GIO64 Address Write + Start DMA: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_gio64_addr = data;
// Start DMA
- m_nDMARunning = 1;
+ m_dma_running = 1;
break;
case 0x2030:
- case 0x2034:
- //verboselog( machine(), 0, "DMA Mode Write: %08x (%08x)\n", data, mem_mask );
- m_nDMAMode = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Mode Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_mode = data;
break;
case 0x2038:
- case 0x203c:
- //verboselog( machine(), 0, "DMA Zoom Count + Byte Count Write: %08x (%08x)\n", data, mem_mask );
- m_nDMAZoomByteCnt = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA Zoom Count + Byte Count Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_count = data;
break;
case 0x2040:
- case 0x2044:
- //verboselog( machine(), 0, "DMA Start Write: %08x (%08x)\n", data, mem_mask );
+ LOGMASKED(LOG_WRITES, "%s: DMA Start Write: %08x & %08x\n", machine().describe_context(), data, mem_mask);
// Start DMA
- m_nDMARunning = 1;
+ m_dma_running = 1;
break;
case 0x2070:
- case 0x2074:
- //verboselog( machine(), 0, "DMA GIO64 Address Write + Default Params Write + Start DMA: %08x (%08x)\n", data, mem_mask );
- m_nDMAGIO64Addr = data;
+ LOGMASKED(LOG_WRITES, "%s: DMA GIO64 Address Write + Default Params Write + Start DMA: %08x & %08x\n", machine().describe_context(), data, mem_mask);
+ m_dma_gio64_addr = data;
// Start DMA
- m_nDMARunning = 1;
+ m_dma_running = 1;
+ break;
+ case 0x10000:
+ case 0x11000:
+ case 0x12000:
+ case 0x13000:
+ case 0x14000:
+ case 0x15000:
+ case 0x16000:
+ case 0x17000:
+ case 0x18000:
+ case 0x19000:
+ case 0x1a000:
+ case 0x1b000:
+ case 0x1c000:
+ case 0x1d000:
+ case 0x1e000:
+ case 0x1f000:
+ LOGMASKED(LOG_WRITES, "%s: Semaphore %d Write: %08x & %08x\n", machine().describe_context(), (offset - 0x10000) >> 12, data, mem_mask);
+ m_semaphore[(offset - 0x10000) >> 12] = data & 1;
break;
default:
- //verboselog( machine(), 0, "Unmapped MC write: 0x%08x: %08x (%08x)\n", 0x1fa00000 + offset, data, mem_mask );
+ LOGMASKED(LOG_WRITES | LOG_UNKNOWN, "%s: Unmapped MC write: %08x: %08x & %08x\n", machine().describe_context(), 0x1fa00000 + offset, data, mem_mask);
break;
}
}
-void sgi_mc_device::update()
-{
- m_nRPSSCounter += 1000;
-}
-
-TIMER_CALLBACK_MEMBER(sgi_mc_device::update_callback)
-{
- update();
-}
-
-void sgi_mc_device::timer_init()
+void sgi_mc_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- m_tUpdateTimer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(sgi_mc_device::update_callback), this));
- m_tUpdateTimer->adjust(attotime::from_hz(10000), 0, attotime::from_hz(10000));
+ if (id == TIMER_RPSS)
+ {
+ m_rpss_divide_counter--;
+ if (m_rpss_divide_counter < 0)
+ {
+ m_rpss_divide_counter = m_rpss_divide_count;
+ m_rpss_counter += m_rpss_increment;
+ }
+ }
}
diff --git a/src/mame/machine/sgi.h b/src/mame/machine/sgi.h
index c47fc0c6879..c66c81f5c32 100644
--- a/src/mame/machine/sgi.h
+++ b/src/mame/machine/sgi.h
@@ -29,51 +29,59 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
+ virtual void device_reset() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+
+ static const device_timer_id TIMER_RPSS = 0;
private:
// internal state
- emu_timer *m_tUpdateTimer;
- uint32_t m_nCPUControl0;
- uint32_t m_nCPUControl1;
- uint32_t m_nWatchdog;
- uint32_t m_nSysID;
- uint32_t m_nRPSSDiv;
- uint32_t m_nRefCntPreload;
- uint32_t m_nRefCnt;
- uint32_t m_nGIO64ArbParam;
- uint32_t m_nArbCPUTime;
- uint32_t m_nArbBurstTime;
- uint32_t m_nMemCfg0;
- uint32_t m_nMemCfg1;
- uint32_t m_nCPUMemAccCfg;
- uint32_t m_nGIOMemAccCfg;
- uint32_t m_nCPUErrorAddr;
- uint32_t m_nCPUErrorStatus;
- uint32_t m_nGIOErrorAddr;
- uint32_t m_nGIOErrorStatus;
- uint32_t m_nSysSemaphore;
- uint32_t m_nGIOLock;
- uint32_t m_nEISALock;
- uint32_t m_nGIO64TransMask;
- uint32_t m_nGIO64Subst;
- uint32_t m_nDMAIntrCause;
- uint32_t m_nDMAControl;
- uint32_t m_nDMATLBEntry0Hi;
- uint32_t m_nDMATLBEntry0Lo;
- uint32_t m_nDMATLBEntry1Hi;
- uint32_t m_nDMATLBEntry1Lo;
- uint32_t m_nDMATLBEntry2Hi;
- uint32_t m_nDMATLBEntry2Lo;
- uint32_t m_nDMATLBEntry3Hi;
- uint32_t m_nDMATLBEntry3Lo;
- uint32_t m_nRPSSCounter;
- uint32_t m_nDMAMemAddr;
- uint32_t m_nDMALineCntWidth;
- uint32_t m_nDMALineZoomStride;
- uint32_t m_nDMAGIO64Addr;
- uint32_t m_nDMAMode;
- uint32_t m_nDMAZoomByteCnt;
- uint32_t m_nDMARunning;
+ emu_timer *m_rpss_timer;
+ uint32_t m_cpu_control0;
+ uint32_t m_cpu_control1;
+ uint32_t m_watchdog;
+ uint32_t m_sys_id;
+ uint32_t m_rpss_divider;
+ uint32_t m_refcnt_preload;
+ uint32_t m_refcnt;
+ uint32_t m_gio64_arb_param;
+ uint32_t m_arb_cpu_time;
+ uint32_t m_arb_burst_time;
+ uint32_t m_mem_config0;
+ uint32_t m_mem_config1;
+ uint32_t m_cpu_mem_access_config;
+ uint32_t m_gio_mem_access_config;
+ uint32_t m_cpu_error_addr;
+ uint32_t m_cpu_error_status;
+ uint32_t m_gio_error_addr;
+ uint32_t m_gio_error_status;
+ uint32_t m_sys_semaphore;
+ uint32_t m_gio_lock;
+ uint32_t m_eisa_lock;
+ uint32_t m_gio64_translate_mask;
+ uint32_t m_gio64_substitute_bits;
+ uint32_t m_dma_int_cause;
+ uint32_t m_dma_control;
+ uint32_t m_dma_tlb_entry0_hi;
+ uint32_t m_dma_tlb_entry0_lo;
+ uint32_t m_dma_tlb_entry1_hi;
+ uint32_t m_dma_tlb_entry1_lo;
+ uint32_t m_dma_tlb_entry2_hi;
+ uint32_t m_dma_tlb_entry2_lo;
+ uint32_t m_dma_tlb_entry3_hi;
+ uint32_t m_dma_tlb_entry3_lo;
+ uint32_t m_rpss_counter;
+ uint32_t m_dma_mem_addr;
+ uint32_t m_dma_size;
+ uint32_t m_dma_stride;
+ uint32_t m_dma_gio64_addr;
+ uint32_t m_dma_mode;
+ uint32_t m_dma_count;
+ uint32_t m_dma_running;
+ uint32_t m_semaphore[16];
+ int m_rpss_divide_counter;
+ int m_rpss_divide_count;
+ uint8_t m_rpss_increment;
void update();
TIMER_CALLBACK_MEMBER(update_callback);
diff --git a/src/mame/video/newport.cpp b/src/mame/video/newport.cpp
index a62b5b70e0f..1748bcfa208 100644
--- a/src/mame/video/newport.cpp
+++ b/src/mame/video/newport.cpp
@@ -29,62 +29,25 @@
#include "emu.h"
#include "video/newport.h"
-#define VERBOSE_LEVEL ( 0 )
-
-#if 0
-static inline void ATTR_PRINTF(3,4) verboselog(running_machine &machine, int n_level, const char *s_fmt, ... )
-{
- if( VERBOSE_LEVEL >= n_level )
- {
- va_list v;
- char buf[ 32768 ];
- va_start( v, s_fmt );
- vsprintf( buf, s_fmt, v );
- va_end( v );
- logerror( "%s %s", machine.describe_context(), buf );
- }
-}
-#endif
-
-#define VC2_VIDENTRY m_VC2.nRegister[0x00]
-#define VC2_CURENTRY m_VC2.nRegister[0x01]
-#define VC2_CURSORX m_VC2.nRegister[0x02]
-#define VC2_CURSORY m_VC2.nRegister[0x03]
-#define VC2_CURCURSORX m_VC2.nRegister[0x04]
-#define VC2_DIDENTRY m_VC2.nRegister[0x05]
-#define VC2_SCANLINELEN m_VC2.nRegister[0x06]
-#define VC2_RAMADDR m_VC2.nRegister[0x07]
-#define VC2_VTFRAMEPTR m_VC2.nRegister[0x08]
-#define VC2_VTLINEPTR m_VC2.nRegister[0x09]
-#define VC2_VTLINERUN m_VC2.nRegister[0x0a]
-#define VC2_VLINECNT m_VC2.nRegister[0x0b]
-#define VC2_CURTABLEPTR m_VC2.nRegister[0x0c]
-#define VC2_WORKCURSORY m_VC2.nRegister[0x0d]
-#define VC2_DIDFRAMEPTR m_VC2.nRegister[0x0e]
-#define VC2_DIDLINEPTR m_VC2.nRegister[0x0f]
-#define VC2_DISPLAYCTRL m_VC2.nRegister[0x10]
-#define VC2_CONFIG m_VC2.nRegister[0x1f]
-
-#define XMAP0_CONFIG m_XMAP0.nRegister[0x00]
-#define XMAP0_REVISION m_XMAP0.nRegister[0x01]
-#define XMAP0_ENTRIES m_XMAP0.nRegister[0x02]
-#define XMAP0_CURCMAP m_XMAP0.nRegister[0x03]
-#define XMAP0_POPUPCMAP m_XMAP0.nRegister[0x04]
-#define XMAP0_MODETBLIDX m_XMAP0.nRegister[0x07]
-
-#define XMAP1_CONFIG m_XMAP1.nRegister[0x00]
-#define XMAP1_REVISION m_XMAP1.nRegister[0x01]
-#define XMAP1_ENTRIES m_XMAP1.nRegister[0x02]
-#define XMAP1_CURCMAP m_XMAP1.nRegister[0x03]
-#define XMAP1_POPUPCMAP m_XMAP1.nRegister[0x04]
-#define XMAP1_MODETBLIDX m_XMAP1.nRegister[0x07]
+#define LOG_UNKNOWN (1 << 0)
+#define LOG_VC2 (1 << 1)
+#define LOG_CMAP0 (1 << 2)
+#define LOG_CMAP1 (1 << 3)
+#define LOG_XMAP0 (1 << 4)
+#define LOG_XMAP1 (1 << 5)
+#define LOG_REX3 (1 << 6)
+#define LOG_COMMANDS (1 << 7)
+#define VERBOSE (0)
+#include "logmacro.h"
DEFINE_DEVICE_TYPE(NEWPORT_VIDEO, newport_video_device, "newport_video", "SGI Newport graphics board")
newport_video_device::newport_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, NEWPORT_VIDEO, tag, owner, clock)
+ , m_maincpu(*this, finder_base::DUMMY_TAG)
+ , m_ioc2(*this, finder_base::DUMMY_TAG)
{
}
@@ -98,93 +61,115 @@ void newport_video_device::device_start()
m_base = make_unique_clear<uint32_t[]>((1280+64) * (1024+64));
save_pointer(NAME(m_base), (1280+64) * (1024+64));
- save_item(NAME(m_VC2.nRegister));
- save_item(NAME(m_VC2.nRAM));
- save_item(NAME(m_VC2.nRegIdx));
- save_item(NAME(m_VC2.nRegData));
+ save_item(NAME(m_vc2.m_vid_entry));
+ save_item(NAME(m_vc2.m_cursor_entry));
+ save_item(NAME(m_vc2.m_cursor_x));
+ save_item(NAME(m_vc2.m_cursor_y));
+ save_item(NAME(m_vc2.m_cur_cursor_x));
+ save_item(NAME(m_vc2.m_did_entry));
+ save_item(NAME(m_vc2.m_scanline_len));
+ save_item(NAME(m_vc2.m_ram_addr));
+ save_item(NAME(m_vc2.m_vt_frame_ptr));
+ save_item(NAME(m_vc2.m_vt_line_ptr));
+ save_item(NAME(m_vc2.m_vt_line_run));
+ save_item(NAME(m_vc2.m_vt_line_count));
+ save_item(NAME(m_vc2.m_cursor_table_ptr));
+ save_item(NAME(m_vc2.m_work_cursor_y));
+ save_item(NAME(m_vc2.m_did_frame_ptr));
+ save_item(NAME(m_vc2.m_did_line_ptr));
+ save_item(NAME(m_vc2.m_display_ctrl));
+ save_item(NAME(m_vc2.m_config));
+ save_item(NAME(m_vc2.m_ram));
+ save_item(NAME(m_vc2.m_reg_idx));
+ save_item(NAME(m_vc2.m_reg_data));
- save_item(NAME(m_XMAP0.nRegister));
- save_item(NAME(m_XMAP0.nModeTable));
- save_item(NAME(m_XMAP1.nRegister));
- save_item(NAME(m_XMAP1.nModeTable));
+ save_item(NAME(m_xmap0.m_config));
+ save_item(NAME(m_xmap0.m_revision));
+ save_item(NAME(m_xmap0.m_entries));
+ save_item(NAME(m_xmap0.m_cursor_cmap));
+ save_item(NAME(m_xmap0.m_popup_cmap));
+ save_item(NAME(m_xmap0.m_mode_table_idx));
+ save_item(NAME(m_xmap0.m_mode_table));
+ save_item(NAME(m_xmap1.m_config));
+ save_item(NAME(m_xmap1.m_revision));
+ save_item(NAME(m_xmap1.m_entries));
+ save_item(NAME(m_xmap1.m_cursor_cmap));
+ save_item(NAME(m_xmap1.m_popup_cmap));
+ save_item(NAME(m_xmap1.m_mode_table_idx));
+ save_item(NAME(m_xmap1.m_mode_table));
- save_item(NAME(m_REX3.nDrawMode1));
- save_item(NAME(m_REX3.nDrawMode0));
- save_item(NAME(m_REX3.nLSMode));
- save_item(NAME(m_REX3.nLSPattern));
- save_item(NAME(m_REX3.nLSPatSave));
- save_item(NAME(m_REX3.nZPattern));
- save_item(NAME(m_REX3.nColorBack));
- save_item(NAME(m_REX3.nColorVRAM));
- save_item(NAME(m_REX3.nAlphaRef));
- save_item(NAME(m_REX3.nSMask0X));
- save_item(NAME(m_REX3.nSMask0Y));
- save_item(NAME(m_REX3.nSetup));
- save_item(NAME(m_REX3.nStepZ));
- save_item(NAME(m_REX3.nXStart));
- save_item(NAME(m_REX3.nYStart));
- save_item(NAME(m_REX3.nXEnd));
- save_item(NAME(m_REX3.nYEnd));
+ save_item(NAME(m_rex3.m_draw_mode1));
+ save_item(NAME(m_rex3.m_draw_mode0));
+ save_item(NAME(m_rex3.m_ls_mode));
+ save_item(NAME(m_rex3.m_ls_pattern));
+ save_item(NAME(m_rex3.m_ls_pattern_saved));
+ save_item(NAME(m_rex3.m_z_pattern));
+ save_item(NAME(m_rex3.m_color_back));
+ save_item(NAME(m_rex3.m_color_vram));
+ save_item(NAME(m_rex3.m_alpha_ref));
+ save_item(NAME(m_rex3.m_smask0_x));
+ save_item(NAME(m_rex3.m_smask0_y));
+ save_item(NAME(m_rex3.m_setup));
+ save_item(NAME(m_rex3.m_step_z));
+ save_item(NAME(m_rex3.m_x_start));
+ save_item(NAME(m_rex3.m_y_start));
+ save_item(NAME(m_rex3.m_x_end));
+ save_item(NAME(m_rex3.m_y_end));
- save_item(NAME(m_REX3.nXSave));
- save_item(NAME(m_REX3.nXYMove));
- save_item(NAME(m_REX3.nBresD));
- save_item(NAME(m_REX3.nBresS1));
- save_item(NAME(m_REX3.nBresOctInc1));
- save_item(NAME(m_REX3.nBresRndInc2));
- save_item(NAME(m_REX3.nBresE1));
- save_item(NAME(m_REX3.nBresS2));
- save_item(NAME(m_REX3.nAWeight0));
- save_item(NAME(m_REX3.nAWeight1));
- save_item(NAME(m_REX3.nXStartF));
- save_item(NAME(m_REX3.nYStartF));
- save_item(NAME(m_REX3.nXEndF));
- save_item(NAME(m_REX3.nYEndF));
- save_item(NAME(m_REX3.nXStartI));
- save_item(NAME(m_REX3.nXYStartI));
- save_item(NAME(m_REX3.nXYEndI));
- save_item(NAME(m_REX3.nXStartEndI));
- save_item(NAME(m_REX3.nColorRed));
- save_item(NAME(m_REX3.nColorAlpha));
- save_item(NAME(m_REX3.nColorGreen));
- save_item(NAME(m_REX3.nColorBlue));
- save_item(NAME(m_REX3.nSlopeRed));
- save_item(NAME(m_REX3.nSlopeAlpha));
- save_item(NAME(m_REX3.nSlopeGreen));
- save_item(NAME(m_REX3.nSlopeBlue));
- save_item(NAME(m_REX3.nWriteMask));
- save_item(NAME(m_REX3.nZeroFract));
- save_item(NAME(m_REX3.nZeroOverflow));
- save_item(NAME(m_REX3.nHostDataPortMSW));
- save_item(NAME(m_REX3.nHostDataPortLSW));
- save_item(NAME(m_REX3.nDCBMode));
- save_item(NAME(m_REX3.nDCBRegSelect));
- save_item(NAME(m_REX3.nDCBSlvSelect));
- save_item(NAME(m_REX3.nDCBDataMSW));
- save_item(NAME(m_REX3.nDCBDataLSW));
- save_item(NAME(m_REX3.nSMask1X));
- save_item(NAME(m_REX3.nSMask1Y));
- save_item(NAME(m_REX3.nSMask2X));
- save_item(NAME(m_REX3.nSMask2Y));
- save_item(NAME(m_REX3.nSMask3X));
- save_item(NAME(m_REX3.nSMask3Y));
- save_item(NAME(m_REX3.nSMask4X));
- save_item(NAME(m_REX3.nSMask4Y));
- save_item(NAME(m_REX3.nTopScanline));
- save_item(NAME(m_REX3.nXYWin));
- save_item(NAME(m_REX3.nClipMode));
- save_item(NAME(m_REX3.nConfig));
- save_item(NAME(m_REX3.nStatus));
- save_item(NAME(m_REX3.nXFerWidth));
-#if 0
- save_item(NAME(m_REX3.nCurrentX));
- save_item(NAME(m_REX3.nCurrentY));
-#endif
- save_item(NAME(m_REX3.nKludge_SkipLine));
+ save_item(NAME(m_rex3.m_x_save));
+ save_item(NAME(m_rex3.m_xy_move));
+ save_item(NAME(m_rex3.m_bres_d));
+ save_item(NAME(m_rex3.m_bres_s1));
+ save_item(NAME(m_rex3.m_bres_octant_inc1));
+ save_item(NAME(m_rex3.m_bres_round_inc2));
+ save_item(NAME(m_rex3.m_bres_e1));
+ save_item(NAME(m_rex3.m_bres_s2));
+ save_item(NAME(m_rex3.m_a_weight0));
+ save_item(NAME(m_rex3.m_a_weight1));
+ save_item(NAME(m_rex3.m_x_start_f));
+ save_item(NAME(m_rex3.m_y_start_f));
+ save_item(NAME(m_rex3.m_x_end_f));
+ save_item(NAME(m_rex3.m_y_end_f));
+ save_item(NAME(m_rex3.m_x_start_i));
+ save_item(NAME(m_rex3.m_xy_start_i));
+ save_item(NAME(m_rex3.m_xy_end_i));
+ save_item(NAME(m_rex3.m_x_start_end_i));
+ save_item(NAME(m_rex3.m_color_red));
+ save_item(NAME(m_rex3.m_color_alpha));
+ save_item(NAME(m_rex3.m_color_green));
+ save_item(NAME(m_rex3.m_color_blue));
+ save_item(NAME(m_rex3.m_slope_red));
+ save_item(NAME(m_rex3.m_slope_alpha));
+ save_item(NAME(m_rex3.m_slope_green));
+ save_item(NAME(m_rex3.m_slope_blue));
+ save_item(NAME(m_rex3.m_write_mask));
+ save_item(NAME(m_rex3.m_zero_fract));
+ save_item(NAME(m_rex3.m_zero_overflow));
+ save_item(NAME(m_rex3.m_host_dataport_msw));
+ save_item(NAME(m_rex3.m_host_dataport_lsw));
+ save_item(NAME(m_rex3.m_dcb_mode));
+ save_item(NAME(m_rex3.m_dcb_reg_select));
+ save_item(NAME(m_rex3.m_dcb_slave_select));
+ save_item(NAME(m_rex3.m_dcb_data_msw));
+ save_item(NAME(m_rex3.m_dcb_data_lsw));
+ save_item(NAME(m_rex3.m_s_mask1_x));
+ save_item(NAME(m_rex3.m_s_mask1_y));
+ save_item(NAME(m_rex3.m_s_mask2_x));
+ save_item(NAME(m_rex3.m_s_mask2_y));
+ save_item(NAME(m_rex3.m_s_mask3_x));
+ save_item(NAME(m_rex3.m_s_mask3_y));
+ save_item(NAME(m_rex3.m_s_mask4_x));
+ save_item(NAME(m_rex3.m_s_mask4_y));
+ save_item(NAME(m_rex3.m_top_scanline));
+ save_item(NAME(m_rex3.m_xy_window));
+ save_item(NAME(m_rex3.m_clip_mode));
+ save_item(NAME(m_rex3.m_config));
+ save_item(NAME(m_rex3.m_status));
+ save_item(NAME(m_rex3.m_xfer_width));
+ save_item(NAME(m_rex3.m_skipline_kludge));
- save_item(NAME(m_nDrawGreen));
- save_item(NAME(m_CMAP0.nPaletteIndex));
- save_item(NAME(m_CMAP0.nPalette));
+ save_item(NAME(m_cmap0.m_palette_idx));
+ save_item(NAME(m_cmap0.m_palette));
}
//-------------------------------------------------
@@ -193,11 +178,19 @@ void newport_video_device::device_start()
void newport_video_device::device_reset()
{
- m_nDrawGreen = 0;
- m_REX3.nDrawMode0 = 0x00000000;
- m_REX3.nDrawMode1 = 0x3002f001;
- m_REX3.nDCBMode = 0x00000780;
- m_REX3.nKludge_SkipLine = 0;
+ memset(&m_vc2, 0, sizeof(vc2_t));
+ memset(&m_xmap0, 0, sizeof(xmap_t));
+ memset(&m_xmap1, 0, sizeof(xmap_t));
+ memset(&m_rex3, 0, sizeof(rex3_t));
+ memset(&m_cmap0, 0, sizeof(cmap_t));
+
+ m_rex3.m_draw_mode0 = 0x00000000;
+ m_rex3.m_draw_mode1 = 0x3002f001;
+ m_rex3.m_dcb_mode = 0x00000780;
+ m_rex3.m_skipline_kludge = 0;
+
+ m_xmap0.m_entries = 0x2;
+ m_xmap1.m_entries = 0x2;
}
uint32_t newport_video_device::get_cursor_pixel(int x, int y)
@@ -205,7 +198,7 @@ uint32_t newport_video_device::get_cursor_pixel(int x, int y)
if (x < 0 || y < 0)
return 0;
- bool monochrome_cursor = BIT(VC2_DISPLAYCTRL, DCR_CURSOR_SIZE_BIT) == DCR_CURSOR_SIZE_64;
+ bool monochrome_cursor = BIT(m_vc2.m_display_ctrl, DCR_CURSOR_SIZE_BIT) == DCR_CURSOR_SIZE_64;
int size = monochrome_cursor ? 64 : 32;
if (x >= size || y >= size)
@@ -216,25 +209,25 @@ uint32_t newport_video_device::get_cursor_pixel(int x, int y)
if (monochrome_cursor)
{
const int address = y * 4 + (x / 16);
- const uint16_t word = m_VC2.nRAM[VC2_CURENTRY + address];
+ const uint16_t word = m_vc2.m_ram[m_vc2.m_cursor_entry + address];
const uint16_t entry = BIT(word, shift);
- return m_CMAP0.nPalette[entry];
+ return m_cmap0.m_palette[entry];
}
else
{
const int address = y * 2 + (x / 16);
- const uint16_t word0 = m_VC2.nRAM[VC2_CURENTRY + address];
- const uint16_t word1 = m_VC2.nRAM[VC2_CURENTRY + address + 64];
+ const uint16_t word0 = m_vc2.m_ram[m_vc2.m_cursor_entry + address];
+ const uint16_t word1 = m_vc2.m_ram[m_vc2.m_cursor_entry + address + 64];
const uint16_t entry = BIT(word0, shift) | (BIT(word1, shift) << 1);
- return m_CMAP0.nPalette[entry];
+ return m_cmap0.m_palette[entry];
}
}
uint32_t newport_video_device::screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect)
{
- bool enable_cursor = BIT(VC2_DISPLAYCTRL, DCR_CURSOR_FUNC_ENABLE_BIT) != 0
- && BIT(VC2_DISPLAYCTRL, DCR_CURSOR_ENABLE_BIT) != 0
- && BIT(VC2_DISPLAYCTRL, DCR_CURSOR_MODE_BIT) == DCR_CURSOR_MODE_GLYPH;
+ bool enable_cursor = BIT(m_vc2.m_display_ctrl, DCR_CURSOR_FUNC_ENABLE_BIT) != 0
+ && BIT(m_vc2.m_display_ctrl, DCR_CURSOR_ENABLE_BIT) != 0
+ && BIT(m_vc2.m_display_ctrl, DCR_CURSOR_MODE_BIT) == DCR_CURSOR_MODE_GLYPH;
/* loop over rows and copy to the destination */
for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
@@ -245,11 +238,11 @@ uint32_t newport_video_device::screen_update(screen_device &device, bitmap_rgb32
/* loop over columns */
for (int x = cliprect.min_x; x < cliprect.max_x; x++)
{
- uint32_t ram_pixel = (*src) & 0x00f8f8f8;
+ uint32_t ram_pixel = (*src) & 0xf8f8f8;
uint32_t cursor_pixel = 0;
- if (x >= (VC2_CURSORX - 31) && x <= VC2_CURSORX && y >= (VC2_CURSORY - 31) && y <= VC2_CURSORY && enable_cursor)
+ if (x >= (m_vc2.m_cursor_x - 31) && x <= m_vc2.m_cursor_x && y >= (m_vc2.m_cursor_y - 31) && y <= m_vc2.m_cursor_y && enable_cursor)
{
- cursor_pixel = get_cursor_pixel(x - ((int)VC2_CURSORX - 31), y - ((int)VC2_CURSORY - 31));
+ cursor_pixel = get_cursor_pixel(x - ((int)m_vc2.m_cursor_x - 31), y - ((int)m_vc2.m_cursor_y - 31));
}
*dest++ = cursor_pixel ? cursor_pixel : ram_pixel;
src++;
@@ -259,584 +252,632 @@ uint32_t newport_video_device::screen_update(screen_device &device, bitmap_rgb32
}
-WRITE32_MEMBER( newport_video_device::cmap0_w )
+WRITE32_MEMBER(newport_video_device::cmap0_w)
{
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0x00:
- //verboselog(machine(), 2, "CMAP0 Palette Index Write: %04x\n", data & 0x0000ffff );
- m_CMAP0.nPaletteIndex = data & 0x0000ffff;
+ LOGMASKED(LOG_CMAP0, "CMAP0 Palette Index Write: %04x\n", data & 0xffff);
+ m_cmap0.m_palette_idx = (uint16_t)data;
break;
case 0x02:
- //verboselog(machine(), 2, "CMAP0 Palette Entry %04x Write: %08x\n", m_CMAP0.nPaletteIndex, ( data >> 8 ) & 0x00ffffff );
- m_CMAP0.nPalette[m_CMAP0.nPaletteIndex] = ( data >> 8 ) & 0x00ffffff;
+ m_cmap0.m_palette[m_cmap0.m_palette_idx] = data >> 8;
+ LOGMASKED(LOG_CMAP0, "CMAP0 Palette Entry %04x Write: %08x\n", m_cmap0.m_palette_idx, data >> 8);
break;
default:
- //verboselog(machine(), 2, "Unknown CMAP0 Register %d Write: %08x\n", m_REX3.nDCBRegSelect, data );
+ LOGMASKED(LOG_CMAP0 | LOG_UNKNOWN, "Unknown CMAP0 Register %d Write: %08x\n", m_rex3.m_dcb_reg_select, data);
break;
}
}
-READ32_MEMBER( newport_video_device::cmap0_r )
+READ32_MEMBER(newport_video_device::cmap0_r)
{
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0x04:
- //verboselog(machine(), 2, "CMAP0 Status Read: %08x\n", 0x00000008 );
- return 0x00000008;
+ LOGMASKED(LOG_CMAP0, "CMAP0 Status Read: %08x\n", 0x8);
+ return 0x8;
case 0x06: /* Revision */
- //verboselog(machine(), 2, "CMAP0 Revision Read: CMAP Rev 1, Board Rev 2, 8bpp\n" );
- return 0x000000a1;
+ LOGMASKED(LOG_CMAP0, "CMAP0 Revision Read: CMAP Rev 1, Board Rev 2, 8bpp (000000a1)\n");
+ return 0xa1;
default:
- //verboselog(machine(), 2, "Unknown CMAP0 Register %d Read\n", m_REX3.nDCBRegSelect );
- return 0x00000000;
+ LOGMASKED(LOG_CMAP0 | LOG_UNKNOWN, "Unknown CMAP0 Register %d Read\n", m_rex3.m_dcb_reg_select);
+ return 0;
}
}
-READ32_MEMBER( newport_video_device::cmap1_r )
+READ32_MEMBER(newport_video_device::cmap1_r)
{
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0x04:
- //verboselog(machine(), 2, "CMAP1 Status Read: %08x\n", 0x00000008 );
- return 0x00000008;
+ LOGMASKED(LOG_CMAP1, "CMAP1 Status Read: %08x\n", 0x8);
+ return 0x8;
case 0x06: /* Revision */
- //verboselog(machine(), 2, "CMAP1 Revision Read: CMAP Rev 1, Board Rev 2, 8bpp\n" );
- return 0x000000a1;
+ LOGMASKED(LOG_CMAP1, "CMAP1 Revision Read: CMAP Rev 1, Board Rev 2, 8bpp (000000a1)\n");
+ return 0xa1;
default:
- //verboselog(machine(), 2, "Unknown CMAP0 Register %d Read\n", m_REX3.nDCBRegSelect );
- return 0x00000000;
+ LOGMASKED(LOG_CMAP1 | LOG_UNKNOWN, "Unknown CMAP0 Register %d Read\n", m_rex3.m_dcb_reg_select);
+ return 0;
}
}
-READ32_MEMBER( newport_video_device::xmap0_r )
+READ32_MEMBER(newport_video_device::xmap0_r)
{
- uint8_t nModeIdx;
-
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0:
- //verboselog(machine(), 2, "XMAP0 Config Read: %08x\n", XMAP0_CONFIG );
- return XMAP0_CONFIG;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Config Read: %08x\n", m_xmap0.m_config);
+ return m_xmap0.m_config;
case 1:
- //verboselog(machine(), 2, "XMAP0 Revision Read: %08x\n", 0x00 );
- return 0x00000000;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Revision Read: %08x\n", 0);
+ return m_xmap0.m_revision;
case 2:
- //verboselog(machine(), 2, "XMAP0 FIFO Availability Read: %08x\n", 0x02 );
- return 0x00000002;
+ LOGMASKED(LOG_XMAP0, "XMAP0 FIFO Availability Read: %08x\n", 0x2);
+ return 0x2;
case 3:
- //verboselog(machine(), 2, "XMAP0 Cursor CMAP MSB Read: %08x\n", XMAP0_CURCMAP );
- return XMAP0_CURCMAP;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Cursor CMAP MSB Read: %08x\n", m_xmap0.m_cursor_cmap);
+ return m_xmap0.m_cursor_cmap;
case 4:
- //verboselog(machine(), 2, "XMAP0 Pop Up CMAP MSB Read: %08x\n", XMAP0_POPUPCMAP );
- return XMAP0_POPUPCMAP;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Pop Up CMAP MSB Read: %08x\n", m_xmap0.m_popup_cmap);
+ return m_xmap0.m_popup_cmap;
case 5:
- nModeIdx = ( XMAP0_MODETBLIDX & 0x0000007c ) >> 2;
- switch (XMAP0_MODETBLIDX & 0x00000003)
+ {
+ uint8_t mode_idx = (m_xmap0.m_mode_table_idx & 0x7c) >> 2;
+ switch (m_xmap0.m_mode_table_idx & 3)
{
case 0:
- //verboselog(machine(), 2, "XMAP0 Mode Register Read: %02x (Byte 0): %08x\n", nModeIdx, ( m_XMAP0.nModeTable[ nModeIdx ] & 0x00ff0000 ) >> 16 );
- return ( m_XMAP0.nModeTable[ nModeIdx ] & 0x00ff0000 ) >> 16;
+ {
+ uint8_t ret = (uint8_t)(m_xmap0.m_mode_table[mode_idx] >> 16);
+ LOGMASKED(LOG_XMAP0, "XMAP0 Mode Register Read: %02x (Byte 0): %08x\n", mode_idx, ret);
+ return ret;
+ }
case 1:
- //verboselog(machine(), 2, "XMAP0 Mode Register Read: %02x (Byte 1): %08x\n", nModeIdx, ( m_XMAP0.nModeTable[ nModeIdx ] & 0x0000ff00 ) >> 8 );
- return ( m_XMAP0.nModeTable[ nModeIdx ] & 0x0000ff00 ) >> 8;
+ {
+ uint8_t ret = (uint8_t)(m_xmap0.m_mode_table[mode_idx] >> 8);
+ LOGMASKED(LOG_XMAP0, "XMAP0 Mode Register Read: %02x (Byte 1): %08x\n", mode_idx, ret);
+ return ret;
+ }
case 2:
- //verboselog(machine(), 2, "XMAP0 Mode Register Read: %02x (Byte 2): %08x\n", nModeIdx, ( m_XMAP0.nModeTable[ nModeIdx ] & 0x000000ff ) );
- return ( m_XMAP0.nModeTable[ nModeIdx ] & 0x000000ff );
+ {
+ uint8_t ret = (uint8_t)m_xmap0.m_mode_table[mode_idx];
+ LOGMASKED(LOG_XMAP0, "XMAP0 Mode Register Read: %02x (Byte 2): %08x\n", mode_idx, ret);
+ return ret;
+ }
}
break;
+ }
case 6:
- //verboselog(machine(), 2, "XMAP0 Unused Read: %08x\n", 0x00000000 );
- return 0x00000000;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Unused Read: %08x\n", 0);
+ return 0;
case 7:
- //verboselog(machine(), 2, "XMAP0 Mode Table Address Read: %08x\n", XMAP0_MODETBLIDX );
- return XMAP0_MODETBLIDX;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Mode Table Address Read: %08x\n", m_xmap0.m_mode_table_idx);
+ return m_xmap0.m_mode_table_idx;
+ default:
+ LOGMASKED(LOG_XMAP0 | LOG_UNKNOWN, "XMAP0 Unknown DCB Register Select Value: %02x, returning 0\n", m_rex3.m_dcb_reg_select);
+ return 0;
}
-
- //verboselog(machine(), 2, "XMAP0 Unknown m_REX3.nDCBRegSelect Value: %02x, returning 0\n", m_REX3.nDCBRegSelect );
- return 0x00000000;
+ return 0;
}
-WRITE32_MEMBER( newport_video_device::xmap0_w )
+WRITE32_MEMBER(newport_video_device::xmap0_w)
{
- uint8_t n8BitVal = data & 0x000000ff;
-
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0:
- //verboselog(machine(), 2, "XMAP0 Config Write: %02x\n", n8BitVal );
- XMAP0_CONFIG = n8BitVal;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Config Write: %02x\n", (uint8_t)data);
+ m_xmap0.m_config = (uint8_t)data;
break;
case 1:
- //verboselog(machine(), 2, "XMAP0 Revision Write (Ignored): %02x\n", n8BitVal );
+ LOGMASKED(LOG_XMAP0, "XMAP0 Revision Write (Ignored): %02x\n", (uint8_t)data);
break;
case 2:
- //verboselog(machine(), 2, "XMAP0 FIFO Availability Write (Ignored): %02x\n", n8BitVal );
+ LOGMASKED(LOG_XMAP0, "XMAP0 FIFO Availability Write (Ignored): %02x\n", (uint8_t)data);
break;
case 3:
- //verboselog(machine(), 2, "XMAP0 Cursor CMAP MSB Write: %02x\n", n8BitVal );
- XMAP0_CURCMAP = n8BitVal;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Cursor CMAP MSB Write: %02x\n", (uint8_t)data);
+ m_xmap0.m_cursor_cmap = (uint8_t)data;
break;
case 4:
- //verboselog(machine(), 2, "XMAP0 Pop Up CMAP MSB Write: %02x\n", n8BitVal );
- XMAP0_POPUPCMAP = n8BitVal;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Pop Up CMAP MSB Write: %02x\n", (uint8_t)data);
+ m_xmap0.m_popup_cmap = (uint8_t)data;
break;
case 5:
- //verboselog(machine(), 2, "XMAP0 Mode Register Write: %02x = %06x\n", ( data & 0xff000000 ) >> 24, data & 0x00ffffff );
- m_XMAP0.nModeTable[ ( data & 0xff000000 ) >> 24 ] = data & 0x00ffffff;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Mode Register Write: %02x = %06x\n", data >> 24, data & 0xffffff);
+ m_xmap0.m_mode_table[data >> 24] = data & 0xffffff;
break;
case 6:
- //verboselog(machine(), 2, "XMAP0 Unused Write (Ignored): %08x\n", data );
+ LOGMASKED(LOG_XMAP0, "XMAP0 Unused Write (Ignored): %08x\n", data);
break;
case 7:
- //verboselog(machine(), 2, "XMAP0 Mode Table Address Write: %02x\n", n8BitVal );
- XMAP0_MODETBLIDX = n8BitVal;
+ LOGMASKED(LOG_XMAP0, "XMAP0 Mode Table Address Write: %02x\n", (uint8_t)data);
+ m_xmap0.m_mode_table_idx = (uint8_t)data;
+ break;
+ default:
+ LOGMASKED(LOG_XMAP0 | LOG_UNKNOWN, "XMAP0 Unknown DCB Register Select Value: %02x = %08x\n", m_rex3.m_dcb_reg_select, data);
break;
}
}
-READ32_MEMBER( newport_video_device::xmap1_r )
+READ32_MEMBER(newport_video_device::xmap1_r)
{
- uint8_t nModeIdx;
-
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0:
- //verboselog(machine(), 2, "XMAP1 Config Read: %08x\n", XMAP1_CONFIG );
- return XMAP1_CONFIG;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Config Read: %08x\n", m_xmap1.m_config);
+ return m_xmap1.m_config;
case 1:
- //verboselog(machine(), 2, "XMAP1 Revision Read: %08x\n", 0x00 );
- return 0x00000000;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Revision Read: %08x\n", 0);
+ return m_xmap1.m_revision;
case 2:
- //verboselog(machine(), 2, "XMAP1 FIFO Availability Read: %08x\n", 0x02 );
- return 0x00000002;
+ LOGMASKED(LOG_XMAP1, "XMAP1 FIFO Availability Read: %08x\n", 0x02);
+ return 0x2;
case 3:
- //verboselog(machine(), 2, "XMAP1 Cursor CMAP MSB Read: %08x\n", XMAP1_CURCMAP );
- return XMAP1_CURCMAP;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Cursor CMAP MSB Read: %08x\n", m_xmap1.m_cursor_cmap);
+ return m_xmap1.m_cursor_cmap;
case 4:
- //verboselog(machine(), 2, "XMAP1 Pop Up CMAP MSB Read: %08x\n", XMAP1_POPUPCMAP );
- return XMAP1_POPUPCMAP;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Pop Up CMAP MSB Read: %08x\n", m_xmap1.m_popup_cmap);
+ return m_xmap1.m_popup_cmap;
case 5:
- nModeIdx = ( XMAP1_MODETBLIDX & 0x0000007c ) >> 2;
- switch (XMAP1_MODETBLIDX & 0x00000003)
+ {
+ const uint8_t mode_idx = (m_xmap1.m_mode_table_idx & 0x7c) >> 2;
+ switch (m_xmap1.m_mode_table_idx & 3)
{
case 0:
- //verboselog(machine(), 2, "XMAP1 Mode Register Read: %02x (Byte 0): %08x\n", nModeIdx, ( m_XMAP1.nModeTable[ nModeIdx ] & 0x00ff0000 ) >> 16 );
- return ( m_XMAP1.nModeTable[ nModeIdx ] & 0x00ff0000 ) >> 16;
+ {
+ uint8_t ret = (uint8_t)(m_xmap1.m_mode_table[mode_idx] >> 16);
+ LOGMASKED(LOG_XMAP1, "XMAP1 Mode Register Read: %02x (Byte 0): %08x\n", mode_idx, ret);
+ return ret;
+ }
case 1:
- //verboselog(machine(), 2, "XMAP1 Mode Register Read: %02x (Byte 1): %08x\n", nModeIdx, ( m_XMAP1.nModeTable[ nModeIdx ] & 0x0000ff00 ) >> 8 );
- return ( m_XMAP1.nModeTable[ nModeIdx ] & 0x0000ff00 ) >> 8;
+ {
+ uint8_t ret = (uint8_t)(m_xmap1.m_mode_table[mode_idx] >> 8);
+ LOGMASKED(LOG_XMAP1, "XMAP1 Mode Register Read: %02x (Byte 1): %08x\n", mode_idx, ret);
+ return ret;
+ }
case 2:
- //verboselog(machine(), 2, "XMAP1 Mode Register Read: %02x (Byte 2): %08x\n", nModeIdx, ( m_XMAP1.nModeTable[ nModeIdx ] & 0x000000ff ) );
- return ( m_XMAP1.nModeTable[ nModeIdx ] & 0x000000ff );
+ {
+ uint8_t ret = (uint8_t)m_xmap1.m_mode_table[mode_idx];
+ LOGMASKED(LOG_XMAP1, "XMAP1 Mode Register Read: %02x (Byte 2): %08x\n", mode_idx, ret);
+ return ret;
+ }
}
break;
+ }
case 6:
- //verboselog(machine(), 2, "XMAP1 Unused Read: %08x\n", 0x00000000 );
- return 0x00000000;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Unused Read: %08x\n", 0);
+ return 0;
case 7:
- //verboselog(machine(), 2, "XMAP1 Mode Table Address Read: %08x\n", XMAP0_MODETBLIDX );
- return XMAP1_MODETBLIDX;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Mode Table Address Read: %08x\n", m_xmap0.m_mode_table_idx);
+ return m_xmap1.m_mode_table_idx;
+ default:
+ LOGMASKED(LOG_XMAP1 | LOG_UNKNOWN, "XMAP1 Unknown DCB Register Select Value: %02x, returning 0\n", m_rex3.m_dcb_reg_select);
+ return 0;
}
-
- //verboselog(machine(), 2, "XMAP1 Unknown m_REX3.nDCBRegSelect Value: %02x, returning 0\n", m_REX3.nDCBRegSelect );
- return 0x00000000;
+ return 0;
}
-WRITE32_MEMBER( newport_video_device::xmap1_w )
+WRITE32_MEMBER(newport_video_device::xmap1_w)
{
- uint8_t n8BitVal = data & 0x000000ff;
-
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0:
- //verboselog(machine(), 2, "XMAP1 Config Write: %02x\n", n8BitVal );
- XMAP1_CONFIG = n8BitVal;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Config Write: %02x\n", (uint8_t)data);
+ m_xmap1.m_config = (uint8_t)data;
break;
case 1:
- //verboselog(machine(), 2, "XMAP1 Revision Write (Ignored): %02x\n", n8BitVal );
+ LOGMASKED(LOG_XMAP1, "XMAP1 Revision Write (Ignored): %02x\n", (uint8_t)data);
break;
case 2:
- //verboselog(machine(), 2, "XMAP1 FIFO Availability Write (Ignored): %02x\n", n8BitVal );
+ LOGMASKED(LOG_XMAP1, "XMAP1 FIFO Availability Write (Ignored): %02x\n", (uint8_t)data);
break;
case 3:
- //verboselog(machine(), 2, "XMAP1 Cursor CMAP MSB Write: %02x\n", n8BitVal );
- XMAP1_CURCMAP = n8BitVal;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Cursor CMAP MSB Write: %02x\n", (uint8_t)data);
+ m_xmap1.m_cursor_cmap = (uint8_t)data;
break;
case 4:
- //verboselog(machine(), 2, "XMAP1 Pop Up CMAP MSB Write: %02x\n", n8BitVal );
- XMAP1_POPUPCMAP = n8BitVal;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Pop Up CMAP MSB Write: %02x\n", (uint8_t)data);
+ m_xmap1.m_popup_cmap = (uint8_t)data;
break;
case 5:
- //verboselog(machine(), 2, "XMAP1 Mode Register Write: %02x = %06x\n", ( data & 0xff000000 ) >> 24, data & 0x00ffffff );
- m_XMAP1.nModeTable[ ( data & 0xff000000 ) >> 24 ] = data & 0x00ffffff;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Mode Register Write: %02x = %06x\n", data >> 24, data & 0xffffff);
+ m_xmap1.m_mode_table[data >> 24] = data & 0xffffff;
break;
case 6:
- //verboselog(machine(), 2, "XMAP1 Unused Write (Ignored): %08x\n", data );
+ LOGMASKED(LOG_XMAP1, "XMAP1 Unused Write (Ignored): %08x\n", data);
break;
case 7:
- //verboselog(machine(), 2, "XMAP1 Mode Table Address Write: %02x\n", n8BitVal );
- XMAP1_MODETBLIDX = n8BitVal;
+ LOGMASKED(LOG_XMAP1, "XMAP1 Mode Table Address Write: %02x\n", (uint8_t)data);
+ m_xmap1.m_mode_table_idx = (uint8_t)data;
+ break;
+ default:
+ LOGMASKED(LOG_XMAP0 | LOG_UNKNOWN, "XMAP0 Unknown DCB Register Select Value: %02x = %08x\n", m_rex3.m_dcb_reg_select, data);
break;
}
}
-READ32_MEMBER( newport_video_device::vc2_r )
+READ32_MEMBER(newport_video_device::vc2_r)
{
- uint16_t ret16;
-
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0x01: /* Register Read */
- //verboselog(machine(), 2, "VC2 Register Read: %02x, %08x\n", m_VC2.nRegIdx, m_VC2.nRegister[m_VC2.nRegIdx] );
- return m_VC2.nRegister[m_VC2.nRegIdx];
+ switch (m_vc2.m_reg_idx)
+ {
+ case 0x00:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Video Entry Pointer, %08x\n", m_vc2.m_vid_entry);
+ return m_vc2.m_vid_entry;
+ case 0x01:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Cursor Entry Pointer, %08x\n", m_vc2.m_cursor_entry);
+ return m_vc2.m_cursor_entry;
+ case 0x02:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Cursor X, %08x\n", m_vc2.m_cursor_x);
+ return m_vc2.m_cursor_x;
+ case 0x03:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Cursor Y, %08x\n", m_vc2.m_cursor_y);
+ return m_vc2.m_cursor_y;
+ case 0x04:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Current Cursor X, %08x\n", m_vc2.m_cur_cursor_x);
+ return m_vc2.m_cur_cursor_x;
+ case 0x05:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: DID Entry, %08x\n", m_vc2.m_did_entry);
+ return m_vc2.m_did_entry;
+ case 0x06:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Scanline Length, %08x\n", m_vc2.m_scanline_len);
+ return m_vc2.m_scanline_len;
+ case 0x07:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: RAM Address, %08x\n", m_vc2.m_ram_addr);
+ return m_vc2.m_ram_addr;
+ case 0x08:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: VT Frame Pointer, %08x\n", m_vc2.m_vt_frame_ptr);
+ return m_vc2.m_vt_frame_ptr;
+ case 0x09:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: VT Line Sequence Pointer, %08x\n", m_vc2.m_vt_line_ptr);
+ return m_vc2.m_vt_line_ptr;
+ case 0x0a:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: VT Lines in Run, %08x\n", m_vc2.m_vt_line_run);
+ return m_vc2.m_vt_line_run;
+ case 0x0b:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Vertical Line Count, %08x\n", m_vc2.m_vt_line_count);
+ return m_vc2.m_vt_line_count;
+ case 0x0c:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Cursor Table Pointer, %08x\n", m_vc2.m_cursor_table_ptr);
+ return m_vc2.m_cursor_table_ptr;
+ case 0x0d:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Working Cursor Y, %08x\n", m_vc2.m_work_cursor_y);
+ return m_vc2.m_work_cursor_y;
+ case 0x0e:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: DID Frame Pointer, %08x\n", m_vc2.m_did_frame_ptr);
+ return m_vc2.m_did_frame_ptr;
+ case 0x0f:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: DID Line Pointer, %08x\n", m_vc2.m_did_line_ptr);
+ return m_vc2.m_did_line_ptr;
+ case 0x10:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Display Control, %08x\n", m_vc2.m_display_ctrl);
+ return m_vc2.m_display_ctrl;
+ case 0x1f:
+ LOGMASKED(LOG_VC2, "VC2 Register Read: Configuration, %08x\n", m_vc2.m_config);
+ return m_vc2.m_config;
+ default:
+ return 0;
+ }
+ break;
case 0x03: /* RAM Read */
- //verboselog(machine(), 2, "VC2 RAM Read: %04x = %08x\n", VC2_RAMADDR, m_VC2.nRAM[VC2_RAMADDR] );
- ret16 = m_VC2.nRAM[VC2_RAMADDR];
- VC2_RAMADDR++;
- if( VC2_RAMADDR == 0x8000 )
+ {
+ LOGMASKED(LOG_VC2, "VC2 RAM Read: %04x = %08x\n", m_vc2.m_ram_addr, m_vc2.m_ram[m_vc2.m_ram_addr]);
+ uint16_t ret = m_vc2.m_ram[m_vc2.m_ram_addr];
+ m_vc2.m_ram_addr++;
+ if (m_vc2.m_ram_addr == 0x8000)
{
- VC2_RAMADDR = 0x0000;
+ m_vc2.m_ram_addr = 0x0000;
}
- return ret16;
+ return ret;
+ }
default:
- //verboselog(machine(), 2, "Unknown VC2 Register Read: %02x\n", m_REX3.nDCBRegSelect );
+ LOGMASKED(LOG_VC2 | LOG_UNKNOWN, "Unknown VC2 Register Read: %02x\n", m_rex3.m_dcb_reg_select);
return 0;
}
}
-WRITE32_MEMBER( newport_video_device::vc2_w )
+WRITE32_MEMBER(newport_video_device::vc2_w)
{
- switch (m_REX3.nXFerWidth)
+ switch (m_rex3.m_xfer_width)
{
case 0x01: /* Register Select */
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0x00:
- m_VC2.nRegIdx = ( data & 0x000000ff ) >> 0;
- //verboselog(machine(), 2, "VC2 Register Select: %02x\n", m_VC2.nRegIdx );
+ m_vc2.m_reg_idx = (uint8_t)data;
+ LOGMASKED(LOG_VC2, "VC2 Register Select: %02x\n", m_vc2.m_reg_idx);
break;
default:
- //verboselog(machine(), 2, "Unknown VC2 Register Select: DCB Register %02x, data = 0x%08x\n", m_REX3.nDCBRegSelect, data );
+ LOGMASKED(LOG_VC2 | LOG_UNKNOWN, "Unknown VC2 Register Select: DCB Register %02x, data = %08x\n", m_rex3.m_dcb_reg_select, data);
break;
}
break;
case 0x02: /* RAM Write */
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0x03:
- //verboselog(machine(), 2, "VC2 RAM Write: %04x = %08x\n", VC2_RAMADDR, data & 0x0000ffff );
- m_VC2.nRAM[VC2_RAMADDR] = data & 0x0000ffff;
- VC2_RAMADDR++;
- if( VC2_RAMADDR == 0x8000 )
+ LOGMASKED(LOG_VC2, "VC2 RAM Write: %04x = %08x\n", m_vc2.m_ram_addr, (uint16_t)data);
+ m_vc2.m_ram[m_vc2.m_ram_addr] = (uint16_t)data;
+ m_vc2.m_ram_addr++;
+ if (m_vc2.m_ram_addr >= 0x8000)
{
- VC2_RAMADDR = 0x0000;
+ m_vc2.m_ram_addr = 0x0000;
}
break;
default:
- //verboselog(machine(), 2, "Unknown 2-byte Write: DCB Register %02x, data = 0x%08x\n", m_REX3.nDCBRegSelect, data );
+ LOGMASKED(LOG_VC2 | LOG_UNKNOWN, "Unknown Word Write: DCB Register %02x, data = %08x\n", m_rex3.m_dcb_reg_select, data);
break;
}
break;
case 0x03: /* Register Write */
- switch (m_REX3.nDCBRegSelect)
+ switch (m_rex3.m_dcb_reg_select)
{
case 0x00:
- //verboselog(machine(), 2, "VC2 Register Setup:\n" );
- m_VC2.nRegIdx = ( data & 0xff000000 ) >> 24;
- m_VC2.nRegData = ( data & 0x00ffff00 ) >> 8;
- switch( m_VC2.nRegIdx )
+ LOGMASKED(LOG_VC2, "VC2 Register Setup:\n");
+ m_vc2.m_reg_idx = data >> 24;
+ m_vc2.m_reg_data = (uint16_t)(data >> 8);
+ switch (m_vc2.m_reg_idx)
{
case 0x00:
- //verboselog(machine(), 2, " Video Entry Pointer: %04x\n", m_VC2.nRegData );
+ m_vc2.m_vid_entry = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Video Entry Pointer, %04x\n", m_vc2.m_vid_entry);
break;
case 0x01:
- //verboselog(machine(), 2, " Cursor Entry Pointer: %04x\n", m_VC2.nRegData );
+ m_vc2.m_cursor_entry = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Cursor Entry Pointer, %04x\n", m_vc2.m_cursor_entry);
break;
case 0x02:
- //verboselog(machine(), 2, " Cursor X Location: %04x\n", m_VC2.nRegData );
+ m_vc2.m_cursor_x = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Cursor X, %04x\n", m_vc2.m_cursor_x);
break;
case 0x03:
- //verboselog(machine(), 2, " Cursor Y Location: %04x\n", m_VC2.nRegData );
- VC2_CURCURSORX = VC2_CURSORX;
+ m_vc2.m_cursor_y = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Cursor Y, %04x\n", m_vc2.m_cursor_y);
+ m_vc2.m_cur_cursor_x = m_vc2.m_cursor_x;
break;
case 0x04:
- //verboselog(machine(), 2, " Current Cursor X: %04x\n", m_VC2.nRegData );
+ m_vc2.m_cur_cursor_x = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Current Cursor X, %04x\n", m_vc2.m_cur_cursor_x);
break;
case 0x05:
- //verboselog(machine(), 2, " DID Entry Pointer: %04x\n", m_VC2.nRegData );
+ m_vc2.m_did_entry = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: DID Entry Pointer, %04x\n", m_vc2.m_did_entry);
break;
case 0x06:
- //verboselog(machine(), 2, " Scanline Length: %04x\n", m_VC2.nRegData );
+ m_vc2.m_scanline_len = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Scanline Length, %04x\n", m_vc2.m_scanline_len);
break;
case 0x07:
- //verboselog(machine(), 2, " RAM Address: %04x\n", m_VC2.nRegData );
+ m_vc2.m_ram_addr = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: RAM Address, %04x\n", m_vc2.m_ram_addr);
break;
case 0x08:
- //verboselog(machine(), 2, " VT Frame Table Ptr: %04x\n", m_VC2.nRegData );
+ m_vc2.m_vt_frame_ptr = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: VT Frame Table Ptr, %04x\n", m_vc2.m_vt_frame_ptr);
break;
case 0x09:
- //verboselog(machine(), 2, " VT Line Sequence Ptr: %04x\n", m_VC2.nRegData );
+ m_vc2.m_vt_line_ptr = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: VT Line Sequence Pointer, %04x\n", m_vc2.m_vt_line_ptr);
break;
case 0x0a:
- //verboselog(machine(), 2, " VT Lines in Run: %04x\n", m_VC2.nRegData );
+ m_vc2.m_vt_line_run = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: VT Lines in Run, %04x\n", m_vc2.m_vt_line_run);
break;
case 0x0b:
- //verboselog(machine(), 2, " Vertical Line Count: %04x\n", m_VC2.nRegData );
+ m_vc2.m_vt_line_count = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Vertical Line Count, %04x\n", m_vc2.m_vt_line_count);
break;
case 0x0c:
- //verboselog(machine(), 2, " Cursor Table Ptr: %04x\n", m_VC2.nRegData );
+ m_vc2.m_cursor_table_ptr = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Cursor Table Pointer, %04x\n", m_vc2.m_cursor_table_ptr);
break;
case 0x0d:
- //verboselog(machine(), 2, " Working Cursor Y: %04x\n", m_VC2.nRegData );
+ m_vc2.m_work_cursor_y = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Working Cursor Y, %04x\n", m_vc2.m_work_cursor_y);
break;
case 0x0e:
- //verboselog(machine(), 2, " DID Frame Table Ptr: %04x\n", m_VC2.nRegData );
+ m_vc2.m_did_frame_ptr = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: DID Frame Table Pointer, %04x\n", m_vc2.m_did_frame_ptr);
break;
case 0x0f:
- //verboselog(machine(), 2, " DID Line Table Ptr: %04x\n", m_VC2.nRegData );
+ m_vc2.m_did_line_ptr = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: DID Line Table Pointer, %04x\n", m_vc2.m_did_line_ptr);
break;
case 0x10:
- //verboselog(machine(), 2, " Display Control: %04x\n", m_VC2.nRegData );
+ m_vc2.m_display_ctrl = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Display Control, %04x\n", m_vc2.m_display_ctrl);
break;
case 0x1f:
- //verboselog(machine(), 2, " Configuration: %04x\n", m_VC2.nRegData );
- m_VC2.nRegister[0x20] = m_VC2.nRegData;
+ m_vc2.m_config = m_vc2.m_reg_data;
+ LOGMASKED(LOG_VC2, "VC2 Register Write: Configuration, %04x\n", m_vc2.m_config);
break;
default:
- //verboselog(machine(), 2, " Unknown VC2 Register: %04x\n", m_VC2.nRegData );
+ LOGMASKED(LOG_VC2 | LOG_UNKNOWN, "VC2 Register Write: Unknown VC2 Register: %02x = %04x\n", m_vc2.m_reg_idx, m_vc2.m_reg_data);
break;
}
- m_VC2.nRegister[m_VC2.nRegIdx] = m_VC2.nRegData;
break;
default:
- //verboselog(machine(), 2, "Unknown VC2 Register Write: %02x = %08x\n", m_REX3.nDCBRegSelect, data );
+ LOGMASKED(LOG_VC2 | LOG_UNKNOWN, "Unknown VC2 Register Write: %02x = %08x\n", m_rex3.m_dcb_reg_select, data);
break;
}
break;
default:
- //verboselog(machine(), 2, "Unknown VC2 XFer Width: Width %02x, DCB Register %02x, Value 0x%08x\n", m_REX3.nXFerWidth, m_REX3.nDCBRegSelect, data );
+ LOGMASKED(LOG_VC2 | LOG_UNKNOWN, "Unknown VC2 Transfer Width: Width %02x, DCB Register %02x, Value %08x\n", m_rex3.m_xfer_width, m_rex3.m_dcb_reg_select, data);
break;
}
}
-READ32_MEMBER( newport_video_device::rex3_r )
+WRITE_LINE_MEMBER(newport_video_device::vblank_w)
{
-// uint32_t nTemp;
+ if (state)
+ {
+ m_rex3.m_status |= 0x20;
+ if (BIT(m_vc2.m_display_ctrl, 0))
+ m_ioc2->raise_local1_irq(ioc2_device::INT3_LOCAL1_RETRACE);
+ }
+}
-// if( offset >= ( 0x0800 / 4 ) )
-// {
-// //verboselog(machine(), 2, "%08x:\n", 0xbf0f0000 + ( offset << 2 ) );
-// }
- switch (offset)
+READ32_MEMBER(newport_video_device::rex3_r)
+{
+ switch (offset & ~(0x800/4))
{
case 0x0000/4:
- case 0x0800/4:
- //verboselog(machine(), 2, "REX3 Draw Mode 1 Read: %08x\n", m_REX3.nDrawMode1 );
- return m_REX3.nDrawMode1;
+ LOGMASKED(LOG_REX3, "REX3 Draw Mode 1 Read: %08x\n", m_rex3.m_draw_mode1);
+ return m_rex3.m_draw_mode1;
case 0x0004/4:
- case 0x0804/4:
- //verboselog(machine(), 2, "REX3 Draw Mode 0 Read: %08x\n", m_REX3.nDrawMode0 );
- return m_REX3.nDrawMode0;
+ LOGMASKED(LOG_REX3, "REX3 Draw Mode 0 Read: %08x\n", m_rex3.m_draw_mode0);
+ return m_rex3.m_draw_mode0;
case 0x0008/4:
- case 0x0808/4:
- //verboselog(machine(), 2, "REX3 Line Stipple Mode Read: %08x\n", m_REX3.nLSMode );
- return m_REX3.nLSMode;
+ LOGMASKED(LOG_REX3, "REX3 Line Stipple Mode Read: %08x\n", m_rex3.m_ls_mode);
+ return m_rex3.m_ls_mode;
case 0x000c/4:
- case 0x080c/4:
- //verboselog(machine(), 2, "REX3 Line Stipple Pattern Read: %08x\n", m_REX3.nLSPattern );
- return m_REX3.nLSPattern;
+ LOGMASKED(LOG_REX3, "REX3 Line Stipple Pattern Read: %08x\n", m_rex3.m_ls_pattern);
+ return m_rex3.m_ls_pattern;
case 0x0010/4:
- case 0x0810/4:
- //verboselog(machine(), 2, "REX3 Line Stipple Pattern (Save) Read: %08x\n", m_REX3.nLSPatSave );
- return m_REX3.nLSPatSave;
+ LOGMASKED(LOG_REX3, "REX3 Line Stipple Pattern (Save) Read: %08x\n", m_rex3.m_ls_pattern_saved);
+ return m_rex3.m_ls_pattern_saved;
case 0x0014/4:
- case 0x0814/4:
- //verboselog(machine(), 2, "REX3 Pattern Register Read: %08x\n", m_REX3.nZPattern );
- return m_REX3.nZPattern;
+ LOGMASKED(LOG_REX3, "REX3 Pattern Register Read: %08x\n", m_rex3.m_z_pattern);
+ return m_rex3.m_z_pattern;
case 0x0018/4:
- case 0x0818/4:
- //verboselog(machine(), 2, "REX3 Opaque Pattern / Blendfunc Dest Color Read: %08x\n", m_REX3.nColorBack );
- return m_REX3.nColorBack;
+ LOGMASKED(LOG_REX3, "REX3 Opaque Pattern / Blendfunc Dest Color Read: %08x\n", m_rex3.m_color_back);
+ return m_rex3.m_color_back;
case 0x001c/4:
- case 0x081c/4:
- //verboselog(machine(), 2, "REX3 VRAM Fastclear Color Read: %08x\n", m_REX3.nColorVRAM );
- return m_REX3.nColorVRAM;
+ LOGMASKED(LOG_REX3, "REX3 VRAM Fastclear Color Read: %08x\n", m_rex3.m_color_vram);
+ return m_rex3.m_color_vram;
case 0x0020/4:
- case 0x0820/4:
- //verboselog(machine(), 2, "REX3 AFUNCTION Reference Alpha Read: %08x\n", m_REX3.nAlphaRef );
- return m_REX3.nAlphaRef;
+ LOGMASKED(LOG_REX3, "REX3 AFUNCTION Reference Alpha Read: %08x\n", m_rex3.m_alpha_ref);
+ return m_rex3.m_alpha_ref;
case 0x0028/4:
- case 0x0828/4:
- //verboselog(machine(), 2, "REX3 Screenmask 0 X Min/Max Read: %08x\n", m_REX3.nSMask0X );
- return m_REX3.nSMask0X;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 0 X Min/Max Read: %08x\n", m_rex3.m_smask0_x);
+ return m_rex3.m_smask0_x;
case 0x002c/4:
- case 0x082c/4:
- //verboselog(machine(), 2, "REX3 Screenmask 0 Y Min/Max Read: %08x\n", m_REX3.nSMask0Y );
- return m_REX3.nSMask0Y;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 0 Y Min/Max Read: %08x\n", m_rex3.m_smask0_y);
+ return m_rex3.m_smask0_y;
case 0x0030/4:
- case 0x0830/4:
- //verboselog(machine(), 2, "REX3 Line/Span Setup Read: %08x\n", m_REX3.nSetup );
- return m_REX3.nSetup;
+ LOGMASKED(LOG_REX3, "REX3 Line/Span Setup Read: %08x\n", m_rex3.m_setup);
+ return m_rex3.m_setup;
case 0x0034/4:
- case 0x0834/4:
- //verboselog(machine(), 2, "REX3 ZPattern Enable Read: %08x\n", m_REX3.nStepZ );
- return m_REX3.nStepZ;
+ LOGMASKED(LOG_REX3, "REX3 ZPattern Enable Read: %08x\n", m_rex3.m_step_z);
+ return m_rex3.m_step_z;
case 0x0100/4:
- case 0x0900/4:
- //verboselog(machine(), 2, "REX3 X Start Read: %08x\n", m_REX3.nXStart );
- return m_REX3.nXStart;
+ LOGMASKED(LOG_REX3, "REX3 X Start Read: %08x\n", m_rex3.m_x_start);
+ return m_rex3.m_x_start;
case 0x0104/4:
- case 0x0904/4:
- //verboselog(machine(), 2, "REX3 YStart Read: %08x\n", m_REX3.nYStart );
- return m_REX3.nYStart;
+ LOGMASKED(LOG_REX3, "REX3 YStart Read: %08x\n", m_rex3.m_y_start);
+ return m_rex3.m_y_start;
case 0x0108/4:
- case 0x0908/4:
- //verboselog(machine(), 2, "REX3 XEnd Read: %08x\n", m_REX3.nXEnd );
- return m_REX3.nXEnd;
+ LOGMASKED(LOG_REX3, "REX3 XEnd Read: %08x\n", m_rex3.m_x_end);
+ return m_rex3.m_x_end;
case 0x010c/4:
- case 0x090c/4:
- //verboselog(machine(), 2, "REX3 YEnd Read: %08x\n", m_REX3.nYEnd );
- return m_REX3.nYEnd;
+ LOGMASKED(LOG_REX3, "REX3 YEnd Read: %08x\n", m_rex3.m_y_end);
+ return m_rex3.m_y_end;
case 0x0110/4:
- case 0x0910/4:
- //verboselog(machine(), 2, "REX3 XSave Read: %08x\n", m_REX3.nXSave );
- return m_REX3.nXSave;
+ LOGMASKED(LOG_REX3, "REX3 XSave Read: %08x\n", m_rex3.m_x_save);
+ return m_rex3.m_x_save;
case 0x0114/4:
- case 0x0914/4:
- //verboselog(machine(), 2, "REX3 XYMove Read: %08x\n", m_REX3.nXYMove );
- return m_REX3.nXYMove;
+ LOGMASKED(LOG_REX3, "REX3 XYMove Read: %08x\n", m_rex3.m_xy_move);
+ return m_rex3.m_xy_move;
case 0x0118/4:
- case 0x0918/4:
- //verboselog(machine(), 2, "REX3 Bresenham D Read: %08x\n", m_REX3.nBresD );
- return m_REX3.nBresD;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham D Read: %08x\n", m_rex3.m_bres_d);
+ return m_rex3.m_bres_d;
case 0x011c/4:
- case 0x091c/4:
- //verboselog(machine(), 2, "REX3 Bresenham S1 Read: %08x\n", m_REX3.nBresS1 );
- return m_REX3.nBresS1;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham S1 Read: %08x\n", m_rex3.m_bres_s1);
+ return m_rex3.m_bres_s1;
case 0x0120/4:
- case 0x0920/4:
- //verboselog(machine(), 2, "REX3 Bresenham Octant & Incr1 Read: %08x\n", m_REX3.nBresOctInc1 );
- return m_REX3.nBresOctInc1;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham Octant & Incr1 Read: %08x\n", m_rex3.m_bres_octant_inc1);
+ return m_rex3.m_bres_octant_inc1;
case 0x0124/4:
- case 0x0924/4:
- //verboselog(machine(), 2, "REX3 Bresenham Octant Rounding Mode & Incr2 Read: %08x\n", m_REX3.nBresRndInc2 );
- return m_REX3.nBresRndInc2;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham Octant Rounding Mode & Incr2 Read: %08x\n", m_rex3.m_bres_round_inc2);
+ return m_rex3.m_bres_round_inc2;
case 0x0128/4:
- case 0x0928/4:
- //verboselog(machine(), 2, "REX3 Bresenham E1 Read: %08x\n", m_REX3.nBresE1 );
- return m_REX3.nBresE1;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham E1 Read: %08x\n", m_rex3.m_bres_e1);
+ return m_rex3.m_bres_e1;
case 0x012c/4:
- case 0x092c/4:
- //verboselog(machine(), 2, "REX3 Bresenham S2 Read: %08x\n", m_REX3.nBresS2 );
- return m_REX3.nBresS2;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham S2 Read: %08x\n", m_rex3.m_bres_s2);
+ return m_rex3.m_bres_s2;
case 0x0130/4:
- case 0x0930/4:
- //verboselog(machine(), 2, "REX3 AA Line Weight Table 1/2 Read: %08x\n", m_REX3.nAWeight0 );
- return m_REX3.nAWeight0;
+ LOGMASKED(LOG_REX3, "REX3 AA Line Weight Table 1/2 Read: %08x\n", m_rex3.m_a_weight0);
+ return m_rex3.m_a_weight0;
case 0x0134/4:
- case 0x0934/4:
- //verboselog(machine(), 2, "REX3 AA Line Weight Table 2/2 Read: %08x\n", m_REX3.nAWeight1 );
- return m_REX3.nAWeight1;
+ LOGMASKED(LOG_REX3, "REX3 AA Line Weight Table 2/2 Read: %08x\n", m_rex3.m_a_weight1);
+ return m_rex3.m_a_weight1;
case 0x0138/4:
- case 0x0938/4:
- //verboselog(machine(), 2, "REX3 GL XStart Read: %08x\n", m_REX3.nXStartF );
- return m_REX3.nXStartF;
+ LOGMASKED(LOG_REX3, "REX3 GL XStart Read: %08x\n", m_rex3.m_x_start_f);
+ return m_rex3.m_x_start_f;
case 0x013c/4:
- case 0x093c/4:
- //verboselog(machine(), 2, "REX3 GL YStart Read: %08x\n", m_REX3.nYStartF );
- return m_REX3.nYStartF;
+ LOGMASKED(LOG_REX3, "REX3 GL YStart Read: %08x\n", m_rex3.m_y_start_f);
+ return m_rex3.m_y_start_f;
case 0x0140/4:
- case 0x0940/4:
- //verboselog(machine(), 2, "REX3 GL XEnd Read: %08x\n", m_REX3.nXEndF );
- return m_REX3.nXEndF;
+ LOGMASKED(LOG_REX3, "REX3 GL XEnd Read: %08x\n", m_rex3.m_x_end_f);
+ return m_rex3.m_x_end_f;
case 0x0144/4:
- case 0x0944/4:
- //verboselog(machine(), 2, "REX3 GL YEnd Read: %08x\n", m_REX3.nYEndF );
- return m_REX3.nYEndF;
+ LOGMASKED(LOG_REX3, "REX3 GL YEnd Read: %08x\n", m_rex3.m_y_end_f);
+ return m_rex3.m_y_end_f;
case 0x0148/4:
- case 0x0948/4:
- //verboselog(machine(), 2, "REX3 XStart (integer) Read: %08x\n", m_REX3.nXStartI );
- return m_REX3.nXStartI;
+ LOGMASKED(LOG_REX3, "REX3 XStart (integer) Read: %08x\n", m_rex3.m_x_start_i);
+ return m_rex3.m_x_start_i;
case 0x014c/4:
- case 0x094c/4:
- //verboselog(machine(), 2, "REX3 GL XEnd (copy) Read: %08x\n", m_REX3.nXEndF );
- return m_REX3.nXEndF;
+ LOGMASKED(LOG_REX3, "REX3 GL XEnd (copy) Read: %08x\n", m_rex3.m_x_end_f);
+ return m_rex3.m_x_end_f;
case 0x0150/4:
- case 0x0950/4:
- //verboselog(machine(), 2, "REX3 XYStart (integer) Read: %08x\n", m_REX3.nXYStartI );
- return m_REX3.nXYStartI;
+ LOGMASKED(LOG_REX3, "REX3 XYStart (integer) Read: %08x\n", m_rex3.m_xy_start_i);
+ return m_rex3.m_xy_start_i;
case 0x0154/4:
- case 0x0954/4:
- //verboselog(machine(), 2, "REX3 XYEnd (integer) Read: %08x\n", m_REX3.nXYEndI );
- return m_REX3.nXYEndI;
+ LOGMASKED(LOG_REX3, "REX3 XYEnd (integer) Read: %08x\n", m_rex3.m_xy_end_i);
+ return m_rex3.m_xy_end_i;
case 0x0158/4:
- case 0x0958/4:
- //verboselog(machine(), 2, "REX3 XStartEnd (integer) Read: %08x\n", m_REX3.nXStartEndI );
- return m_REX3.nXStartEndI;
+ LOGMASKED(LOG_REX3, "REX3 XStartEnd (integer) Read: %08x\n", m_rex3.m_x_start_end_i);
+ return m_rex3.m_x_start_end_i;
case 0x0200/4:
- case 0x0a00/4:
- //verboselog(machine(), 2, "REX3 Red/CI Full State Read: %08x\n", m_REX3.nColorRed );
- return m_REX3.nColorRed;
+ LOGMASKED(LOG_REX3, "REX3 Red/CI Full State Read: %08x\n", m_rex3.m_color_red);
+ return m_rex3.m_color_red;
case 0x0204/4:
- case 0x0a04/4:
- //verboselog(machine(), 2, "REX3 Alpha Full State Read: %08x\n", m_REX3.nColorAlpha );
- return m_REX3.nColorAlpha;
+ LOGMASKED(LOG_REX3, "REX3 Alpha Full State Read: %08x\n", m_rex3.m_color_alpha);
+ return m_rex3.m_color_alpha;
case 0x0208/4:
- case 0x0a08/4:
- //verboselog(machine(), 2, "REX3 Green Full State Read: %08x\n", m_REX3.nColorGreen );
- return m_REX3.nColorGreen;
+ LOGMASKED(LOG_REX3, "REX3 Green Full State Read: %08x\n", m_rex3.m_color_green);
+ return m_rex3.m_color_green;
case 0x020c/4:
- case 0x0a0c/4:
- //verboselog(machine(), 2, "REX3 Blue Full State Read: %08x\n", m_REX3.nColorBlue );
- return m_REX3.nColorBlue;
+ LOGMASKED(LOG_REX3, "REX3 Blue Full State Read: %08x\n", m_rex3.m_color_blue);
+ return m_rex3.m_color_blue;
case 0x0210/4:
- case 0x0a10/4:
- //verboselog(machine(), 2, "REX3 Red/CI Slope Read: %08x\n", m_REX3.nSlopeRed );
- return m_REX3.nSlopeRed;
+ LOGMASKED(LOG_REX3, "REX3 Red/CI Slope Read: %08x\n", m_rex3.m_slope_red);
+ return m_rex3.m_slope_red;
case 0x0214/4:
- case 0x0a14/4:
- //verboselog(machine(), 2, "REX3 Alpha Slope Read: %08x\n", m_REX3.nSlopeAlpha );
- return m_REX3.nSlopeAlpha;
+ LOGMASKED(LOG_REX3, "REX3 Alpha Slope Read: %08x\n", m_rex3.m_slope_alpha);
+ return m_rex3.m_slope_alpha;
case 0x0218/4:
- case 0x0a18/4:
- //verboselog(machine(), 2, "REX3 Green Slope Read: %08x\n", m_REX3.nSlopeGreen );
- return m_REX3.nSlopeGreen;
+ LOGMASKED(LOG_REX3, "REX3 Green Slope Read: %08x\n", m_rex3.m_slope_green);
+ return m_rex3.m_slope_green;
case 0x021c/4:
- case 0x0a1c/4:
- //verboselog(machine(), 2, "REX3 Blue Slope Read: %08x\n", m_REX3.nSlopeBlue );
- return m_REX3.nSlopeBlue;
+ LOGMASKED(LOG_REX3, "REX3 Blue Slope Read: %08x\n", m_rex3.m_slope_blue);
+ return m_rex3.m_slope_blue;
case 0x0220/4:
- case 0x0a20/4:
- //verboselog(machine(), 2, "REX3 Write Mask Read: %08x\n", m_REX3.nWriteMask );
- return m_REX3.nWriteMask;
+ LOGMASKED(LOG_REX3, "REX3 Write Mask Read: %08x\n", m_rex3.m_write_mask);
+ return m_rex3.m_write_mask;
case 0x0224/4:
- case 0x0a24/4:
- //verboselog(machine(), 2, "REX3 Packed Color Fractions Read: %08x\n", m_REX3.nZeroFract );
- return m_REX3.nZeroFract;
+ LOGMASKED(LOG_REX3, "REX3 Packed Color Fractions Read: %08x\n", m_rex3.m_zero_fract);
+ return m_rex3.m_zero_fract;
case 0x0228/4:
- case 0x0a28/4:
- //verboselog(machine(), 2, "REX3 Color Index Zeros Overflow Read: %08x\n", m_REX3.nZeroOverflow );
- return m_REX3.nZeroOverflow;
+ LOGMASKED(LOG_REX3, "REX3 Color Index Zeros Overflow Read: %08x\n", m_rex3.m_zero_overflow);
+ return m_rex3.m_zero_overflow;
case 0x022c/4:
- case 0x0a2c/4:
- //verboselog(machine(), 2, "REX3 Red/CI Slope (copy) Read: %08x\n", m_REX3.nSlopeRed );
- return m_REX3.nSlopeRed;
+ LOGMASKED(LOG_REX3, "REX3 Red/CI Slope (copy) Read: %08x\n", m_rex3.m_slope_red);
+ return m_rex3.m_slope_red;
case 0x0230/4:
- case 0x0a30/4:
- //verboselog(machine(), 2, "REX3 Host Data Port MSW Read: %08x\n", m_REX3.nHostDataPortMSW );
- return m_REX3.nHostDataPortMSW;
+ LOGMASKED(LOG_REX3, "REX3 Host Data Port MSW Read: %08x\n", m_rex3.m_host_dataport_msw);
+ return m_rex3.m_host_dataport_msw;
case 0x0234/4:
- case 0x0a34/4:
- //verboselog(machine(), 2, "REX3 Host Data Port LSW Read: %08x\n", m_REX3.nHostDataPortLSW );
- return m_REX3.nHostDataPortLSW;
+ LOGMASKED(LOG_REX3, "REX3 Host Data Port LSW Read: %08x\n", m_rex3.m_host_dataport_lsw);
+ return m_rex3.m_host_dataport_lsw;
case 0x0238/4:
- case 0x0a38/4:
- //verboselog(machine(), 2, "REX3 Display Control Bus Mode Read: %08x\n", m_REX3.nDCBMode );
- return m_REX3.nDCBMode;
+ LOGMASKED(LOG_REX3, "REX3 Display Control Bus Mode Read: %08x\n", m_rex3.m_dcb_mode);
+ return m_rex3.m_dcb_mode;
case 0x0240/4:
- case 0x0a40/4:
- switch (m_REX3.nDCBSlvSelect)
+ switch (m_rex3.m_dcb_slave_select)
{
case 0x00:
return vc2_r(space, 0, mem_mask);
@@ -849,767 +890,710 @@ READ32_MEMBER( newport_video_device::rex3_r )
case 0x06:
return xmap1_r(space, 0, mem_mask);
default:
- //verboselog(machine(), 2, "REX3 Display Control Bus Data MSW Read: %08x\n", m_REX3.nDCBDataMSW );
+ LOGMASKED(LOG_REX3, "REX3 Display Control Bus Data MSW Read: %08x\n", m_rex3.m_dcb_data_msw);
break;
}
- return m_REX3.nDCBDataMSW;
+ return m_rex3.m_dcb_data_msw;
case 0x0244/4:
- case 0x0a44/4:
- //verboselog(machine(), 2, "REX3 Display Control Bus Data LSW Read: %08x\n", m_REX3.nDCBDataLSW );
- return m_REX3.nDCBDataLSW;
+ LOGMASKED(LOG_REX3, "REX3 Display Control Bus Data LSW Read: %08x\n", m_rex3.m_dcb_data_lsw);
+ return m_rex3.m_dcb_data_lsw;
case 0x1300/4:
- //verboselog(machine(), 2, "REX3 Screenmask 1 X Min/Max Read: %08x\n", m_REX3.nSMask1X );
- return m_REX3.nSMask1X;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 1 X Min/Max Read: %08x\n", m_rex3.m_s_mask1_x);
+ return m_rex3.m_s_mask1_x;
case 0x1304/4:
- //verboselog(machine(), 2, "REX3 Screenmask 1 Y Min/Max Read: %08x\n", m_REX3.nSMask1Y );
- return m_REX3.nSMask1Y;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 1 Y Min/Max Read: %08x\n", m_rex3.m_s_mask1_y);
+ return m_rex3.m_s_mask1_y;
case 0x1308/4:
- //verboselog(machine(), 2, "REX3 Screenmask 2 X Min/Max Read: %08x\n", m_REX3.nSMask2X );
- return m_REX3.nSMask2X;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 2 X Min/Max Read: %08x\n", m_rex3.m_s_mask2_x);
+ return m_rex3.m_s_mask2_x;
case 0x130c/4:
- //verboselog(machine(), 2, "REX3 Screenmask 2 Y Min/Max Read: %08x\n", m_REX3.nSMask2Y );
- return m_REX3.nSMask2Y;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 2 Y Min/Max Read: %08x\n", m_rex3.m_s_mask2_y);
+ return m_rex3.m_s_mask2_y;
case 0x1310/4:
- //verboselog(machine(), 2, "REX3 Screenmask 3 X Min/Max Read: %08x\n", m_REX3.nSMask3X );
- return m_REX3.nSMask3X;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 3 X Min/Max Read: %08x\n", m_rex3.m_s_mask3_x);
+ return m_rex3.m_s_mask3_x;
case 0x1314/4:
- //verboselog(machine(), 2, "REX3 Screenmask 3 Y Min/Max Read: %08x\n", m_REX3.nSMask3Y );
- return m_REX3.nSMask3Y;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 3 Y Min/Max Read: %08x\n", m_rex3.m_s_mask3_y);
+ return m_rex3.m_s_mask3_y;
case 0x1318/4:
- //verboselog(machine(), 2, "REX3 Screenmask 4 X Min/Max Read: %08x\n", m_REX3.nSMask4X );
- return m_REX3.nSMask4X;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 4 X Min/Max Read: %08x\n", m_rex3.m_s_mask4_x);
+ return m_rex3.m_s_mask4_x;
case 0x131c/4:
- //verboselog(machine(), 2, "REX3 Screenmask 4 Y Min/Max Read: %08x\n", m_REX3.nSMask4Y );
- return m_REX3.nSMask4Y;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 4 Y Min/Max Read: %08x\n", m_rex3.m_s_mask4_y);
+ return m_rex3.m_s_mask4_y;
case 0x1320/4:
- //verboselog(machine(), 2, "REX3 Top of Screen Scanline Read: %08x\n", m_REX3.nTopScanline );
- return m_REX3.nTopScanline;
+ LOGMASKED(LOG_REX3, "REX3 Top of Screen Scanline Read: %08x\n", m_rex3.m_top_scanline);
+ return m_rex3.m_top_scanline;
case 0x1324/4:
- //verboselog(machine(), 2, "REX3 Clipping Mode Read: %08x\n", m_REX3.nXYWin );
- return m_REX3.nXYWin;
+ LOGMASKED(LOG_REX3, "REX3 XY Window Read: %08x\n", m_rex3.m_xy_window);
+ return m_rex3.m_xy_window;
case 0x1328/4:
- //verboselog(machine(), 2, "REX3 Clipping Mode Read: %08x\n", m_REX3.nClipMode );
- return m_REX3.nClipMode;
+ LOGMASKED(LOG_REX3, "REX3 Clipping Mode Read: %08x\n", m_rex3.m_clip_mode);
+ return m_rex3.m_clip_mode;
case 0x1330/4:
- //verboselog(machine(), 2, "REX3 Config Read: %08x\n", m_REX3.nConfig );
- return m_REX3.nConfig;
+ LOGMASKED(LOG_REX3, "REX3 Config Read: %08x\n", m_rex3.m_config);
+ return m_rex3.m_config;
case 0x1338/4:
- //verboselog(machine(), 2, "REX3 Status Read: %08x\n", 0x00000001 );
-// nTemp = m_REX3.nStatus;
- m_REX3.nStatus = 0;
- return 0x00000001;
+ {
+ LOGMASKED(LOG_REX3, "REX3 Status Read: %08x\n", m_rex3.m_status);
+ uint32_t old_status = m_rex3.m_status;
+ m_rex3.m_status = 0;
+ m_ioc2->lower_local1_irq(ioc2_device::INT3_LOCAL1_RETRACE);
+ return old_status;
+ }
case 0x133c/4:
- //verboselog(machine(), 2, "REX3 User Status Read: %08x\n", 0x00000001 );
- return 0x00000001;
+ LOGMASKED(LOG_REX3, "REX3 User Status Read: %08x\n", m_rex3.m_status);
+ return m_rex3.m_status;
default:
- //verboselog(machine(), 2, "Unknown REX3 Read: %08x (%08x)\n", 0x1f0f0000 + ( offset << 2 ), mem_mask );
+ LOGMASKED(LOG_REX3 | LOG_UNKNOWN, "Unknown REX3 Read: %08x (%08x)\n", 0x1f0f0000 + (offset << 2), mem_mask);
return 0;
}
}
-void newport_video_device::DoREX3Command()
+void newport_video_device::do_rex3_command()
{
- uint32_t nCommand = ( ( m_REX3.nDrawMode0 & ( 1 << 15 ) ) >> 15 ) |
- ( ( m_REX3.nDrawMode0 & ( 1 << 5 ) ) >> 4 ) |
- ( ( m_REX3.nDrawMode0 & ( 1 << 9 ) ) >> 7 ) |
- ( ( m_REX3.nDrawMode0 & ( 1 << 8 ) ) >> 5 ) |
- ( ( m_REX3.nDrawMode0 & 0x0000001c ) << 2 ) |
- ( ( m_REX3.nDrawMode0 & 0x00000003 ) << 7 );
- uint16_t nX, nY;
- uint16_t nStartX = ( m_REX3.nXYStartI >> 16 ) & 0x0000ffff;
- uint16_t nStartY = ( m_REX3.nXYStartI >> 0 ) & 0x0000ffff;
- uint16_t nEndX = ( m_REX3.nXYEndI >> 16 ) & 0x0000ffff;
- uint16_t nEndY = ( m_REX3.nXYEndI >> 0 ) & 0x0000ffff;
- int16_t nMoveX, nMoveY;
+ uint32_t command = ((m_rex3.m_draw_mode0 & (1 << 15)) >> 15) |
+ ((m_rex3.m_draw_mode0 & (1 << 5)) >> 4) |
+ ((m_rex3.m_draw_mode0 & (1 << 9)) >> 7) |
+ ((m_rex3.m_draw_mode0 & (1 << 8)) >> 5) |
+ ((m_rex3.m_draw_mode0 & 0x0000001c) << 2) |
+ ((m_rex3.m_draw_mode0 & 0x00000003) << 7);
+ uint16_t start_x = (uint16_t)(m_rex3.m_xy_start_i >> 16);
+ uint16_t start_y = (uint16_t)m_rex3.m_xy_start_i;
+ uint16_t end_x = (uint16_t)(m_rex3.m_xy_end_i >> 16);
+ uint16_t end_y = (uint16_t)m_rex3.m_xy_end_i;
- switch (nCommand)
+ switch (command)
{
case 0x00000110:
- nX = nStartX;
- nY = nStartY;
- //verboselog(machine(), 3, "Tux Logo Draw: %04x, %04x = %08x\n", nX, nY, m_CMAP0.nPalette[ ( m_REX3.nHostDataPortMSW & 0xff000000 ) >> 24 ] );
-// m_REX3.nKludge_SkipLine = 1;
- m_REX3.nBresOctInc1 = 0;
- m_base[ nY*(1280+64) + nX ] = m_CMAP0.nPalette[ ( m_REX3.nHostDataPortMSW & 0xff000000 ) >> 24 ];
- nX++;
- if( nX > ( ( m_REX3.nXYEndI & 0xffff0000 ) >> 16 ) )
+ {
+ uint16_t x = start_x;
+ uint16_t y = start_y;
+ LOGMASKED(LOG_COMMANDS, "Tux Logo Draw: %04x, %04x = %08x\n", x, y, m_cmap0.m_palette[m_rex3.m_host_dataport_msw >> 24]);
+// m_rex3.m_skipline_kludge = 1;
+ m_rex3.m_bres_octant_inc1 = 0;
+ m_base[y * (1280 + 64) + x] = m_cmap0.m_palette[m_rex3.m_host_dataport_msw >> 24];
+ x++;
+ if (x > (m_rex3.m_xy_end_i >> 16))
{
- nY++;
- nX = m_REX3.nXSave;
+ y++;
+ x = m_rex3.m_x_save;
}
- m_REX3.nXYStartI = ( nX << 16 ) | nY;
- m_REX3.nXStartI = nX;
- m_REX3.nXStart = 0 | ( ( m_REX3.nXYStartI & 0xffff0000 ) >> 5 );
- m_REX3.nYStart = 0 | ( ( m_REX3.nXYStartI & 0x0000ffff ) << 11 );
+ m_rex3.m_xy_start_i = (x << 16) | y;
+ m_rex3.m_x_start_i = x;
+ m_rex3.m_x_start = ((m_rex3.m_xy_start_i & 0xffff0000) >> 5);
+ m_rex3.m_y_start = ((m_rex3.m_xy_start_i & 0x0000ffff) << 11);
break;
+ }
case 0x0000011e:
- //verboselog(machine(), 3, "Block draw: %04x, %04x to %04x, %04x = %08x\n", nStartX, nStartY, nEndX, nEndY, m_CMAP0.nPalette[ m_REX3.nZeroFract ] );
- for( nY = nStartY; nY <= nEndY; nY++ )
+ LOGMASKED(LOG_COMMANDS, "Block draw: %04x, %04x to %04x, %04x = %08x\n", start_x, start_y, end_x, end_y, m_cmap0.m_palette[m_rex3.m_zero_fract]);
+ for (uint16_t y = start_y; y <= end_y; y++)
{
- //verboselog(machine(), 3, "Pixel: %04x, %04x = %08x\n", nStartX, nY, m_CMAP0.nPalette[ m_REX3.nZeroFract ] );
- for( nX = nStartX; nX <= nEndX; nX++ )
+ for (uint16_t x = start_x; x <= end_x; x++)
{
- m_base[ nY*(1280+64) + nX ] = m_CMAP0.nPalette[ m_REX3.nZeroFract ];
+ m_base[y * (1280 + 64) + x] = m_cmap0.m_palette[m_rex3.m_zero_fract];
}
}
break;
case 0x00000119:
- if( !m_REX3.nKludge_SkipLine )
+ if (!m_rex3.m_skipline_kludge)
{
- //verboselog(machine(), 3, "Pattern Line Draw: %08x at %04x, %04x color %08x\n", m_REX3.nZPattern, m_REX3.nXYStartI >> 16, m_REX3.nXYStartI & 0x0000ffff, m_CMAP0.nPalette[ m_REX3.nZeroFract ] );
- for( nX = nStartX; nX <= nEndX && nX < ( nStartX + 32 ); nX++ )
+ LOGMASKED(LOG_COMMANDS, "Pattern Line Draw: %08x at %04x, %04x color %08x\n", m_rex3.m_z_pattern, m_rex3.m_xy_start_i >> 16, (uint16_t)m_rex3.m_xy_start_i, m_cmap0.m_palette[m_rex3.m_zero_fract]);
+ for (uint16_t x = start_x; x <= end_x && x < (start_x + 32); x++)
{
- if( m_REX3.nZPattern & ( 1 << ( 31 - ( nX - nStartX ) ) ) )
+ if (m_rex3.m_z_pattern & (1 << (31 - (x - start_x))))
{
- m_base[ nStartY*(1280+64) + nX ] = m_CMAP0.nPalette[ m_REX3.nZeroFract ];
+ m_base[start_y * (1280 + 64) + x] = m_cmap0.m_palette[m_rex3.m_zero_fract];
}
}
- if( m_REX3.nBresOctInc1 & 0x01000000 )
- {
- nStartY--;
- }
+ if (BIT(m_rex3.m_bres_octant_inc1, 24))
+ start_y--;
else
- {
- nStartY++;
- }
- m_REX3.nXYStartI = ( nStartX << 16 ) | nStartY;
- m_REX3.nYStart = 0 | ( ( m_REX3.nXYStartI & 0x0000ffff ) << 11 );
+ start_y++;
+ m_rex3.m_xy_start_i = (start_x << 16) | start_y;
+ m_rex3.m_y_start = ((m_rex3.m_xy_start_i & 0x0000ffff) << 11);
}
break;
case 0x0000019e:
- nMoveX = (int16_t)( ( m_REX3.nXYMove >> 16 ) & 0x0000ffff );
- nMoveY = (int16_t)( m_REX3.nXYMove & 0x0000ffff );
- //verboselog(machine(), 1, "FB to FB Copy: %04x, %04x - %04x, %04x to %04x, %04x\n", nStartX, nStartY, nEndX, nEndY, nStartX + nMoveX, nStartY + nMoveY );
- for( nY = nStartY; nY <= nEndY; nY++ )
+ {
+ int16_t move_x = (int16_t)((m_rex3.m_xy_move >> 16) & 0x0000ffff);
+ int16_t move_y = (int16_t)m_rex3.m_xy_move;
+ LOGMASKED(LOG_COMMANDS, "FB to FB Copy: %04x, %04x - %04x, %04x to %04x, %04x\n", start_x, start_y, end_x, end_y, start_x + move_x, start_y + move_y);
+ for (uint16_t y = start_y; y <= end_y; y++)
{
- for( nX = nStartX; nX <= nEndX; nX++ )
+ for (uint16_t x = start_x; x <= end_x; x++)
{
- m_base[ (nY + nMoveY)*(1280+64) + (nX + nMoveX) ] = m_base[ nY*(1280+64) + nX ];
+ m_base[(y + move_y) * (1280 + 64) + (x + move_x)] = m_base[y * (1280 + 64) + x];
}
}
break;
+ }
default:
- //verboselog(machine(), 1, "Unknown draw command: %08x\n", nCommand );
+ LOGMASKED(LOG_COMMANDS | LOG_UNKNOWN, "Unknown draw command: %08x\n", command);
break;
}
}
-WRITE32_MEMBER( newport_video_device::rex3_w )
+WRITE32_MEMBER(newport_video_device::rex3_w)
{
- uint32_t nTemp = 0;
-
- if( offset & 0x00000200 )
+ if (offset & 0x00000200)
{
- //verboselog(machine(), 2, "Start Cmd\n" );
+ LOGMASKED(LOG_REX3 | LOG_COMMANDS, "Start Command\n");
}
- switch( offset )
+ switch (offset & ~(0x800/4))
{
case 0x0000/4:
- case 0x0800/4:
- //verboselog(machine(), 2, "REX3 Draw Mode 1 Write: %08x\n", data );
- switch( data & 0x00000007 )
+ LOGMASKED(LOG_REX3, "REX3 Draw Mode 1 Write: %08x\n", data);
+ switch (data & 7)
{
case 0x00:
- //verboselog(machine(), 2, " Planes Enabled: None\n" );
+ LOGMASKED(LOG_REX3, " Planes Enabled: None\n");
break;
case 0x01:
- //verboselog(machine(), 2, " Planes Enabled: R/W RGB/CI\n" );
+ LOGMASKED(LOG_REX3, " Planes Enabled: R/W RGB/CI\n");
break;
case 0x02:
- //verboselog(machine(), 2, " Planes Enabled: R/W RGBA\n" );
+ LOGMASKED(LOG_REX3, " Planes Enabled: R/W RGBA\n");
break;
case 0x03:
- //verboselog(machine(), 2, " Planes Enabled: R/W OLAY\n" );
+ LOGMASKED(LOG_REX3, " Planes Enabled: R/W OLAY\n");
break;
case 0x04:
- //verboselog(machine(), 2, " Planes Enabled: R/W PUP\n" );
+ LOGMASKED(LOG_REX3, " Planes Enabled: R/W PUP\n");
break;
case 0x05:
- //verboselog(machine(), 2, " Planes Enabled: R/W CID\n" );
+ LOGMASKED(LOG_REX3, " Planes Enabled: R/W CID\n");
break;
default:
- //verboselog(machine(), 2, " Unknown Plane Enable Value\n" );
+ LOGMASKED(LOG_REX3 | LOG_UNKNOWN, " Unknown Plane Enable Value\n");
break;
}
- switch( ( data & 0x00000018 ) >> 3 )
+ switch ((data & 0x00000018) >> 3)
{
case 0x00:
- //verboselog(machine(), 2, " Plane Draw Depth: 4 bits\n" );
+ LOGMASKED(LOG_REX3, " Plane Draw Depth: 4 bits\n");
break;
case 0x01:
- //verboselog(machine(), 2, " Plane Draw Depth: 8 bits\n" );
+ LOGMASKED(LOG_REX3, " Plane Draw Depth: 8 bits\n");
break;
case 0x02:
- //verboselog(machine(), 2, " Plane Draw Depth: 12 bits\n" );
+ LOGMASKED(LOG_REX3, " Plane Draw Depth: 12 bits\n");
break;
case 0x03:
- //verboselog(machine(), 2, " Plane Draw Depth: 32 bits\n" );
+ LOGMASKED(LOG_REX3, " Plane Draw Depth: 32 bits\n");
break;
}
- //verboselog(machine(), 2, " DBuf Source Buffer: %d\n", ( data & 0x00000020 ) >> 5 );
- //verboselog(machine(), 2, " GL Y Coordinates: %d\n", ( data & 0x00000040 ) >> 6 );
- //verboselog(machine(), 2, " Enable Pxl Packing: %d\n", ( data & 0x00000080 ) >> 7 );
- switch( ( data & 0x00000300 ) >> 8 )
+ LOGMASKED(LOG_REX3, " DBuf Source Buffer: %d\n", BIT(data, 5));
+ LOGMASKED(LOG_REX3, " GL Y Coordinates: %d\n", BIT(data, 6));
+ LOGMASKED(LOG_REX3, " Enable Pxl Packing: %d\n", BIT(data, 7));
+ switch ((data & 0x00000300) >> 8)
{
case 0x00:
- //verboselog(machine(), 2, " HOSTRW Depth: 4 bits\n" );
+ LOGMASKED(LOG_REX3, " HOSTRW Depth: 4 bits\n");
break;
case 0x01:
- //verboselog(machine(), 2, " HOSTRW Depth: 8 bits\n" );
+ LOGMASKED(LOG_REX3, " HOSTRW Depth: 8 bits\n");
break;
case 0x02:
- //verboselog(machine(), 2, " HOSTRW Depth: 12 bits\n" );
+ LOGMASKED(LOG_REX3, " HOSTRW Depth: 12 bits\n");
break;
case 0x03:
- //verboselog(machine(), 2, " HOSTRW Depth: 32 bits\n" );
+ LOGMASKED(LOG_REX3, " HOSTRW Depth: 32 bits\n");
break;
}
- //verboselog(machine(), 2, " DWord Transfers: %d\n", ( data & 0x00000400 ) >> 10 );
- //verboselog(machine(), 2, " Swap Endianness: %d\n", ( data & 0x00000800 ) >> 11 );
- //verboselog(machine(), 2, " Compare Src > Dest: %d\n", ( data & 0x00001000 ) >> 12 );
- //verboselog(machine(), 2, " Compare Src = Dest: %d\n", ( data & 0x00002000 ) >> 13 );
- //verboselog(machine(), 2, " Compare Src < Dest: %d\n", ( data & 0x00004000 ) >> 14 );
- //verboselog(machine(), 2, " RGB Mode Select: %d\n", ( data & 0x00008000 ) >> 15 );
- //verboselog(machine(), 2, " Enable Dithering: %d\n", ( data & 0x00010000 ) >> 16 );
- //verboselog(machine(), 2, " Enable Fast Clear: %d\n", ( data & 0x00020000 ) >> 17 );
- //verboselog(machine(), 2, " Enable Blending: %d\n", ( data & 0x00040000 ) >> 18 );
- switch( ( data & 0x00380000 ) >> 19 )
+ LOGMASKED(LOG_REX3, " DWord Transfers: %d\n", BIT(data, 10));
+ LOGMASKED(LOG_REX3, " Swap Endianness: %d\n", BIT(data, 11));
+ LOGMASKED(LOG_REX3, " Compare Src > Dest: %d\n", BIT(data, 12));
+ LOGMASKED(LOG_REX3, " Compare Src = Dest: %d\n", BIT(data, 13));
+ LOGMASKED(LOG_REX3, " Compare Src < Dest: %d\n", BIT(data, 14));
+ LOGMASKED(LOG_REX3, " RGB Mode Select: %d\n", BIT(data, 15));
+ LOGMASKED(LOG_REX3, " Enable Dithering: %d\n", BIT(data, 16));
+ LOGMASKED(LOG_REX3, " Enable Fast Clear: %d\n", BIT(data, 17));
+ LOGMASKED(LOG_REX3, " Enable Blending: %d\n", BIT(data, 18));
+ switch ((data & 0x00380000) >> 19)
{
case 0x00:
- //verboselog(machine(), 2, " Src Blend Factor: 0\n" );
+ LOGMASKED(LOG_REX3, " Src Blend Factor: 0\n");
break;
case 0x01:
- //verboselog(machine(), 2, " Src Blend Factor: 1\n" );
+ LOGMASKED(LOG_REX3, " Src Blend Factor: 1\n");
break;
case 0x02:
- //verboselog(machine(), 2, " Src Blend Factor: Normalized Dest (or COLORBACK)\n" );
+ LOGMASKED(LOG_REX3, " Src Blend Factor: Normalized Dest (or COLORBACK)\n");
break;
case 0x03:
- //verboselog(machine(), 2, " Src Blend Factor: 1 - Normalized Dest (or COLORBACK)\n" );
+ LOGMASKED(LOG_REX3, " Src Blend Factor: 1 - Normalized Dest (or COLORBACK)\n");
break;
case 0x04:
- //verboselog(machine(), 2, " Src Blend Factor: Normalized Src\n" );
+ LOGMASKED(LOG_REX3, " Src Blend Factor: Normalized Src\n");
break;
case 0x05:
- //verboselog(machine(), 2, " Src Blend Factor: 1 - Normalized Src\n" );
+ LOGMASKED(LOG_REX3, " Src Blend Factor: 1 - Normalized Src\n");
break;
default:
- //verboselog(machine(), 2, " Unknown Src Blend Factor: %02x\n", ( data & 0x00380000 ) >> 19 );
+ LOGMASKED(LOG_REX3 | LOG_UNKNOWN, " Unknown Src Blend Factor: %02x\n", (data & 0x00380000) >> 19);
break;
}
- switch( ( data & 0x01c00000 ) >> 22 )
+ switch ((data & 0x01c00000) >> 22)
{
case 0x00:
- //verboselog(machine(), 2, " Dest Blend Factor: 0\n" );
+ LOGMASKED(LOG_REX3, " Dest Blend Factor: 0\n");
break;
case 0x01:
- //verboselog(machine(), 2, " Dest Blend Factor: 1\n" );
+ LOGMASKED(LOG_REX3, " Dest Blend Factor: 1\n");
break;
case 0x02:
- //verboselog(machine(), 2, " Dest Blend Factor: Normalized Dest (or COLORBACK)\n" );
+ LOGMASKED(LOG_REX3, " Dest Blend Factor: Normalized Dest (or COLORBACK)\n");
break;
case 0x03:
- //verboselog(machine(), 2, " Dest Blend Factor: 1 - Normalized Dest (or COLORBACK)\n" );
+ LOGMASKED(LOG_REX3, " Dest Blend Factor: 1 - Normalized Dest (or COLORBACK)\n");
break;
case 0x04:
- //verboselog(machine(), 2, " Dest Blend Factor: Normalized Src\n" );
+ LOGMASKED(LOG_REX3, " Dest Blend Factor: Normalized Src\n");
break;
case 0x05:
- //verboselog(machine(), 2, " Dest Blend Factor: 1 - Normalized Src\n" );
+ LOGMASKED(LOG_REX3, " Dest Blend Factor: 1 - Normalized Src\n");
break;
default:
- //verboselog(machine(), 2, " Unknown Src Blend Factor: %02x\n", ( data & 0x00380000 ) >> 19 );
+ LOGMASKED(LOG_REX3 | LOG_UNKNOWN, " Unknown Src Blend Factor: %02x\n", (data & 0x00380000) >> 19);
break;
}
- //verboselog(machine(), 2, " COLORBACK Dest Blend: %d\n", ( data & 0x02000000 ) >> 25 );
- //verboselog(machine(), 2, " Enable Pxl Prefetch: %d\n", ( data & 0x04000000 ) >> 26 );
- //verboselog(machine(), 2, " SFACTOR Src Alpha: %d\n", ( data & 0x08000000 ) >> 27 );
- switch( ( data & 0xf0000000 ) >> 28 )
+ LOGMASKED(LOG_REX3, " COLORBACK Dest Blend: %d\n", BIT(data, 25));
+ LOGMASKED(LOG_REX3, " Enable Pxl Prefetch: %d\n", BIT(data, 26));
+ LOGMASKED(LOG_REX3, " SFACTOR Src Alpha: %d\n", BIT(data, 27));
+ switch ((data & 0xf0000000) >> 28)
{
case 0x00:
- //verboselog(machine(), 2, " Logical Op. Type: 0\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: 0\n");
break;
case 0x01:
- //verboselog(machine(), 2, " Logical Op. Type: Src & Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: Src & Dst\n");
break;
case 0x02:
- //verboselog(machine(), 2, " Logical Op. Type: Src & ~Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: Src & ~Dst\n");
break;
case 0x03:
- //verboselog(machine(), 2, " Logical Op. Type: Src\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: Src\n");
break;
case 0x04:
- //verboselog(machine(), 2, " Logical Op. Type: ~Src & Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: ~Src & Dst\n");
break;
case 0x05:
- //verboselog(machine(), 2, " Logical Op. Type: Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: Dst\n");
break;
case 0x06:
- //verboselog(machine(), 2, " Logical Op. Type: Src ^ Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: Src ^ Dst\n");
break;
case 0x07:
- //verboselog(machine(), 2, " Logical Op. Type: Src | Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: Src | Dst\n");
break;
case 0x08:
- //verboselog(machine(), 2, " Logical Op. Type: ~(Src | Dst)\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: ~(Src | Dst)\n");
break;
case 0x09:
- //verboselog(machine(), 2, " Logical Op. Type: ~(Src ^ Dst)\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: ~(Src ^ Dst)\n");
break;
case 0x0a:
- //verboselog(machine(), 2, " Logical Op. Type: ~Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: ~Dst\n");
break;
case 0x0b:
- //verboselog(machine(), 2, " Logical Op. Type: Src | ~Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: Src | ~Dst\n");
break;
case 0x0c:
- //verboselog(machine(), 2, " Logical Op. Type: ~Src\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: ~Src\n");
break;
case 0x0d:
- //verboselog(machine(), 2, " Logical Op. Type: ~Src | Dst\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: ~Src | Dst\n");
break;
case 0x0e:
- //verboselog(machine(), 2, " Logical Op. Type: ~(Src & Dst)\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: ~(Src & Dst)\n");
break;
case 0x0f:
- //verboselog(machine(), 2, " Logical Op. Type: 1\n" );
+ LOGMASKED(LOG_REX3, " Logical Op. Type: 1\n");
break;
}
- m_REX3.nDrawMode1 = data;
-// if( offset >= ( 0x800 / 4 ) )
-// {
-// DoREX3Command();
-// }
+ m_rex3.m_draw_mode1 = data;
break;
case 0x0004/4:
- //verboselog(machine(), 2, "REX3 Draw Mode 0 Write: %08x\n", data );
- switch( data & 0x00000003 )
+ LOGMASKED(LOG_REX3, "REX3 Draw Mode 0 Write: %08x\n", data);
+ switch (data & 3)
{
case 0x00:
- //verboselog(machine(), 2, " Primitive Function: No Op\n" );
+ LOGMASKED(LOG_REX3, " Primitive Function: No Op\n");
break;
case 0x01:
- //verboselog(machine(), 2, " Primitive Function: Read From FB\n" );
+ LOGMASKED(LOG_REX3, " Primitive Function: Read From FB\n");
break;
case 0x02:
- //verboselog(machine(), 2, " Primitive Function: Draw To FB\n" );
+ LOGMASKED(LOG_REX3, " Primitive Function: Draw To FB\n");
break;
case 0x03:
- //verboselog(machine(), 2, " Primitive Function: Copy FB To FB\n" );
+ LOGMASKED(LOG_REX3, " Primitive Function: Copy FB To FB\n");
break;
}
- switch( ( data & 0x0000001c ) >> 2 )
+ switch ((data & 0x0000001c) >> 2)
{
case 0x00:
- //verboselog(machine(), 2, " Addressing Mode: Span/Point\n" );
+ LOGMASKED(LOG_REX3, " Addressing Mode: Span/Point\n");
break;
case 0x01:
- //verboselog(machine(), 2, " Addressing Mode: Block\n" );
+ LOGMASKED(LOG_REX3, " Addressing Mode: Block\n");
break;
case 0x02:
- //verboselog(machine(), 2, " Addressing Mode: Bresenham Line, Integer Endpoints\n" );
+ LOGMASKED(LOG_REX3, " Addressing Mode: Bresenham Line, Integer Endpoints\n");
break;
case 0x03:
- //verboselog(machine(), 2, " Addressing Mode: Bresenham Line, Fractional Endpoints\n" );
+ LOGMASKED(LOG_REX3, " Addressing Mode: Bresenham Line, Fractional Endpoints\n");
break;
case 0x04:
- //verboselog(machine(), 2, " Addressing Mode: AA Bresenham Line\n" );
+ LOGMASKED(LOG_REX3, " Addressing Mode: AA Bresenham Line\n");
break;
default:
- //verboselog(machine(), 2, " Unknown Addressing Mode: %02x\n", ( data & 0x0000001c ) >> 2 );
+ LOGMASKED(LOG_REX3 | LOG_UNKNOWN, " Unknown Addressing Mode: %02x\n", (data & 0x0000001c) >> 2);
break;
}
- //verboselog(machine(), 2, " Iterator Setup: %d\n", ( data & 0x00000020 ) >> 5 );
- //verboselog(machine(), 2, " RGB/CI Draw Source: %d\n", ( data & 0x00000040 ) >> 6 );
- //verboselog(machine(), 2, " Alpha Draw Source: %d\n", ( data & 0x00000080 ) >> 7 );
- //verboselog(machine(), 2, " Stop On X: %d\n", ( data & 0x00000100 ) >> 8 );
- //verboselog(machine(), 2, " Stop On Y: %d\n", ( data & 0x00000200 ) >> 9 );
- //verboselog(machine(), 2, " Skip Start Point: %d\n", ( data & 0x00000400 ) >> 10 );
- //verboselog(machine(), 2, " Skip End Point: %d\n", ( data & 0x00000800 ) >> 11 );
- //verboselog(machine(), 2, " Enable Patterning: %d\n", ( data & 0x00001000 ) >> 12 );
- //verboselog(machine(), 2, " Enable Stippling: %d\n", ( data & 0x00002000 ) >> 13 );
- //verboselog(machine(), 2, " Stipple Advance: %d\n", ( data & 0x00004000 ) >> 14 );
- //verboselog(machine(), 2, " Limit Draw To 32px: %d\n", ( data & 0x00008000 ) >> 15 );
- //verboselog(machine(), 2, " Z Opaque Stipple %d\n", ( data & 0x00010000 ) >> 16 );
- //verboselog(machine(), 2, " LS Opaque Stipple: %d\n", ( data & 0x00020000 ) >> 17 );
- //verboselog(machine(), 2, " Enable Lin. Shade: %d\n", ( data & 0x00040000 ) >> 18 );
- //verboselog(machine(), 2, " Left-Right Only: %d\n", ( data & 0x00080000 ) >> 19 );
- //verboselog(machine(), 2, " Offset by XYMove: %d\n", ( data & 0x00100000 ) >> 20 );
- //verboselog(machine(), 2, " Enable CI Clamping: %d\n", ( data & 0x00200000 ) >> 21 );
- //verboselog(machine(), 2, " Enable End Filter: %d\n", ( data & 0x00400000 ) >> 22 );
- //verboselog(machine(), 2, " Enable Y+2 Stride: %d\n", ( data & 0x00800000 ) >> 23 );
- m_REX3.nDrawMode0 = data;
- break;
- case 0x0804/4:
- //verboselog(machine(), 2, "REX3 Draw Mode 0 Write: %08x\n", data );
- m_REX3.nDrawMode0 = data;
+ LOGMASKED(LOG_REX3, " Iterator Setup: %d\n", BIT(data, 5));
+ LOGMASKED(LOG_REX3, " RGB/CI Draw Source: %d\n", BIT(data, 6));
+ LOGMASKED(LOG_REX3, " Alpha Draw Source: %d\n", BIT(data, 7));
+ LOGMASKED(LOG_REX3, " Stop On X: %d\n", BIT(data, 8));
+ LOGMASKED(LOG_REX3, " Stop On Y: %d\n", BIT(data, 9));
+ LOGMASKED(LOG_REX3, " Skip Start Point: %d\n", BIT(data, 10));
+ LOGMASKED(LOG_REX3, " Skip End Point: %d\n", BIT(data, 11));
+ LOGMASKED(LOG_REX3, " Enable Patterning: %d\n", BIT(data, 12));
+ LOGMASKED(LOG_REX3, " Enable Stippling: %d\n", BIT(data, 13));
+ LOGMASKED(LOG_REX3, " Stipple Advance: %d\n", BIT(data, 14));
+ LOGMASKED(LOG_REX3, " Limit Draw To 32px: %d\n", BIT(data, 15));
+ LOGMASKED(LOG_REX3, " Z Opaque Stipple %d\n", BIT(data, 16));
+ LOGMASKED(LOG_REX3, " LS Opaque Stipple: %d\n", BIT(data, 17));
+ LOGMASKED(LOG_REX3, " Enable Lin. Shade: %d\n", BIT(data, 18));
+ LOGMASKED(LOG_REX3, " Left-Right Only: %d\n", BIT(data, 19));
+ LOGMASKED(LOG_REX3, " Offset by XYMove: %d\n", BIT(data, 20));
+ LOGMASKED(LOG_REX3, " Enable CI Clamping: %d\n", BIT(data, 21));
+ LOGMASKED(LOG_REX3, " Enable End Filter: %d\n", BIT(data, 22));
+ LOGMASKED(LOG_REX3, " Enable Y+2 Stride: %d\n", BIT(data, 23));
+ m_rex3.m_draw_mode0 = data;
break;
case 0x0008/4:
- case 0x0808/4:
- //verboselog(machine(), 2, "REX3 Line Stipple Mode Write: %08x\n", data );
- m_REX3.nLSMode = data & 0x0fffffff;
+ LOGMASKED(LOG_REX3, "REX3 Line Stipple Mode Write: %08x\n", data);
+ m_rex3.m_ls_mode = data & 0xfffffff;
break;
case 0x000C/4:
- case 0x080c/4:
- //verboselog(machine(), 2, "REX3 Line Stipple Pattern Write: %08x\n", data );
- m_REX3.nLSPattern = data;
+ LOGMASKED(LOG_REX3, "REX3 Line Stipple Pattern Write: %08x\n", data);
+ m_rex3.m_ls_pattern = data;
break;
case 0x0010/4:
- case 0x0810/4:
- //verboselog(machine(), 2, "REX3 Line Stipple Pattern (Save) Write: %08x\n", data );
- m_REX3.nLSPatSave = data;
+ LOGMASKED(LOG_REX3, "REX3 Line Stipple Pattern (Save) Write: %08x\n", data);
+ m_rex3.m_ls_pattern_saved = data;
break;
case 0x0014/4:
- case 0x0814/4:
- //verboselog(machine(), 2, "REX3 Pattern Register Write: %08x\n", data );
- m_REX3.nZPattern = data;
+ LOGMASKED(LOG_REX3, "REX3 Pattern Register Write: %08x\n", data);
+ m_rex3.m_z_pattern = data;
if (offset & 0x00000200)
{
- DoREX3Command();
+ do_rex3_command();
}
break;
case 0x0018/4:
- case 0x0818/4:
- //verboselog(machine(), 2, "REX3 Opaque Pattern / Blendfunc Dest Color Write: %08x\n", data );
- m_REX3.nColorBack = data;
+ LOGMASKED(LOG_REX3, "REX3 Opaque Pattern / Blendfunc Dest Color Write: %08x\n", data);
+ m_rex3.m_color_back = data;
break;
case 0x001c/4:
- case 0x081c/4:
- //verboselog(machine(), 2, "REX3 VRAM Fastclear Color Write: %08x\n", data );
- m_REX3.nColorVRAM = data;
+ LOGMASKED(LOG_REX3, "REX3 VRAM Fastclear Color Write: %08x\n", data);
+ m_rex3.m_color_vram = data;
break;
case 0x0020/4:
- case 0x0820/4:
- //verboselog(machine(), 2, "REX3 AFUNCTION Reference Alpha Write: %08x\n", data );
- m_REX3.nAlphaRef = data & 0x000000ff;
+ LOGMASKED(LOG_REX3, "REX3 AFUNCTION Reference Alpha Write: %08x\n", data);
+ m_rex3.m_alpha_ref = (uint8_t)data;
break;
case 0x0024/4:
- case 0x0824/4:
- //verboselog(machine(), 2, "REX3 Stall GFIFO Write: %08x\n", data );
+ LOGMASKED(LOG_REX3, "REX3 Stall GFIFO Write: %08x\n", data);
break;
case 0x0028/4:
- case 0x0828/4:
- //verboselog(machine(), 2, "REX3 Screenmask 0 X Min/Max Write: %08x\n", data );
- m_REX3.nSMask0X = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 0 X Min/Max Write: %08x\n", data);
+ m_rex3.m_smask0_x = data;
break;
case 0x002c/4:
- case 0x082c/4:
- //verboselog(machine(), 2, "REX3 Screenmask 0 Y Min/Max Write: %08x\n", data );
- m_REX3.nSMask0Y = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 0 Y Min/Max Write: %08x\n", data);
+ m_rex3.m_smask0_y = data;
break;
case 0x0030/4:
- case 0x0830/4:
- //verboselog(machine(), 2, "REX3 Line/Span Setup Write: %08x\n", data );
- m_REX3.nSetup = data;
+ LOGMASKED(LOG_REX3, "REX3 Line/Span Setup Write: %08x\n", data);
+ m_rex3.m_setup = data;
break;
case 0x0034/4:
- case 0x0834/4:
- //verboselog(machine(), 2, "REX3 ZPattern Enable Write: %08x\n", data );
- m_REX3.nStepZ = data;
+ LOGMASKED(LOG_REX3, "REX3 ZPattern Enable Write: %08x\n", data);
+ m_rex3.m_step_z = data;
break;
case 0x0038/4:
- case 0x0838/4:
- //verboselog(machine(), 2, "REX3 Update LSPATTERN/LSRCOUNT\n" );
- m_REX3.nLSPattern = m_REX3.nLSPatSave;
+ LOGMASKED(LOG_REX3, "REX3 Update LSPATTERN/LSRCOUNT\n");
+ m_rex3.m_ls_pattern = m_rex3.m_ls_pattern_saved;
break;
case 0x003c/4:
- case 0x083c/4:
- //verboselog(machine(), 2, "REX3 Update LSPATSAVE/LSRCNTSAVE\n" );
- m_REX3.nLSPatSave = m_REX3.nLSPattern;
+ LOGMASKED(LOG_REX3, "REX3 Update LSPATSAVE/LSRCNTSAVE\n");
+ m_rex3.m_ls_pattern_saved = m_rex3.m_ls_pattern;
break;
case 0x0100/4:
- case 0x0900/4:
- //verboselog(machine(), 2, "REX3 XStart Write: %08x\n", data );
- m_REX3.nXStart = data & ( 0x0000fffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 XStart Write: %08x\n", data);
+ m_rex3.m_x_start = data & (0x0000fffff << 7);
break;
case 0x0104/4:
- case 0x0904/4:
- //verboselog(machine(), 2, "REX3 YStart Write: %08x\n", data );
- m_REX3.nYStart = data & ( 0x0000fffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 YStart Write: %08x\n", data);
+ m_rex3.m_y_start = data & (0x0000fffff << 7);
break;
case 0x0108/4:
- case 0x0908/4:
- //verboselog(machine(), 2, "REX3 XEnd Write: %08x\n", data );
- m_REX3.nXEnd = data & ( 0x0000fffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 XEnd Write: %08x\n", data);
+ m_rex3.m_x_end = data & (0x0000fffff << 7);
break;
case 0x010c/4:
- case 0x090c/4:
- //verboselog(machine(), 2, "REX3 YEnd Write: %08x\n", data );
- m_REX3.nYEnd = data & ( 0x0000fffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 YEnd Write: %08x\n", data);
+ m_rex3.m_y_end = data & (0x0000fffff << 7);
break;
case 0x0110/4:
- case 0x0910/4:
- //verboselog(machine(), 2, "REX3 XSave Write: %08x\n", data );
- m_REX3.nXSave = data & 0x0000ffff;
- m_REX3.nXStartI = m_REX3.nXSave & 0x0000ffff;
+ LOGMASKED(LOG_REX3, "REX3 XSave Write: %08x\n", data);
+ m_rex3.m_x_save = (uint16_t)data;
+ m_rex3.m_x_start_i = (uint16_t)m_rex3.m_x_save;
break;
case 0x0114/4:
- case 0x0914/4:
- //verboselog(machine(), 2, "REX3 XYMove Write: %08x\n", data );
- m_REX3.nXYMove = data;
+ LOGMASKED(LOG_REX3, "REX3 XYMove Write: %08x\n", data);
+ m_rex3.m_xy_move = data;
if (offset & 0x00000200)
{
- DoREX3Command();
+ do_rex3_command();
}
break;
case 0x0118/4:
- case 0x0918/4:
- //verboselog(machine(), 2, "REX3 Bresenham D Write: %08x\n", data );
- m_REX3.nBresD = data & 0x07ffffff;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham D Write: %08x\n", data);
+ m_rex3.m_bres_d = data & 0x7ffffff;
break;
case 0x011c/4:
- case 0x091c/4:
- //verboselog(machine(), 2, "REX3 Bresenham S1 Write: %08x\n", data );
- m_REX3.nBresS1 = data & 0x0001ffff;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham S1 Write: %08x\n", data);
+ m_rex3.m_bres_s1 = data & 0x1ffff;
break;
case 0x0120/4:
- case 0x0920/4:
- //verboselog(machine(), 2, "REX3 Bresenham Octant & Incr1 Write: %08x\n", data );
- m_REX3.nBresOctInc1 = data & 0x070fffff;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham Octant & Incr1 Write: %08x\n", data);
+ m_rex3.m_bres_octant_inc1 = data & 0x70fffff;
break;
case 0x0124/4:
- case 0x0924/4:
- //verboselog(machine(), 2, "REX3 Bresenham Octant Rounding Mode & Incr2 Write: %08x\n", data );
- m_REX3.nBresRndInc2 = data & 0xff1fffff;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham Octant Rounding Mode & Incr2 Write: %08x\n", data);
+ m_rex3.m_bres_round_inc2 = data & 0xff1fffff;
break;
case 0x0128/4:
- case 0x0928/4:
- //verboselog(machine(), 2, "REX3 Bresenham E1 Write: %08x\n", data );
- m_REX3.nBresE1 = data & 0x0000ffff;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham E1 Write: %08x\n", data);
+ m_rex3.m_bres_e1 = (uint16_t)data;
break;
case 0x012c/4:
- case 0x092c/4:
- //verboselog(machine(), 2, "REX3 Bresenham S2 Write: %08x\n", data );
- m_REX3.nBresS2 = data & 0x03ffffff;
+ LOGMASKED(LOG_REX3, "REX3 Bresenham S2 Write: %08x\n", data);
+ m_rex3.m_bres_s2 = data & 0x3ffffff;
break;
case 0x0130/4:
- case 0x0930/4:
- //verboselog(machine(), 2, "REX3 AA Line Weight Table 1/2 Write: %08x\n", data );
- m_REX3.nAWeight0 = data;
+ LOGMASKED(LOG_REX3, "REX3 AA Line Weight Table 1/2 Write: %08x\n", data);
+ m_rex3.m_a_weight0 = data;
break;
case 0x0134/4:
- case 0x0934/4:
- //verboselog(machine(), 2, "REX3 AA Line Weight Table 2/2 Write: %08x\n", data );
- m_REX3.nAWeight1 = data;
+ LOGMASKED(LOG_REX3, "REX3 AA Line Weight Table 2/2 Write: %08x\n", data);
+ m_rex3.m_a_weight1 = data;
break;
case 0x0138/4:
- case 0x0938/4:
- //verboselog(machine(), 2, "REX3 GL XStart Write: %08x\n", data );
- m_REX3.nXStartF = data & ( 0x0000ffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 GL XStart Write: %08x\n", data);
+ m_rex3.m_x_start_f = data & 0x7fff80;
break;
case 0x013c/4:
- case 0x093c/4:
- //verboselog(machine(), 2, "REX3 GL YStart Write: %08x\n", data );
- m_REX3.nYStartF = data & ( 0x0000ffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 GL YStart Write: %08x\n", data);
+ m_rex3.m_y_start_f = data & 0x7fff80;
break;
case 0x0140/4:
- case 0x0940/4:
- //verboselog(machine(), 2, "REX3 GL XEnd Write: %08x\n", data );
- m_REX3.nXEndF = data & ( 0x0000ffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 GL XEnd Write: %08x\n", data);
+ m_rex3.m_x_end_f = data & 0x7fff80;
break;
case 0x0144/4:
- case 0x0944/4:
- //verboselog(machine(), 2, "REX3 GL YEnd Write: %08x\n", data );
- m_REX3.nYEndF = data & ( 0x0000ffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 GL YEnd Write: %08x\n", data);
+ m_rex3.m_y_end_f = data & 0x7fff80;
break;
case 0x0148/4:
- case 0x0948/4:
- //verboselog(machine(), 2, "REX3 XStart (integer) Write: %08x\n", data );
- m_REX3.nXStartI = data & 0x0000ffff;
- m_REX3.nXSave = m_REX3.nXStartI;
- m_REX3.nXStart = 0 | ( ( m_REX3.nXStartI & 0x0000ffff ) << 11 );
+ LOGMASKED(LOG_REX3, "REX3 XStart (integer) Write: %08x\n", data);
+ m_rex3.m_x_start_i = (uint16_t)data;
+ m_rex3.m_x_save = m_rex3.m_x_start_i;
+ m_rex3.m_x_start = ((m_rex3.m_x_start_i & 0x0000ffff) << 11);
break;
case 0x014c/4:
- case 0x094c/4:
- //verboselog(machine(), 2, "REX3 GL XEnd (copy) Write: %08x\n", data );
- m_REX3.nXEndF = data & ( 0x0000ffff << 7 );
+ LOGMASKED(LOG_REX3, "REX3 GL XEnd (copy) Write: %08x\n", data);
+ m_rex3.m_x_end_f = data & ( 0x0000ffff << 7 );
break;
case 0x0150/4:
- case 0x0950/4:
- //verboselog(machine(), 2, "REX3 XYStart (integer) Write: %08x\n", data );
- m_REX3.nXYStartI = data;
- m_REX3.nXStartI = ( data & 0xffff0000 ) >> 16;
- m_REX3.nXSave = m_REX3.nXStartI;
- m_REX3.nXStart = 0 | ( ( m_REX3.nXYStartI & 0xffff0000 ) >> 5 );
- m_REX3.nYStart = 0 | ( ( m_REX3.nXYStartI & 0x0000ffff ) << 11 );
+ LOGMASKED(LOG_REX3, "REX3 XYStart (integer) Write: %08x\n", data);
+ m_rex3.m_xy_start_i = data;
+ m_rex3.m_x_start_i = data >> 16;
+ m_rex3.m_x_save = m_rex3.m_x_start_i;
+ m_rex3.m_x_start = ((m_rex3.m_xy_start_i & 0xffff0000) >> 5);
+ m_rex3.m_y_start = ((m_rex3.m_xy_start_i & 0x0000ffff) << 11);
break;
case 0x0154/4:
- case 0x0954/4:
- //verboselog(machine(), 2, "REX3 XYEnd (integer) Write: %08x\n", data );
- m_REX3.nXYEndI = data;
- m_REX3.nXEnd = 0 | ( ( m_REX3.nXYEndI & 0xffff0000 ) >> 5 );
- m_REX3.nYEnd = 0 | ( ( m_REX3.nXYEndI & 0x0000ffff ) << 11 );
+ LOGMASKED(LOG_REX3, "REX3 XYEnd (integer) Write: %08x\n", data);
+ m_rex3.m_xy_end_i = data;
+ m_rex3.m_x_end = ((m_rex3.m_xy_end_i & 0xffff0000) >> 5);
+ m_rex3.m_y_end = ((m_rex3.m_xy_end_i & 0x0000ffff) << 11);
if (offset & 0x00000200)
{
- DoREX3Command();
+ do_rex3_command();
}
break;
case 0x0158/4:
- case 0x0958/4:
- //verboselog(machine(), 2, "REX3 XStartEnd (integer) Write: %08x\n", data );
- m_REX3.nXStartEndI = data;
- m_REX3.nXYEndI = ( m_REX3.nXYEndI & 0x0000ffff ) | ( ( m_REX3.nXStartEndI & 0x0000ffff ) << 16 );
- m_REX3.nXYStartI = ( m_REX3.nXYStartI & 0x0000ffff ) | ( m_REX3.nXStartEndI & 0xffff0000 );
- m_REX3.nXSave = m_REX3.nXStartI;
- m_REX3.nXStart = 0 | ( ( m_REX3.nXStartEndI & 0xffff0000 ) >> 5 );
- m_REX3.nXEnd = 0 | ( ( m_REX3.nXStartEndI & 0x0000ffff ) << 11 );
+ LOGMASKED(LOG_REX3, "REX3 XStartEnd (integer) Write: %08x\n", data);
+ m_rex3.m_x_start_end_i = data;
+ m_rex3.m_xy_end_i = (uint16_t)m_rex3.m_xy_end_i | ((m_rex3.m_x_start_end_i & 0x0000ffff) << 16);
+ m_rex3.m_xy_start_i = (uint16_t)m_rex3.m_xy_start_i | ( m_rex3.m_x_start_end_i & 0xffff0000);
+ m_rex3.m_x_save = m_rex3.m_x_start_i;
+ m_rex3.m_x_start = ((m_rex3.m_x_start_end_i & 0xffff0000) >> 5);
+ m_rex3.m_x_end = ((m_rex3.m_x_start_end_i & 0x0000ffff) << 11);
break;
case 0x0200/4:
- case 0x0a00/4:
- //verboselog(machine(), 2, "REX3 Red/CI Full State Write: %08x\n", data );
- m_REX3.nColorRed = data & 0x00ffffff;
+ LOGMASKED(LOG_REX3, "REX3 Red/CI Full State Write: %08x\n", data);
+ m_rex3.m_color_red = data & 0xffffff;
break;
case 0x0204/4:
- case 0x0a04/4:
- //verboselog(machine(), 2, "REX3 Alpha Full State Write: %08x\n", data );
- m_REX3.nColorAlpha = data & 0x000fffff;
+ LOGMASKED(LOG_REX3, "REX3 Alpha Full State Write: %08x\n", data);
+ m_rex3.m_color_alpha = data & 0xfffff;
break;
case 0x0208/4:
- case 0x0a08/4:
- //verboselog(machine(), 2, "REX3 Green Full State Write: %08x\n", data );
- m_REX3.nColorGreen = data & 0x000fffff;
+ LOGMASKED(LOG_REX3, "REX3 Green Full State Write: %08x\n", data);
+ m_rex3.m_color_green = data & 0xfffff;
break;
case 0x020c/4:
- case 0x0a0c/4:
- //verboselog(machine(), 2, "REX3 Blue Full State Write: %08x\n", data );
- m_REX3.nColorBlue = data & 0x000fffff;
+ LOGMASKED(LOG_REX3, "REX3 Blue Full State Write: %08x\n", data);
+ m_rex3.m_color_blue = data & 0xfffff;
break;
case 0x0210/4:
- case 0x0a10/4:
- //verboselog(machine(), 2, "REX3 Red/CI Slope Write: %08x\n", data );
+ {
+ LOGMASKED(LOG_REX3, "REX3 Red/CI Slope Write: %08x\n", data);
data &= 0x807fffff;
- switch( data & 0x80000000 )
+ uint32_t temp = 0;
+ if (BIT(data, 31))
{
- case 0x00000000:
- nTemp = data & 0x007fffff;
- break;
- case 0x80000000:
- nTemp = 0x00800000 - ( data & 0x007fffff );
- nTemp |= 0x00800000;
- break;
+ temp = 0x00800000 - (data & 0x7fffff);
+ temp |= 0x00800000;
+ }
+ else
+ {
+ temp = data & 0x7fffff;
}
- m_REX3.nSlopeRed = nTemp;
+ m_rex3.m_slope_red = temp;
break;
+ }
case 0x0214/4:
- case 0x0a14/4:
- //verboselog(machine(), 2, "REX3 Alpha Slope Write: %08x\n", data );
+ {
+ LOGMASKED(LOG_REX3, "REX3 Alpha Slope Write: %08x\n", data);
data &= 0x8007ffff;
- switch( data & 0x80000000 )
+ uint32_t temp = 0;
+ if (BIT(data, 31))
{
- case 0x00000000:
- nTemp = data & 0x0007ffff;
- break;
- case 0x80000000:
- nTemp = 0x00080000 - ( data & 0x0007ffff );
- nTemp |= 0x00080000;
- break;
+ temp = 0x00080000 - (data & 0x7ffff);
+ temp |= 0x00080000;
+ }
+ else
+ {
+ temp = data & 0x7ffff;
}
- m_REX3.nSlopeAlpha = nTemp;
+ m_rex3.m_slope_alpha = temp;
break;
+ }
case 0x0218/4:
- case 0x0a18/4:
- //verboselog(machine(), 2, "REX3 Green Slope Write: %08x\n", data );
+ {
+ LOGMASKED(LOG_REX3, "REX3 Green Slope Write: %08x\n", data);
data &= 0x8007ffff;
- switch( data & 0x80000000 )
+ uint32_t temp = 0;
+ if (BIT(data, 31))
{
- case 0x00000000:
- nTemp = data & 0x0007ffff;
- break;
- case 0x80000000:
- nTemp = 0x00080000 - ( data & 0x0007ffff );
- nTemp |= 0x00080000;
- break;
+ temp = 0x00080000 - (data & 0x7ffff);
+ temp |= 0x00080000;
+ }
+ else
+ {
+ temp = data & 0x7ffff;
}
- m_REX3.nSlopeGreen = nTemp;
+ m_rex3.m_slope_green = temp;
break;
+ }
case 0x021c/4:
- case 0x0a1c/4:
- //verboselog(machine(), 2, "REX3 Blue Slope Write: %08x\n", data );
+ {
+ LOGMASKED(LOG_REX3, "REX3 Blue Slope Write: %08x\n", data);
data &= 0x8007ffff;
- switch( data & 0x80000000 )
+ uint32_t temp = 0;
+ if (BIT(data, 31))
{
- case 0x00000000:
- nTemp = data & 0x0007ffff;
- break;
- case 0x80000000:
- nTemp = 0x00080000 - ( data & 0x0007ffff );
- nTemp |= 0x00080000;
- break;
+ temp = 0x00080000 - (data & 0x7ffff);
+ temp |= 0x00080000;
}
- m_REX3.nSlopeBlue = nTemp;
+ else
+ {
+ temp = data & 0x7ffff;
+ }
+ m_rex3.m_slope_blue = temp;
break;
+ }
case 0x0220/4:
- case 0x0a20/4:
- //verboselog(machine(), 2, "REX3 Write Mask Write: %08x\n", data );
- m_REX3.nWriteMask = data & 0x00ffffff;
+ LOGMASKED(LOG_REX3, "REX3 Write Mask Write: %08x\n", data);
+ m_rex3.m_write_mask = data & 0xffffff;
break;
case 0x0224/4:
- case 0x0a24/4:
- //verboselog(machine(), 2, "REX3 Packed Color Fractions Write: %08x\n", data );
- m_REX3.nZeroFract = data;
+ LOGMASKED(LOG_REX3, "REX3 Packed Color Fractions Write: %08x\n", data);
+ m_rex3.m_zero_fract = data;
break;
case 0x0228/4:
- case 0x0a28/4:
- //verboselog(machine(), 2, "REX3 Color Index Zeros Overflow Write: %08x\n", data );
- m_REX3.nZeroOverflow = data;
+ LOGMASKED(LOG_REX3, "REX3 Color Index Zeros Overflow Write: %08x\n", data);
+ m_rex3.m_zero_overflow = data;
break;
case 0x022c/4:
- case 0x0a2c/4:
- //verboselog(machine(), 2, "REX3 Red/CI Slope (copy) Write: %08x\n", data );
- m_REX3.nSlopeRed = data;
+ LOGMASKED(LOG_REX3, "REX3 Red/CI Slope (copy) Write: %08x\n", data);
+ m_rex3.m_slope_red = data;
break;
case 0x0230/4:
- case 0x0a30/4:
//verboselog(machine(), 3, "REX3 Host Data Port MSW Write: %08x\n", data );
- m_REX3.nHostDataPortMSW = data;
+ m_rex3.m_host_dataport_msw = data;
if (offset & 0x00000200)
{
- DoREX3Command();
+ do_rex3_command();
}
break;
case 0x0234/4:
- case 0x0a34/4:
- //verboselog(machine(), 2, "REX3 Host Data Port LSW Write: %08x\n", data );
- m_REX3.nHostDataPortLSW = data;
+ LOGMASKED(LOG_REX3, "REX3 Host Data Port LSW Write: %08x\n", data);
+ m_rex3.m_host_dataport_lsw = data;
break;
case 0x0238/4:
- case 0x0a38/4:
- //verboselog(machine(), 2, "REX3 Display Control Bus Mode Write: %08x\n", data );
- switch( data & 0x00000003 )
+ LOGMASKED(LOG_REX3, "REX3 Display Control Bus Mode Write: %08x\n", data);
+ switch (data & 3)
{
case 0x00:
- //verboselog(machine(), 2, " Transfer Width: 4 bytes\n" );
- m_REX3.nXFerWidth = 4;
+ LOGMASKED(LOG_REX3, " Transfer Width: 4 bytes\n");
+ m_rex3.m_xfer_width = 4;
break;
case 0x01:
- //verboselog(machine(), 2, " Transfer Width: 1 bytes\n" );
- m_REX3.nXFerWidth = 1;
+ LOGMASKED(LOG_REX3, " Transfer Width: 1 bytes\n");
+ m_rex3.m_xfer_width = 1;
break;
case 0x02:
- //verboselog(machine(), 2, " Transfer Width: 2 bytes\n" );
- m_REX3.nXFerWidth = 2;
+ LOGMASKED(LOG_REX3, " Transfer Width: 2 bytes\n");
+ m_rex3.m_xfer_width = 2;
break;
case 0x03:
- //verboselog(machine(), 2, " Transfer Width: 3 bytes\n" );
- m_REX3.nXFerWidth = 3;
+ LOGMASKED(LOG_REX3, " Transfer Width: 3 bytes\n");
+ m_rex3.m_xfer_width = 3;
break;
}
- //verboselog(machine(), 2, " DCB Reg Select Adr: %d\n", ( data & 0x00000070 ) >> 4 );
- //verboselog(machine(), 2, " DCB Slave Address: %d\n", ( data & 0x00000780 ) >> 7 );
-// //verboselog(machine(), 2, " Use Sync XFer ACK: %d\n", ( data & 0x00000800 ) >> 11 );
-// //verboselog(machine(), 2, " Use Async XFer ACK: %d\n", ( data & 0x00001000 ) >> 12 );
-// //verboselog(machine(), 2, " GIO CLK Cycle Width: %d\n", ( data & 0x0003e000 ) >> 13 );
-// //verboselog(machine(), 2, " GIO CLK Cycle Hold: %d\n", ( data & 0x007c0000 ) >> 18 );
-// //verboselog(machine(), 2, " GIO CLK Cycle Setup: %d\n", ( data & 0x0f800000 ) >> 23 );
-// //verboselog(machine(), 2, " Swap Byte Ordering: %d\n", ( data & 0x10000000 ) >> 28 );
- m_REX3.nDCBRegSelect = ( data & 0x00000070 ) >> 4;
- m_REX3.nDCBSlvSelect = ( data & 0x00000780 ) >> 7;
- m_REX3.nDCBMode = data & 0x1fffffff;
+ LOGMASKED(LOG_REX3, " DCB Reg Select Adr: %d\n", (data & 0x00000070 ) >> 4);
+ LOGMASKED(LOG_REX3, " DCB Slave Address: %d\n", (data & 0x00000780 ) >> 7);
+ LOGMASKED(LOG_REX3, " Use Sync XFer ACK: %d\n", (data & 0x00000800 ) >> 11);
+ LOGMASKED(LOG_REX3, " Use Async XFer ACK: %d\n", (data & 0x00001000 ) >> 12);
+ LOGMASKED(LOG_REX3, " GIO CLK Cycle Width: %d\n", (data & 0x0003e000 ) >> 13);
+ LOGMASKED(LOG_REX3, " GIO CLK Cycle Hold: %d\n", (data & 0x007c0000 ) >> 18);
+ LOGMASKED(LOG_REX3, " GIO CLK Cycle Setup: %d\n", (data & 0x0f800000 ) >> 23);
+ LOGMASKED(LOG_REX3, " Swap Byte Ordering: %d\n", (data & 0x10000000 ) >> 28);
+ m_rex3.m_dcb_reg_select = (data & 0x00000070) >> 4;
+ m_rex3.m_dcb_slave_select = (data & 0x00000780) >> 7;
+ m_rex3.m_dcb_mode = data & 0x1fffffff;
break;
case 0x0240/4:
- case 0x0a40/4:
- m_REX3.nDCBDataMSW = data;
- switch( m_REX3.nDCBSlvSelect )
+ m_rex3.m_dcb_data_msw = data;
+ switch (m_rex3.m_dcb_slave_select)
{
case 0x00:
vc2_w(space, 0, data, mem_mask);
@@ -1628,71 +1612,70 @@ WRITE32_MEMBER( newport_video_device::rex3_w )
xmap1_w(space, 0, data, mem_mask);
break;
default:
- //verboselog(machine(), 2, "REX3 Display Control Bus Data MSW Write: %08x\n", data );
+ LOGMASKED(LOG_REX3 | LOG_UNKNOWN, "REX3 Display Control Bus Data MSW Write: %08x\n", data);
break;
}
break;
case 0x0244/4:
- case 0x0a44/4:
- //verboselog(machine(), 2, "REX3 Display Control Bus Data LSW Write: %08x\n", data );
- m_REX3.nDCBDataLSW = data;
+ LOGMASKED(LOG_REX3, "REX3 Display Control Bus Data LSW Write: %08x\n", data);
+ m_rex3.m_dcb_data_lsw = data;
break;
case 0x1300/4:
- //verboselog(machine(), 2, "REX3 Screenmask 1 X Min/Max Write: %08x\n", data );
- m_REX3.nSMask1X = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 1 X Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask1_x = data;
break;
case 0x1304/4:
- //verboselog(machine(), 2, "REX3 Screenmask 1 Y Min/Max Write: %08x\n", data );
- m_REX3.nSMask1Y = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 1 Y Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask1_y = data;
break;
case 0x1308/4:
- //verboselog(machine(), 2, "REX3 Screenmask 2 X Min/Max Write: %08x\n", data );
- m_REX3.nSMask2X = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 2 X Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask2_x = data;
break;
case 0x130c/4:
- //verboselog(machine(), 2, "REX3 Screenmask 2 Y Min/Max Write: %08x\n", data );
- m_REX3.nSMask2Y = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 2 Y Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask2_y = data;
break;
case 0x1310/4:
- //verboselog(machine(), 2, "REX3 Screenmask 3 X Min/Max Write: %08x\n", data );
- m_REX3.nSMask3X = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 3 X Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask3_x = data;
break;
case 0x1314/4:
- //verboselog(machine(), 2, "REX3 Screenmask 3 Y Min/Max Write: %08x\n", data );
- m_REX3.nSMask3Y = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 3 Y Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask3_y = data;
break;
case 0x1318/4:
- //verboselog(machine(), 2, "REX3 Screenmask 4 X Min/Max Write: %08x\n", data );
- m_REX3.nSMask4X = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 4 X Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask4_x = data;
break;
case 0x131c/4:
- //verboselog(machine(), 2, "REX3 Screenmask 4 Y Min/Max Write: %08x\n", data );
- m_REX3.nSMask4Y = data;
+ LOGMASKED(LOG_REX3, "REX3 Screenmask 4 Y Min/Max Write: %08x\n", data);
+ m_rex3.m_s_mask4_y = data;
break;
case 0x1320/4:
- //verboselog(machine(), 2, "REX3 Top of Screen Scanline Write: %08x\n", data );
- m_REX3.nTopScanline = data & 0x000003ff;
+ LOGMASKED(LOG_REX3, "REX3 Top of Screen Scanline Write: %08x\n", data);
+ m_rex3.m_top_scanline = data & 0x3ff;
break;
case 0x1324/4:
- //verboselog(machine(), 2, "REX3 Clipping Mode Write: %08x\n", data );
- m_REX3.nXYWin = data;
+ LOGMASKED(LOG_REX3, "REX3 XY Window Write: %08x\n", data);
+ m_rex3.m_xy_window = data;
break;
case 0x1328/4:
- //verboselog(machine(), 2, "REX3 Clipping Mode Write: %08x\n", data );
- m_REX3.nClipMode = data & 0x00001fff;
+ LOGMASKED(LOG_REX3, "REX3 Clipping Mode Write: %08x\n", data);
+ m_rex3.m_clip_mode = data & 0x1fff;
break;
case 0x132c/4:
- //verboselog(machine(), 2, "Request GFIFO Stall\n" );
+ LOGMASKED(LOG_REX3, "Request GFIFO Stall\n");
break;
case 0x1330/4:
- //verboselog(machine(), 2, "REX3 Config Write: %08x\n", data );
- m_REX3.nConfig = data & 0x001fffff;
+ LOGMASKED(LOG_REX3, "REX3 Config Write: %08x\n", data);
+ m_rex3.m_config = data & 0x1fffff;
break;
case 0x1340/4:
- //verboselog(machine(), 2, "Reset DCB Bus and Flush BFIFO\n" );
+ LOGMASKED(LOG_REX3, "Reset DCB Bus and Flush BFIFO\n");
break;
default:
- //verboselog(machine(), 2, "Unknown REX3 Write: %08x (%08x): %08x\n", 0xbf0f0000 + ( offset << 2 ), mem_mask, data );
+ LOGMASKED(LOG_REX3 | LOG_UNKNOWN, "Unknown REX3 Write: %08x (%08x): %08x\n", 0xbf0f0000 + (offset << 2), mem_mask, data);
break;
}
}
diff --git a/src/mame/video/newport.h b/src/mame/video/newport.h
index b1ff724d607..1c362b80974 100644
--- a/src/mame/video/newport.h
+++ b/src/mame/video/newport.h
@@ -9,21 +9,29 @@
#pragma once
+#include "cpu/mips/mips3.h"
+#include "machine/ioc2.h"
+
class newport_video_device : public device_t
{
public:
- newport_video_device(const machine_config &mconfig, const char *tag, device_t *owner)
+ template <typename T, typename U>
+ newport_video_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag, U &&ioc2_tag)
: newport_video_device(mconfig, tag, owner, (uint32_t)0) // TODO: Use actual pixel clock
{
+ m_maincpu.set_tag(std::forward<T>(cpu_tag));
+ m_ioc2.set_tag(std::forward<U>(ioc2_tag));
}
newport_video_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_READ32_MEMBER( rex3_r );
- DECLARE_WRITE32_MEMBER( rex3_w );
+ DECLARE_READ32_MEMBER(rex3_r);
+ DECLARE_WRITE32_MEMBER(rex3_w);
uint32_t screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ DECLARE_WRITE_LINE_MEMBER(vblank_w);
+
protected:
// device-level overrides
virtual void device_start() override;
@@ -44,129 +52,145 @@ private:
DCR_CURSOR_SIZE_64 = 1
};
- struct VC2_t
+ struct vc2_t
{
- uint16_t nRegister[0x21];
- uint16_t nRAM[0x8000];
- uint8_t nRegIdx;
- uint16_t nRegData;
+ uint16_t m_vid_entry;
+ uint16_t m_cursor_entry;
+ uint16_t m_cursor_x;
+ uint16_t m_cursor_y;
+ uint16_t m_cur_cursor_x;
+ uint16_t m_did_entry;
+ uint16_t m_scanline_len;
+ uint16_t m_ram_addr;
+ uint16_t m_vt_frame_ptr;
+ uint16_t m_vt_line_ptr;
+ uint16_t m_vt_line_run;
+ uint16_t m_vt_line_count;
+ uint16_t m_cursor_table_ptr;
+ uint16_t m_work_cursor_y;
+ uint16_t m_did_frame_ptr;
+ uint16_t m_did_line_ptr;
+ uint16_t m_display_ctrl;
+ uint16_t m_config;
+ uint16_t m_ram[0x8000];
+ uint8_t m_reg_idx;
+ uint16_t m_reg_data;
};
- struct XMAP_t
+ struct xmap_t
{
- uint32_t nRegister[0x08];
- uint32_t nModeTable[0x20];
+ uint32_t m_config;
+ uint32_t m_revision;
+ uint32_t m_entries;
+ uint32_t m_cursor_cmap;
+ uint32_t m_popup_cmap;
+ uint32_t m_mode_table_idx;
+ uint32_t m_mode_table[0x20];
};
- struct REX3_t
+ struct rex3_t
{
- uint32_t nDrawMode1;
- uint32_t nDrawMode0;
- uint32_t nLSMode;
- uint32_t nLSPattern;
- uint32_t nLSPatSave;
- uint32_t nZPattern;
- uint32_t nColorBack;
- uint32_t nColorVRAM;
- uint32_t nAlphaRef;
- //uint32_t nStall0;
- uint32_t nSMask0X;
- uint32_t nSMask0Y;
- uint32_t nSetup;
- uint32_t nStepZ;
- uint32_t nXStart;
- uint32_t nYStart;
- uint32_t nXEnd;
- uint32_t nYEnd;
- uint32_t nXSave;
- uint32_t nXYMove;
- uint32_t nBresD;
- uint32_t nBresS1;
- uint32_t nBresOctInc1;
- uint32_t nBresRndInc2;
- uint32_t nBresE1;
- uint32_t nBresS2;
- uint32_t nAWeight0;
- uint32_t nAWeight1;
- uint32_t nXStartF;
- uint32_t nYStartF;
- uint32_t nXEndF;
- uint32_t nYEndF;
- uint32_t nXStartI;
- //uint32_t nYEndF1;
- uint32_t nXYStartI;
- uint32_t nXYEndI;
- uint32_t nXStartEndI;
- uint32_t nColorRed;
- uint32_t nColorAlpha;
- uint32_t nColorGreen;
- uint32_t nColorBlue;
- uint32_t nSlopeRed;
- uint32_t nSlopeAlpha;
- uint32_t nSlopeGreen;
- uint32_t nSlopeBlue;
- uint32_t nWriteMask;
- uint32_t nZeroFract;
- uint32_t nZeroOverflow;
- //uint32_t nColorIndex;
- uint32_t nHostDataPortMSW;
- uint32_t nHostDataPortLSW;
- uint32_t nDCBMode;
- uint32_t nDCBRegSelect;
- uint32_t nDCBSlvSelect;
- uint32_t nDCBDataMSW;
- uint32_t nDCBDataLSW;
- uint32_t nSMask1X;
- uint32_t nSMask1Y;
- uint32_t nSMask2X;
- uint32_t nSMask2Y;
- uint32_t nSMask3X;
- uint32_t nSMask3Y;
- uint32_t nSMask4X;
- uint32_t nSMask4Y;
- uint32_t nTopScanline;
- uint32_t nXYWin;
- uint32_t nClipMode;
- uint32_t nConfig;
- uint32_t nStatus;
- uint8_t nXFerWidth;
-#if 0
- uint32_t nCurrentX;
- uint32_t nCurrentY;
-#endif
- uint32_t nKludge_SkipLine;
+ uint32_t m_draw_mode0;
+ uint32_t m_draw_mode1;
+ uint32_t m_ls_mode;
+ uint32_t m_ls_pattern;
+ uint32_t m_ls_pattern_saved;
+ uint32_t m_z_pattern;
+ uint32_t m_color_back;
+ uint32_t m_color_vram;
+ uint32_t m_alpha_ref;
+ uint32_t m_smask0_x;
+ uint32_t m_smask0_y;
+ uint32_t m_setup;
+ uint32_t m_step_z;
+ uint32_t m_x_start;
+ uint32_t m_y_start;
+ uint32_t m_x_end;
+ uint32_t m_y_end;
+ uint32_t m_x_save;
+ uint32_t m_xy_move;
+ uint32_t m_bres_d;
+ uint32_t m_bres_s1;
+ uint32_t m_bres_octant_inc1;
+ uint32_t m_bres_round_inc2;
+ uint32_t m_bres_e1;
+ uint32_t m_bres_s2;
+ uint32_t m_a_weight0;
+ uint32_t m_a_weight1;
+ uint32_t m_x_start_f;
+ uint32_t m_y_start_f;
+ uint32_t m_x_end_f;
+ uint32_t m_y_end_f;
+ uint32_t m_x_start_i;
+ uint32_t m_xy_start_i;
+ uint32_t m_xy_end_i;
+ uint32_t m_x_start_end_i;
+ uint32_t m_color_red;
+ uint32_t m_color_alpha;
+ uint32_t m_color_green;
+ uint32_t m_color_blue;
+ uint32_t m_slope_red;
+ uint32_t m_slope_alpha;
+ uint32_t m_slope_green;
+ uint32_t m_slope_blue;
+ uint32_t m_write_mask;
+ uint32_t m_zero_fract;
+ uint32_t m_zero_overflow;
+ uint32_t m_host_dataport_msw;
+ uint32_t m_host_dataport_lsw;
+ uint32_t m_dcb_mode;
+ uint32_t m_dcb_reg_select;
+ uint32_t m_dcb_slave_select;
+ uint32_t m_dcb_data_msw;
+ uint32_t m_dcb_data_lsw;
+ uint32_t m_s_mask1_x;
+ uint32_t m_s_mask1_y;
+ uint32_t m_s_mask2_x;
+ uint32_t m_s_mask2_y;
+ uint32_t m_s_mask3_x;
+ uint32_t m_s_mask3_y;
+ uint32_t m_s_mask4_x;
+ uint32_t m_s_mask4_y;
+ uint32_t m_top_scanline;
+ uint32_t m_xy_window;
+ uint32_t m_clip_mode;
+ uint32_t m_config;
+ uint32_t m_status;
+ uint8_t m_xfer_width;
+ uint32_t m_skipline_kludge;
};
- struct CMAP_t
+ struct cmap_t
{
- uint16_t nPaletteIndex;
- uint32_t nPalette[0x10000];
+ uint16_t m_palette_idx;
+ uint32_t m_palette[0x10000];
};
uint32_t get_cursor_pixel(int x, int y);
// internal state
- DECLARE_READ32_MEMBER( cmap0_r );
- DECLARE_WRITE32_MEMBER( cmap0_w );
- DECLARE_READ32_MEMBER( cmap1_r );
- DECLARE_READ32_MEMBER( xmap0_r );
- DECLARE_WRITE32_MEMBER( xmap0_w );
- DECLARE_READ32_MEMBER( xmap1_r );
- DECLARE_WRITE32_MEMBER( xmap1_w );
- DECLARE_READ32_MEMBER( vc2_r );
- DECLARE_WRITE32_MEMBER( vc2_w );
- void DoREX3Command();
-
- VC2_t m_VC2;
- XMAP_t m_XMAP0;
- XMAP_t m_XMAP1;
- REX3_t m_REX3;
+ DECLARE_READ32_MEMBER(cmap0_r);
+ DECLARE_WRITE32_MEMBER(cmap0_w);
+ DECLARE_READ32_MEMBER(cmap1_r);
+ DECLARE_READ32_MEMBER(xmap0_r);
+ DECLARE_WRITE32_MEMBER(xmap0_w);
+ DECLARE_READ32_MEMBER(xmap1_r);
+ DECLARE_WRITE32_MEMBER(xmap1_w);
+ DECLARE_READ32_MEMBER(vc2_r);
+ DECLARE_WRITE32_MEMBER(vc2_w);
+ void do_rex3_command();
+
+ required_device<mips3_device> m_maincpu;
+ required_device<ioc2_device> m_ioc2;
+ vc2_t m_vc2;
+ xmap_t m_xmap0;
+ xmap_t m_xmap1;
+ rex3_t m_rex3;
std::unique_ptr<uint32_t[]> m_base;
- uint8_t m_nDrawGreen;
- CMAP_t m_CMAP0;
+ cmap_t m_cmap0;
};
DECLARE_DEVICE_TYPE(NEWPORT_VIDEO, newport_video_device)