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author AJR <ajrhacker@users.noreply.github.com>2019-11-01 17:27:39 -0400
committer AJR <ajrhacker@users.noreply.github.com>2019-11-01 17:27:39 -0400
commitfc01eb4376f90b3dcbd1ced724ed0096a3d66639 (patch)
tree33d504473521b449d403c413ee967d434648e19c
parent303365e4f247b0573023d34b2abdf53cb96ee07d (diff)
mc68hc11: Preliminary MC68HC11F1 type added (nw)
-rw-r--r--src/devices/cpu/mc68hc11/mc68hc11.cpp73
-rw-r--r--src/devices/cpu/mc68hc11/mc68hc11.h15
2 files changed, 79 insertions, 9 deletions
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.cpp b/src/devices/cpu/mc68hc11/mc68hc11.cpp
index d547c29e598..63e05c66b17 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.cpp
+++ b/src/devices/cpu/mc68hc11/mc68hc11.cpp
@@ -42,24 +42,25 @@ static const int div_tab[4] = { 1, 4, 8, 16 };
DEFINE_DEVICE_TYPE(MC68HC11A1, mc68hc11a1_device, "mc68hc11a1", "Motorola MC68HC11A1")
DEFINE_DEVICE_TYPE(MC68HC11D0, mc68hc11d0_device, "mc68hc11d0", "Motorola MC68HC11D0")
+DEFINE_DEVICE_TYPE(MC68HC11F1, mc68hc11f1_device, "mc68hc11f1", "Motorola MC68HC11F1")
DEFINE_DEVICE_TYPE(MC68HC11K1, mc68hc11k1_device, "mc68hc11k1", "Motorola MC68HC11K1")
DEFINE_DEVICE_TYPE(MC68HC11M0, mc68hc11m0_device, "mc68hc11m0", "Motorola MC68HC11M0")
-mc68hc11_cpu_device::mc68hc11_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int reg_bits, uint16_t internal_ram_size, uint8_t init_value, address_map_constructor reg_map)
+mc68hc11_cpu_device::mc68hc11_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint16_t internal_ram_size, uint16_t reg_block_size, uint8_t init_value, address_map_constructor reg_map)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0)
, m_data_config("data", ENDIANNESS_BIG, 8, internal_ram_size > 1024 ? 11
: internal_ram_size > 512 ? 10
: internal_ram_size > 256 ? 9 : 8, 0, address_map_constructor(FUNC(mc68hc11_cpu_device::ram_map), this))
- , m_io_config("I/O", ENDIANNESS_BIG, 8, reg_bits, 0, reg_map)
+ , m_io_config("I/O", ENDIANNESS_BIG, 8, reg_block_size > 128 ? 8 : reg_block_size > 64 ? 7 : 6, 0, reg_map)
, m_port_input_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}}
, m_port_output_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}}
, m_analog_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}}
, m_spi2_data_input_cb(*this)
, m_spi2_data_output_cb(*this)
- , m_reg_block_size(1 << reg_bits)
, m_internal_ram_size(internal_ram_size)
+ , m_reg_block_size(reg_block_size)
, m_init_value(init_value)
{
}
@@ -70,25 +71,31 @@ void mc68hc11_cpu_device::ram_map(address_map &map)
}
mc68hc11a1_device::mc68hc11a1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mc68hc11_cpu_device(mconfig, MC68HC11A1, tag, owner, clock, 6, 256, 0x01,
+ : mc68hc11_cpu_device(mconfig, MC68HC11A1, tag, owner, clock, 256, 64, 0x01,
address_map_constructor(FUNC(mc68hc11a1_device::io_map), this)) // TODO: also has 512 bytes EEPROM
{
}
mc68hc11d0_device::mc68hc11d0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mc68hc11_cpu_device(mconfig, MC68HC11D0, tag, owner, clock, 6, 192, 0x00,
+ : mc68hc11_cpu_device(mconfig, MC68HC11D0, tag, owner, clock, 192, 64, 0x00,
address_map_constructor(FUNC(mc68hc11d0_device::io_map), this))
{
}
+mc68hc11f1_device::mc68hc11f1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : mc68hc11_cpu_device(mconfig, MC68HC11F1, tag, owner, clock, 1024, 96, 0x01,
+ address_map_constructor(FUNC(mc68hc11f1_device::io_map), this)) // TODO: also has 512 bytes EEPROM
+{
+}
+
mc68hc11k1_device::mc68hc11k1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mc68hc11_cpu_device(mconfig, MC68HC11K1, tag, owner, clock, 7, 768, 0x00,
+ : mc68hc11_cpu_device(mconfig, MC68HC11K1, tag, owner, clock, 768, 128, 0x00,
address_map_constructor(FUNC(mc68hc11k1_device::io_map), this)) // TODO: also has 640 bytes EEPROM
{
}
mc68hc11m0_device::mc68hc11m0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mc68hc11_cpu_device(mconfig, MC68HC11M0, tag, owner, clock, 8, 1280, 0x00,
+ : mc68hc11_cpu_device(mconfig, MC68HC11M0, tag, owner, clock, 1280, 256, 0x00,
address_map_constructor(FUNC(mc68hc11m0_device::io_map), this))
{
}
@@ -405,6 +412,58 @@ void mc68hc11d0_device::io_map(address_map &map)
map(0x3f, 0x3f).nopw(); // CONFIG
}
+void mc68hc11f1_device::io_map(address_map &map)
+{
+ map(0x00, 0x00).rw(FUNC(mc68hc11f1_device::port_r<0>), FUNC(mc68hc11f1_device::port_w<0>)); // PORTA
+ map(0x01, 0x01).rw(FUNC(mc68hc11f1_device::ddr_r<0>), FUNC(mc68hc11f1_device::ddr_w<0>)); // DDRA
+ map(0x02, 0x02).rw(FUNC(mc68hc11f1_device::port_r<6>), FUNC(mc68hc11f1_device::port_w<6>)); // PORTG
+ map(0x03, 0x03).rw(FUNC(mc68hc11f1_device::ddr_r<6>), FUNC(mc68hc11f1_device::ddr_w<6>)); // DDRG
+ map(0x04, 0x04).rw(FUNC(mc68hc11f1_device::port_r<1>), FUNC(mc68hc11f1_device::port_w<1>)); // PORTB
+ map(0x05, 0x05).rw(FUNC(mc68hc11f1_device::port_r<5>), FUNC(mc68hc11f1_device::port_w<5>)); // PORTF
+ map(0x06, 0x06).rw(FUNC(mc68hc11f1_device::port_r<2>), FUNC(mc68hc11f1_device::port_w<2>)); // PORTC
+ map(0x07, 0x07).rw(FUNC(mc68hc11f1_device::ddr_r<2>), FUNC(mc68hc11f1_device::ddr_w<2>)); // DDRC
+ map(0x08, 0x08).rw(FUNC(mc68hc11f1_device::port_r<3>), FUNC(mc68hc11f1_device::port_w<3>)); // PORTD
+ map(0x09, 0x09).rw(FUNC(mc68hc11f1_device::ddr_r<3>), FUNC(mc68hc11f1_device::ddr_w<3>)); // DDRD
+ map(0x0a, 0x0a).r(FUNC(mc68hc11f1_device::port_r<4>)); // PORTE
+ map(0x0b, 0x0b).nopw(); // CFORC
+ map(0x0c, 0x0c).nopw(); // OC1M
+ map(0x0d, 0x0d).nopw(); // OC1D
+ map(0x0e, 0x0f).rw(FUNC(mc68hc11f1_device::tcnt_r), FUNC(mc68hc11f1_device::tcnt_w)); // TCNT
+ map(0x10, 0x11).nopr(); // TIC1
+ map(0x12, 0x13).nopr(); // TIC2
+ map(0x14, 0x15).nopr(); // TIC3
+ map(0x16, 0x17).rw(FUNC(mc68hc11f1_device::toc1_r), FUNC(mc68hc11f1_device::toc1_w)); // TOC1
+ map(0x22, 0x22).rw(FUNC(mc68hc11f1_device::tmsk1_r), FUNC(mc68hc11f1_device::tmsk1_w)); // TMSK1
+ map(0x23, 0x23).rw(FUNC(mc68hc11f1_device::tflg1_r), FUNC(mc68hc11f1_device::tflg1_w)); // TFLG1
+ map(0x24, 0x24).w(FUNC(mc68hc11f1_device::tmsk2_w)); // TMSK2
+ map(0x25, 0x25).nopr(); // TFLG2
+ map(0x26, 0x26).rw(FUNC(mc68hc11f1_device::pactl_r), FUNC(mc68hc11f1_device::pactl_w)); // PACTL
+ map(0x27, 0x27).nopw(); // PACNT
+ map(0x28, 0x28).r(FUNC(mc68hc11f1_device::spcr_r<0>)).nopw(); // SPCR
+ map(0x29, 0x29).r(FUNC(mc68hc11f1_device::spsr_r<0>)).nopw(); // SPSR
+ map(0x2a, 0x2a).rw(FUNC(mc68hc11f1_device::spdr_r<0>), FUNC(mc68hc11f1_device::spdr_w<0>)); // SPDR
+ map(0x2b, 0x2b).nopw(); // BAUD
+ map(0x2c, 0x2c).r(FUNC(mc68hc11f1_device::sccr1_r)).nopw(); // SCCR1
+ map(0x2d, 0x2d).r(FUNC(mc68hc11f1_device::sccr2_r)).nopw(); // SCCR2
+ map(0x2e, 0x2e).r(FUNC(mc68hc11m0_device::scsr1_r)); // SCSR
+ map(0x2f, 0x2f).nopw(); // SCDR
+ map(0x30, 0x30).rw(FUNC(mc68hc11f1_device::adctl_r), FUNC(mc68hc11f1_device::adctl_w)); // ADCTL
+ map(0x31, 0x34).r(FUNC(mc68hc11f1_device::adr_r)); // ADR1-ADR4
+ map(0x35, 0x35).nopw(); // BPROT
+ map(0x38, 0x38).nopw(); // OPT2
+ map(0x39, 0x39).nopw(); // OPTION
+ map(0x3a, 0x3a).nopw(); // COPRST (watchdog)
+ map(0x3b, 0x3b).nopw(); // PPROG (EEPROM programming)
+ map(0x3c, 0x3c).nopw(); // HPRIO
+ map(0x3d, 0x3d).rw(FUNC(mc68hc11f1_device::init_r), FUNC(mc68hc11f1_device::init_w)); // INIT
+ map(0x3e, 0x3e).nopw(); // TEST1
+ map(0x3f, 0x3f).nopw(); // CONFIG
+ map(0x5c, 0x5c).nopw(); // CSSTRH
+ map(0x5d, 0x5d).nopw(); // CSSTRL
+ map(0x5e, 0x5e).nopw(); // CSGADR
+ map(0x5f, 0x5f).nopw(); // CSGSIZ
+}
+
void mc68hc11k1_device::io_map(address_map &map)
{
map(0x00, 0x00).rw(FUNC(mc68hc11k1_device::port_r<0>), FUNC(mc68hc11k1_device::port_w<0>)); // PORTA
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.h b/src/devices/cpu/mc68hc11/mc68hc11.h
index 6452c20f8e3..aa414cb955e 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.h
+++ b/src/devices/cpu/mc68hc11/mc68hc11.h
@@ -13,6 +13,7 @@ enum {
DECLARE_DEVICE_TYPE(MC68HC11A1, mc68hc11a1_device)
DECLARE_DEVICE_TYPE(MC68HC11D0, mc68hc11d0_device)
+DECLARE_DEVICE_TYPE(MC68HC11F1, mc68hc11f1_device)
DECLARE_DEVICE_TYPE(MC68HC11K1, mc68hc11k1_device)
DECLARE_DEVICE_TYPE(MC68HC11M0, mc68hc11m0_device)
@@ -48,7 +49,7 @@ public:
auto out_spi2_data_callback() { return m_spi2_data_output_cb.bind(); }
protected:
- mc68hc11_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int reg_bits, uint16_t internal_ram_size, uint8_t init_value, address_map_constructor reg_map);
+ mc68hc11_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint16_t internal_ram_size, uint16_t reg_block_size, uint8_t init_value, address_map_constructor reg_map);
// device-level overrides
virtual void device_resolve_objects() override;
@@ -152,8 +153,8 @@ private:
int m_ram_position;
int m_reg_position;
- const uint16_t m_reg_block_size; // size of internal I/O space
const uint16_t m_internal_ram_size;
+ const uint16_t m_reg_block_size; // size of internal I/O space
const uint8_t m_init_value; // default value for INIT register
uint8_t m_wait_state;
@@ -541,6 +542,16 @@ protected:
void io_map(address_map &map);
};
+class mc68hc11f1_device : public mc68hc11_cpu_device
+{
+public:
+ // construction/destruction
+ mc68hc11f1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ void io_map(address_map &map);
+};
+
class mc68hc11k1_device : public mc68hc11_cpu_device
{
public: