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author hap <happppp@users.noreply.github.com>2025-08-02 23:14:22 +0200
committer hap <happppp@users.noreply.github.com>2025-08-03 01:14:11 +0200
commitf77b8bc25cff82e777623b71d5e065d3095f4c80 (patch)
tree0abf8f2cd654ef2e5e398d1a34831146629d7908
parent8e19506e550e80a763476519799d8a9a311b0ed9 (diff)
nec cpu: update mul/div cycles
-rw-r--r--src/devices/cpu/nec/necinstr.hxx24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/devices/cpu/nec/necinstr.hxx b/src/devices/cpu/nec/necinstr.hxx
index 7bfa7e87c30..34ece765388 100644
--- a/src/devices/cpu/nec/necinstr.hxx
+++ b/src/devices/cpu/nec/necinstr.hxx
@@ -412,10 +412,10 @@ OP( 0x62, i_chkind ) {
}
OP( 0x64, i_repnc ) { do_repnc(start_rep()); }
OP( 0x65, i_repc ) { do_repc(start_rep()); }
-OP( 0x68, i_push_d16 ) { uint32_t tmp; tmp = fetchword(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
-OP( 0x69, i_imul_d16 ) { uint32_t tmp; DEF_r16w; tmp = fetchword(); dst = (int32_t)((int16_t)src)*(int32_t)((int16_t)tmp); m_CarryVal = m_OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; CLK((ModRM >= 0xc0) ? 38 : 47); }
-OP( 0x6a, i_push_d8 ) { uint32_t tmp = (WORD)((int16_t)((int8_t)fetch())); PUSH(tmp); CLKW(11,11,5,11,7,3,Wreg(SP)); }
-OP( 0x6b, i_imul_d8 ) { uint32_t src2; DEF_r16w; src2= (WORD)((int16_t)((int8_t)fetch())); dst = (int32_t)((int16_t)src)*(int32_t)((int16_t)src2); m_CarryVal = m_OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; CLK((ModRM >= 0xc0 ) ? 31 : 39); }
+OP( 0x68, i_push_d16 ) { uint32_t tmp; tmp = fetchword(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
+OP( 0x69, i_imul_d16 ) { uint32_t tmp; DEF_r16w; tmp = fetchword(); dst = (int32_t)((int16_t)src)*(int32_t)((int16_t)tmp); m_CarryVal = m_OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; if (ModRM >= 0xc0) CLKS(42,42,12); else CLKS(52,48,16); }
+OP( 0x6a, i_push_d8 ) { uint32_t tmp = (WORD)((int16_t)((int8_t)fetch())); PUSH(tmp); CLKW(11,11,5,11,7,3,Wreg(SP)); }
+OP( 0x6b, i_imul_d8 ) { uint32_t src2; DEF_r16w; src2= (WORD)((int16_t)((int8_t)fetch())); dst = (int32_t)((int16_t)src)*(int32_t)((int16_t)src2); m_CarryVal = m_OverVal = (((int32_t)dst) >> 15 != 0) && (((int32_t)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; if (ModRM >= 0xc0) CLKS(34,34,12); else CLKS(44,40,16); }
OP( 0x6c, i_insb ) { PutMemB(DS1,Wreg(IY),read_port_byte(Wreg(DW))); Wreg(IY)+= -2 * m_DF + 1; CLK(8); }
OP( 0x6d, i_insw ) { PutMemW(DS1,Wreg(IY),read_port_word(Wreg(DW))); Wreg(IY)+= -4 * m_DF + 2; CLKS(18,10,8); }
OP( 0x6e, i_outsb ) { write_port_byte(Wreg(DW),GetMemB(DS0,Wreg(IX))); Wreg(IX)+= -2 * m_DF + 1; CLK(8); }
@@ -745,10 +745,10 @@ OP( 0xf6, i_f6pre ) { uint32_t tmp; uint32_t uresult,uresult2; int32_t result,re
case 0x08: logerror("%06x: Undefined opcode 0xf6 0x08\n",PC()); break;
case 0x10: PutbackRMByte(ModRM,~tmp); CLK((ModRM >= 0xc0) ? 2 : 16); break; /* NOT */
case 0x18: m_CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Byte(tmp); PutbackRMByte(ModRM,tmp&0xff); CLK((ModRM >= 0xc0) ? 2 : 16); break; /* NEG */
- case 0x20: uresult = Breg(AL)*tmp; Wreg(AW)=(WORD)uresult; m_CarryVal=m_OverVal=(Breg(AH)!=0); CLK((ModRM >= 0xc0) ? 30 : 36); break; /* MULU */
- case 0x28: result = (int16_t)((int8_t)Breg(AL))*(int16_t)((int8_t)tmp); Wreg(AW)=(WORD)result; m_CarryVal=m_OverVal=(Breg(AH)!=0); CLK((ModRM >= 0xc0) ? 30 : 36); break; /* MUL */
- case 0x30: if (tmp) { DIVUB; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); CLK((ModRM >= 0xc0) ? 43 : 53); break;
- case 0x38: if (tmp) { DIVB; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); CLK((ModRM >= 0xc0) ? 43 : 53); break;
+ case 0x20: uresult = Breg(AL)*tmp; Wreg(AW)=(WORD)uresult; m_CarryVal=m_OverVal=(Breg(AH)!=0); if (ModRM >= 0xc0) CLKS(30,30,8); else CLKS(36,36,12); break; /* MULU */
+ case 0x28: result = (int16_t)((int8_t)Breg(AL))*(int16_t)((int8_t)tmp); Wreg(AW)=(WORD)result; m_CarryVal=m_OverVal=(Breg(AH)!=0); if (ModRM >= 0xc0) CLKS(47,47,8); else CLKS(57,53,12); break; /* MUL */
+ case 0x30: if (tmp) { DIVUB; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); if (ModRM >= 0xc0) CLKS(25,25,11); else CLKS(35,31,15); break;
+ case 0x38: if (tmp) { DIVB; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); if (ModRM >= 0xc0) CLKS(43,43,17); else CLKS(53,49,20); break;
}
}
@@ -759,10 +759,10 @@ OP( 0xf7, i_f7pre ) { uint32_t tmp,tmp2; uint32_t uresult,uresult2; int32_t re
case 0x08: logerror("%06x: Undefined opcode 0xf7 0x08\n",PC()); break;
case 0x10: PutbackRMWord(ModRM,~tmp); CLK((ModRM >= 0xc0) ? 2 : 16); break; /* NOT */
case 0x18: m_CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Word(tmp); PutbackRMWord(ModRM,tmp&0xffff); CLK((ModRM >= 0xc0) ? 2 : 16); break; /* NEG */
- case 0x20: uresult = Wreg(AW)*tmp; Wreg(AW)=uresult&0xffff; Wreg(DW)=((uint32_t)uresult)>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); CLK((ModRM >= 0xc0) ? 30 : 36); break; /* MULU */
- case 0x28: result = (int32_t)((int16_t)Wreg(AW))*(int32_t)((int16_t)tmp); Wreg(AW)=result&0xffff; Wreg(DW)=result>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); CLK((ModRM >= 0xc0) ? 30 : 36); break; /* MUL */
- case 0x30: if (tmp) { DIVUW; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); CLK((ModRM >= 0xc0) ? 43 : 53); break;
- case 0x38: if (tmp) { DIVW; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); CLK((ModRM >= 0xc0) ? 43 : 53); break;
+ case 0x20: uresult = Wreg(AW)*tmp; Wreg(AW)=uresult&0xffff; Wreg(DW)=((uint32_t)uresult)>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); if (ModRM >= 0xc0) CLKS(30,30,12); else CLKS(36,36,16); break; /* MULU */
+ case 0x28: result = (int32_t)((int16_t)Wreg(AW))*(int32_t)((int16_t)tmp); Wreg(AW)=result&0xffff; Wreg(DW)=result>>16; m_CarryVal=m_OverVal=(Wreg(DW)!=0); if (ModRM >= 0xc0) CLKS(47,47,12); else CLKS(57,53,16); break; /* MUL */
+ case 0x30: if (tmp) { DIVUW; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); if (ModRM >= 0xc0) CLKS(25,25,19); else CLKS(35,31,23); break;
+ case 0x38: if (tmp) { DIVW; } else nec_interrupt(NEC_DIVIDE_VECTOR, BRK); if (ModRM >= 0xc0) CLKS(43,43,24); else CLKS(53,49,28); break;
}
}