diff options
author | Ivan Vangelista <mesgnet@yahoo.it> | 2018-06-12 19:22:30 +0200 |
---|---|---|
committer | Ivan Vangelista <mesgnet@yahoo.it> | 2018-06-12 19:22:30 +0200 |
commit | e1cd7964656d1bfc8996c2129757b4e155c5eee5 (patch) | |
tree | 8b3cc71e347365c09646c4e08b6abd5cc8746250 | |
parent | 43d4b6ba361eef21f6cff1b583cd7c550a70c6e7 (diff) |
Dumped bios for ALG 3DO based arcade games [Mr Invader]
-rw-r--r-- | src/mame/drivers/3do.cpp | 63 | ||||
-rw-r--r-- | src/mame/includes/3do.h | 308 | ||||
-rw-r--r-- | src/mame/machine/3do.cpp | 50 | ||||
-rw-r--r-- | src/mame/mame.lst | 1 |
4 files changed, 217 insertions, 205 deletions
diff --git a/src/mame/drivers/3do.cpp b/src/mame/drivers/3do.cpp index 88fbe234c6c..69f1214b526 100644 --- a/src/mame/drivers/3do.cpp +++ b/src/mame/drivers/3do.cpp @@ -2,7 +2,7 @@ // copyright-holders:Angelo Salese, Wilbert Pol /*************************************************************************** - 3do.c + 3do.cpp Driver file to handle emulation of the 3DO systems @@ -99,7 +99,6 @@ Part list of Goldstar 3DO Interactive Multiplayer #include "cpu/arm/arm.h" #include "cpu/arm7/arm7.h" #include "imagedev/chd_cd.h" -#include "screen.h" #define X2_CLOCK_PAL 59000000 @@ -107,17 +106,17 @@ Part list of Goldstar 3DO Interactive Multiplayer #define X601_CLOCK XTAL(16'934'400) -void _3do_state::_3do_mem(address_map &map) +void _3do_state::main_mem(address_map &map) { - map(0x00000000, 0x001FFFFF).bankrw("bank1").share("dram"); /* DRAM */ - map(0x00200000, 0x003FFFFF).ram().share("vram"); /* VRAM */ - map(0x03000000, 0x030FFFFF).bankr("bank2"); /* BIOS */ + map(0x00000000, 0x001FFFFF).bankrw(m_bank1).share(m_dram); /* DRAM */ + map(0x00200000, 0x003FFFFF).ram().share(m_vram); /* VRAM */ + map(0x03000000, 0x030FFFFF).bankr(m_bank2); /* BIOS */ map(0x03100000, 0x0313FFFF).ram(); /* Brooktree? */ - map(0x03140000, 0x0315FFFF).rw(FUNC(_3do_state::_3do_nvarea_r), FUNC(_3do_state::_3do_nvarea_w)).umask32(0x000000ff); /* NVRAM */ - map(0x03180000, 0x031BFFFF).rw(FUNC(_3do_state::_3do_slow2_r), FUNC(_3do_state::_3do_slow2_w)); /* Slow bus - additional expansion */ - map(0x03200000, 0x0320FFFF).rw(FUNC(_3do_state::_3do_svf_r), FUNC(_3do_state::_3do_svf_w)); /* special vram access1 */ - map(0x03300000, 0x033FFFFF).rw(FUNC(_3do_state::_3do_madam_r), FUNC(_3do_state::_3do_madam_w)); /* address decoder */ - map(0x03400000, 0x034FFFFF).rw(FUNC(_3do_state::_3do_clio_r), FUNC(_3do_state::_3do_clio_w)); /* io controller */ + map(0x03140000, 0x0315FFFF).rw(FUNC(_3do_state::nvarea_r), FUNC(_3do_state::nvarea_w)).umask32(0x000000ff); /* NVRAM */ + map(0x03180000, 0x031BFFFF).rw(FUNC(_3do_state::slow2_r), FUNC(_3do_state::slow2_w)); /* Slow bus - additional expansion */ + map(0x03200000, 0x0320FFFF).rw(FUNC(_3do_state::svf_r), FUNC(_3do_state::svf_w)); /* special vram access1 */ + map(0x03300000, 0x033FFFFF).rw(FUNC(_3do_state::madam_r), FUNC(_3do_state::madam_w)); /* address decoder */ + map(0x03400000, 0x034FFFFF).rw(FUNC(_3do_state::clio_r), FUNC(_3do_state::clio_w)); /* io controller */ } @@ -142,9 +141,9 @@ void _3do_state::machine_start() m_bank1->configure_entry(0, m_dram); m_bank1->configure_entry(1, memregion("user1")->base()); - m_3do_slow2_init(); - m_3do_madam_init(); - m_3do_clio_init( downcast<screen_device *>(machine().device("screen"))); + m_slow2_init(); + m_madam_init(); + m_clio_init(); } void _3do_state::machine_reset() @@ -158,16 +157,16 @@ void _3do_state::machine_reset() MACHINE_CONFIG_START(_3do_state::_3do) /* Basic machine hardware */ - MCFG_DEVICE_ADD( "maincpu", ARM7_BE, XTAL(50'000'000)/4 ) - MCFG_DEVICE_PROGRAM_MAP( _3do_mem) + MCFG_DEVICE_ADD( m_maincpu, ARM7_BE, XTAL(50'000'000)/4 ) + MCFG_DEVICE_PROGRAM_MAP( main_mem) - MCFG_NVRAM_ADD_1FILL("nvram") + MCFG_NVRAM_ADD_1FILL(m_nvram) MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_x16", _3do_state, timer_x16_cb, attotime::from_hz(12000)) // TODO: timing - MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_ADD(m_screen, RASTER) MCFG_SCREEN_RAW_PARAMS( X2_CLOCK_NTSC / 2, 1592, 254, 1534, 263, 22, 262 ) - MCFG_SCREEN_UPDATE_DRIVER(_3do_state, screen_update__3do) + MCFG_SCREEN_UPDATE_DRIVER(_3do_state, screen_update) MCFG_CDROM_ADD("cdrom") MACHINE_CONFIG_END @@ -176,16 +175,16 @@ MACHINE_CONFIG_END MACHINE_CONFIG_START(_3do_state::_3do_pal) /* Basic machine hardware */ - MCFG_DEVICE_ADD("maincpu", ARM7_BE, XTAL(50'000'000)/4 ) - MCFG_DEVICE_PROGRAM_MAP( _3do_mem) + MCFG_DEVICE_ADD(m_maincpu, ARM7_BE, XTAL(50'000'000)/4 ) + MCFG_DEVICE_PROGRAM_MAP( main_mem) - MCFG_NVRAM_ADD_1FILL("nvram") + MCFG_NVRAM_ADD_1FILL(m_nvram) MCFG_TIMER_DRIVER_ADD_PERIODIC("timer_x16", _3do_state, timer_x16_cb, attotime::from_hz(12000)) // TODO: timing - MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_ADD(m_screen, RASTER) MCFG_SCREEN_RAW_PARAMS( X2_CLOCK_PAL / 2, 1592, 254, 1534, 263, 22, 262 ) // TODO: proper params - MCFG_SCREEN_UPDATE_DRIVER(_3do_state, screen_update__3do) + MCFG_SCREEN_UPDATE_DRIVER(_3do_state, screen_update) MCFG_CDROM_ADD("cdrom") MACHINE_CONFIG_END @@ -241,6 +240,14 @@ ROM_START(orbatak) DISK_IMAGE_READONLY( "orbatak", 0, SHA1(25cb3b889cf09dbe5faf2b0ca4aae5e03453da00) ) ROM_END +ROM_START(md23do) + ROM_REGION32_BE( 0x200000, "user1", 0 ) + ROM_LOAD( "soat_rom2.bin", 0x000000, 0x80000, CRC(b832da9a) SHA1(520d3d1b5897800af47f92efd2444a26b7a7dead) ) // TC544000AF-150, 1xxxxxxxxxxxxxxxxxx = 0xFF + + DISK_REGION( "cdrom" ) + DISK_IMAGE_READONLY( "md23do", 0, NO_DUMP ) +ROM_END + /*************************************************************************** Game driver(s) @@ -251,6 +258,8 @@ ROM_END CONS( 1991, 3do, 0, 0, _3do, 3do, _3do_state, empty_init, "The 3DO Company", "3DO (NTSC)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) CONS( 1991, 3do_pal, 3do, 0, _3do_pal, 3do, _3do_state, empty_init, "The 3DO Company", "3DO (PAL)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -/* YEAR NAME PARENT MACHINE INPUT STATE INIT MONITOR COMPANY FULLNAME FLAGS */ -GAME( 1991, 3dobios, 0, _3do, 3do, _3do_state, empty_init, ROT0, "The 3DO Company", "3DO Bios", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IS_BIOS_ROOT ) -GAME( 199?, orbatak, 3dobios, _3do, 3do, _3do_state, empty_init, ROT0, "<unknown>", "Orbatak (prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +/* YEAR NAME PARENT MACHINE INPUT STATE INIT MONITOR COMPANY FULLNAME FLAGS */ +GAME( 1991, 3dobios, 0, _3do, 3do, _3do_state, empty_init, ROT0, "The 3DO Company", "3DO Bios", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_IS_BIOS_ROOT ) +GAME( 199?, orbatak, 3dobios, _3do, 3do, _3do_state, empty_init, ROT0, "<unknown>", "Orbatak (prototype)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +GAME( 199?, md23do, 0, _3do, 3do, _3do_state, empty_init, ROT0, "American Laser Games", "Mad Dog II: The Lost Gold (3DO hardware)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) + diff --git a/src/mame/includes/3do.h b/src/mame/includes/3do.h index 73e0901665c..90fbf3ccd05 100644 --- a/src/mame/includes/3do.h +++ b/src/mame/includes/3do.h @@ -11,132 +11,9 @@ #include "machine/nvram.h" #include "machine/timer.h" +#include "screen.h" -struct SLOW2 { - /* 03180000 - 0318003f - configuration group */ - /* 03180040 - 0318007f - diagnostic UART */ - - uint8_t cg_r_count; - uint8_t cg_w_count; - uint32_t cg_input; - uint32_t cg_output; -}; - - -struct MADAM { - uint32_t revision; /* 03300000 */ - uint32_t msysbits; /* 03300004 */ - uint32_t mctl; /* 03300008 */ - uint32_t sltime; /* 0330000c */ - uint32_t abortbits; /* 03300020 */ - uint32_t privbits; /* 03300024 */ - uint32_t statbits; /* 03300028 */ - uint32_t diag; /* 03300040 */ - - uint32_t ccobctl0; /* 03300110 */ - uint32_t ppmpc; /* 03300120 */ - - uint32_t regctl0; /* 03300130 */ - uint32_t regctl1; /* 03300134 */ - uint32_t regctl2; /* 03300138 */ - uint32_t regctl3; /* 0330013c */ - uint32_t xyposh; /* 03300140 */ - uint32_t xyposl; /* 03300144 */ - uint32_t linedxyh; /* 03300148 */ - uint32_t linedxyl; /* 0330014c */ - uint32_t dxyh; /* 03300150 */ - uint32_t dxyl; /* 03300154 */ - uint32_t ddxyh; /* 03300158 */ - uint32_t ddxyl; /* 0330015c */ - - uint32_t pip[16]; /* 03300180-033001bc (W); 03300180-033001fc (R) */ - uint32_t fence[16]; /* 03300200-0330023c (W); 03300200-0330027c (R) */ - uint32_t mmu[64]; /* 03300300-033003fc */ - uint32_t dma[32][4]; /* 03300400-033005fc */ - uint32_t mult[40]; /* 03300600-0330069c */ - uint32_t mult_control; /* 033007f0-033007f4 */ - uint32_t mult_status; /* 033007f8 */ -}; - - -struct CLIO { - screen_device *screen; - - uint32_t revision; /* 03400000 */ - uint32_t csysbits; /* 03400004 */ - uint32_t vint0; /* 03400008 */ - uint32_t vint1; /* 0340000c */ - uint32_t audin; /* 03400020 */ - uint32_t audout; /* 03400024 */ - uint32_t cstatbits; /* 03400028 */ - uint32_t wdog; /* 0340002c */ - uint32_t hcnt; /* 03400030 */ - uint32_t vcnt; /* 03400034 */ - uint32_t seed; /* 03400038 */ - uint32_t random; /* 0340004c */ - uint32_t irq0; /* 03400040 / 03400044 */ - uint32_t irq0_enable; /* 03400048 / 0340004c */ - uint32_t mode; /* 03400050 / 03400054 */ - uint32_t badbits; /* 03400058 */ - uint32_t spare; /* 0340005c */ - uint32_t irq1; /* 03400060 / 03400064 */ - uint32_t irq1_enable; /* 03400068 / 0340006c */ - uint32_t hdelay; /* 03400080 */ - uint32_t adbio; /* 03400084 */ - uint32_t adbctl; /* 03400088 */ - /* Timers */ - uint32_t timer_count[16];/* 034001** & 8 */ - uint32_t timer_backup[16]; /* 034001**+4 & 8 */ - uint64_t timer_ctrl; /* 03400200 */ - uint32_t slack; /* 03400220 */ - /* DMA */ - uint32_t dmareqdis; /* 03400308 */ - /* Expansion bus */ - uint32_t expctl; /* 03400400/03400404 */ - uint32_t type0_4; /* 03400408 */ - uint32_t dipir1; /* 03400410 */ - uint32_t dipir2; /* 03400414 */ - /* Bus signals */ - uint32_t sel; /* 03400500 - 0340053f */ - uint32_t poll; /* 03400540 - 0340057f */ - uint32_t cmdstat; /* 03400580 - 034005bf */ - uint32_t data; /* 034005c0 - 034005ff */ - /* DSPP */ - uint32_t semaphore; /* 034017d0 */ - uint32_t semaack; /* 034017d4 */ - uint32_t dsppdma; /* 034017e0 */ - uint32_t dspprst0; /* 034017e4 */ - uint32_t dspprst1; /* 034017e8 */ - uint32_t dspppc; /* 034017f4 */ - uint32_t dsppnr; /* 034017f8 */ - uint32_t dsppgw; /* 034017fc */ - uint32_t dsppn[0x400]; /* 03401800 - 03401bff DSPP N stack (32bit writes) */ - /* 03402000 - 034027ff DSPP N stack (16bit writes) */ - uint32_t dsppei[0x100]; /* 03403000 - 034030ff DSPP EI stack (32bit writes) */ - /* 03403400 - 034035ff DSPP EI stack (16bit writes) */ - uint32_t dsppeo[0x1f]; /* 03403800 - 0340381f DSPP EO stack (32bit reads) */ - /* 03403c00 - 03403c3f DSPP EO stack (32bit reads) */ - uint32_t dsppclkreload; /* 034039dc / 03403fbc */ - /* UNCLE */ - uint32_t unclerev; /* 0340c000 */ - uint32_t uncle_soft_rev; /* 0340c004 */ - uint32_t uncle_addr; /* 0340c008 */ - uint32_t uncle_rom; /* 0340c00c */ -}; - - -struct SVF { - uint32_t sport[512]; - uint32_t color; -}; - -struct DSPP { - std::unique_ptr<uint16_t[]> N; - std::unique_ptr<uint16_t[]> EI; - std::unique_ptr<uint16_t[]> EO; -}; - class _3do_state : public driver_device { public: @@ -146,13 +23,151 @@ public: m_dram(*this, "dram"), m_vram(*this, "vram"), m_nvram(*this, "nvram"), + m_screen(*this, "screen"), m_bank1(*this, "bank1"), m_bank2(*this, "bank2") { } + void _3do(machine_config &config); + void _3do_pal(machine_config &config); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void video_start() override; + +private: + struct SLOW2 { + /* 03180000 - 0318003f - configuration group */ + /* 03180040 - 0318007f - diagnostic UART */ + + uint8_t cg_r_count; + uint8_t cg_w_count; + uint32_t cg_input; + uint32_t cg_output; + }; + + + struct MADAM { + uint32_t revision; /* 03300000 */ + uint32_t msysbits; /* 03300004 */ + uint32_t mctl; /* 03300008 */ + uint32_t sltime; /* 0330000c */ + uint32_t abortbits; /* 03300020 */ + uint32_t privbits; /* 03300024 */ + uint32_t statbits; /* 03300028 */ + uint32_t diag; /* 03300040 */ + + uint32_t ccobctl0; /* 03300110 */ + uint32_t ppmpc; /* 03300120 */ + + uint32_t regctl0; /* 03300130 */ + uint32_t regctl1; /* 03300134 */ + uint32_t regctl2; /* 03300138 */ + uint32_t regctl3; /* 0330013c */ + uint32_t xyposh; /* 03300140 */ + uint32_t xyposl; /* 03300144 */ + uint32_t linedxyh; /* 03300148 */ + uint32_t linedxyl; /* 0330014c */ + uint32_t dxyh; /* 03300150 */ + uint32_t dxyl; /* 03300154 */ + uint32_t ddxyh; /* 03300158 */ + uint32_t ddxyl; /* 0330015c */ + + uint32_t pip[16]; /* 03300180-033001bc (W); 03300180-033001fc (R) */ + uint32_t fence[16]; /* 03300200-0330023c (W); 03300200-0330027c (R) */ + uint32_t mmu[64]; /* 03300300-033003fc */ + uint32_t dma[32][4]; /* 03300400-033005fc */ + uint32_t mult[40]; /* 03300600-0330069c */ + uint32_t mult_control; /* 033007f0-033007f4 */ + uint32_t mult_status; /* 033007f8 */ + }; + + + struct CLIO { + screen_device *screen; + + uint32_t revision; /* 03400000 */ + uint32_t csysbits; /* 03400004 */ + uint32_t vint0; /* 03400008 */ + uint32_t vint1; /* 0340000c */ + uint32_t audin; /* 03400020 */ + uint32_t audout; /* 03400024 */ + uint32_t cstatbits; /* 03400028 */ + uint32_t wdog; /* 0340002c */ + uint32_t hcnt; /* 03400030 */ + uint32_t vcnt; /* 03400034 */ + uint32_t seed; /* 03400038 */ + uint32_t random; /* 0340004c */ + uint32_t irq0; /* 03400040 / 03400044 */ + uint32_t irq0_enable; /* 03400048 / 0340004c */ + uint32_t mode; /* 03400050 / 03400054 */ + uint32_t badbits; /* 03400058 */ + uint32_t spare; /* 0340005c */ + uint32_t irq1; /* 03400060 / 03400064 */ + uint32_t irq1_enable; /* 03400068 / 0340006c */ + uint32_t hdelay; /* 03400080 */ + uint32_t adbio; /* 03400084 */ + uint32_t adbctl; /* 03400088 */ + /* Timers */ + uint32_t timer_count[16];/* 034001** & 8 */ + uint32_t timer_backup[16]; /* 034001**+4 & 8 */ + uint64_t timer_ctrl; /* 03400200 */ + uint32_t slack; /* 03400220 */ + /* DMA */ + uint32_t dmareqdis; /* 03400308 */ + /* Expansion bus */ + uint32_t expctl; /* 03400400/03400404 */ + uint32_t type0_4; /* 03400408 */ + uint32_t dipir1; /* 03400410 */ + uint32_t dipir2; /* 03400414 */ + /* Bus signals */ + uint32_t sel; /* 03400500 - 0340053f */ + uint32_t poll; /* 03400540 - 0340057f */ + uint32_t cmdstat; /* 03400580 - 034005bf */ + uint32_t data; /* 034005c0 - 034005ff */ + /* DSPP */ + uint32_t semaphore; /* 034017d0 */ + uint32_t semaack; /* 034017d4 */ + uint32_t dsppdma; /* 034017e0 */ + uint32_t dspprst0; /* 034017e4 */ + uint32_t dspprst1; /* 034017e8 */ + uint32_t dspppc; /* 034017f4 */ + uint32_t dsppnr; /* 034017f8 */ + uint32_t dsppgw; /* 034017fc */ + uint32_t dsppn[0x400]; /* 03401800 - 03401bff DSPP N stack (32bit writes) */ + /* 03402000 - 034027ff DSPP N stack (16bit writes) */ + uint32_t dsppei[0x100]; /* 03403000 - 034030ff DSPP EI stack (32bit writes) */ + /* 03403400 - 034035ff DSPP EI stack (16bit writes) */ + uint32_t dsppeo[0x1f]; /* 03403800 - 0340381f DSPP EO stack (32bit reads) */ + /* 03403c00 - 03403c3f DSPP EO stack (32bit reads) */ + uint32_t dsppclkreload; /* 034039dc / 03403fbc */ + /* UNCLE */ + uint32_t unclerev; /* 0340c000 */ + uint32_t uncle_soft_rev; /* 0340c004 */ + uint32_t uncle_addr; /* 0340c008 */ + uint32_t uncle_rom; /* 0340c00c */ + }; + + + struct SVF { + uint32_t sport[512]; + uint32_t color; + }; + + struct DSPP { + std::unique_ptr<uint16_t[]> N; + std::unique_ptr<uint16_t[]> EI; + std::unique_ptr<uint16_t[]> EO; + }; + required_device<cpu_device> m_maincpu; required_shared_ptr<uint32_t> m_dram; required_shared_ptr<uint32_t> m_vram; required_device<nvram_device> m_nvram; + required_device<screen_device> m_screen; + required_memory_bank m_bank1; + required_memory_bank m_bank2; + SLOW2 m_slow2; MADAM m_madam; CLIO m_clio; @@ -161,41 +176,28 @@ public: uint8_t m_nvmem[0x8000]; // uint8_t m_video_bits[512]; - DECLARE_READ8_MEMBER(_3do_nvarea_r); - DECLARE_WRITE8_MEMBER(_3do_nvarea_w); - DECLARE_READ32_MEMBER(_3do_slow2_r); - DECLARE_WRITE32_MEMBER(_3do_slow2_w); - DECLARE_READ32_MEMBER(_3do_svf_r); - DECLARE_WRITE32_MEMBER(_3do_svf_w); - DECLARE_READ32_MEMBER(_3do_madam_r); - DECLARE_WRITE32_MEMBER(_3do_madam_w); - DECLARE_READ32_MEMBER(_3do_clio_r); - DECLARE_WRITE32_MEMBER(_3do_clio_w); - uint32_t screen_update__3do(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + DECLARE_READ8_MEMBER(nvarea_r); + DECLARE_WRITE8_MEMBER(nvarea_w); + DECLARE_READ32_MEMBER(slow2_r); + DECLARE_WRITE32_MEMBER(slow2_w); + DECLARE_READ32_MEMBER(svf_r); + DECLARE_WRITE32_MEMBER(svf_w); + DECLARE_READ32_MEMBER(madam_r); + DECLARE_WRITE32_MEMBER(madam_w); + DECLARE_READ32_MEMBER(clio_r); + DECLARE_WRITE32_MEMBER(clio_w); + uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); TIMER_DEVICE_CALLBACK_MEMBER( timer_x16_cb ); - void _3do(machine_config &config); - void _3do_pal(machine_config &config); - void _3do_mem(address_map &map); + void main_mem(address_map &map); -protected: - virtual void machine_start() override; - virtual void machine_reset() override; - virtual void video_start() override; + void m_slow2_init( void ); + void m_madam_init( void ); + void m_clio_init( void ); - required_memory_bank m_bank1; - required_memory_bank m_bank2; - -private: - void m_3do_slow2_init( void ); - void m_3do_madam_init( void ); - void m_3do_clio_init( screen_device *screen ); - - void m_3do_request_fiq(uint32_t irq_req, uint8_t type); + void m_request_fiq(uint32_t irq_req, uint8_t type); }; -/*----------- defined in machine/3do.c -----------*/ - #endif // MAME_INCLUDES_3DO_H diff --git a/src/mame/machine/3do.cpp b/src/mame/machine/3do.cpp index 7d3dfe633f5..42772a69940 100644 --- a/src/mame/machine/3do.cpp +++ b/src/mame/machine/3do.cpp @@ -106,7 +106,7 @@ IRQ1 0x00000001 DMA Player bus */ -void _3do_state::m_3do_request_fiq(uint32_t irq_req, uint8_t type) +void _3do_state::m_request_fiq(uint32_t irq_req, uint8_t type) { if(type) m_clio.irq1 |= irq_req; @@ -153,7 +153,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( _3do_state::timer_x16_cb ) if(m_clio.timer_count[i] == 0xffffffff) // timer hit { if(i & 1) // odd timer irq fires - m_3do_request_fiq(8 << (7-(i >> 1)),0); + m_request_fiq(8 << (7-(i >> 1)),0); carry_val = 1; @@ -170,8 +170,8 @@ TIMER_DEVICE_CALLBACK_MEMBER( _3do_state::timer_x16_cb ) } } -READ8_MEMBER(_3do_state::_3do_nvarea_r) { return m_nvmem[offset]; } -WRITE8_MEMBER(_3do_state::_3do_nvarea_w) { m_nvmem[offset] = data; } +READ8_MEMBER(_3do_state::nvarea_r) { return m_nvmem[offset]; } +WRITE8_MEMBER(_3do_state::nvarea_w) { m_nvmem[offset] = data; } @@ -200,7 +200,7 @@ WRITE8_MEMBER(_3do_state::_3do_nvarea_w) { m_nvmem[offset] = data; } 3022630 */ -READ32_MEMBER(_3do_state::_3do_slow2_r){ +READ32_MEMBER(_3do_state::slow2_r){ uint32_t data = 0; logerror( "%08X: UNK_318 read offset = %08X\n", m_maincpu->pc(), offset ); @@ -215,7 +215,7 @@ READ32_MEMBER(_3do_state::_3do_slow2_r){ } -WRITE32_MEMBER(_3do_state::_3do_slow2_w) +WRITE32_MEMBER(_3do_state::slow2_w) { logerror( "%08X: UNK_318 write offset = %08X, data = %08X, mask = %08X\n", m_maincpu->pc(), offset, data, mem_mask ); @@ -237,7 +237,7 @@ WRITE32_MEMBER(_3do_state::_3do_slow2_w) -READ32_MEMBER(_3do_state::_3do_svf_r) +READ32_MEMBER(_3do_state::svf_r) { uint32_t addr = ( offset & ( 0x07fc / 4 ) ) << 9; uint32_t *p = m_vram + addr; @@ -262,7 +262,7 @@ READ32_MEMBER(_3do_state::_3do_svf_r) return 0; } -WRITE32_MEMBER(_3do_state::_3do_svf_w) +WRITE32_MEMBER(_3do_state::svf_w) { uint32_t addr = ( offset & ( 0x07fc / 4 ) ) << 9; uint32_t *p = m_vram + addr; @@ -302,7 +302,7 @@ WRITE32_MEMBER(_3do_state::_3do_svf_w) -READ32_MEMBER(_3do_state::_3do_madam_r){ +READ32_MEMBER(_3do_state::madam_r){ logerror( "%08X: MADAM read offset = %08X\n", m_maincpu->pc(), offset*4 ); switch( offset ) { @@ -461,7 +461,7 @@ READ32_MEMBER(_3do_state::_3do_madam_r){ } -WRITE32_MEMBER(_3do_state::_3do_madam_w){ +WRITE32_MEMBER(_3do_state::madam_w){ if(offset == 0) { if(data == 0x0a) @@ -655,7 +655,7 @@ WRITE32_MEMBER(_3do_state::_3do_madam_w){ -READ32_MEMBER(_3do_state::_3do_clio_r) +READ32_MEMBER(_3do_state::clio_r) { if (!machine().side_effects_disabled()) { @@ -782,7 +782,7 @@ READ32_MEMBER(_3do_state::_3do_clio_r) return 0; } -WRITE32_MEMBER(_3do_state::_3do_clio_w) +WRITE32_MEMBER(_3do_state::clio_w) { if(offset != 0x200/4 && offset != 0x40/4 && offset != 0x44/4 && offset != 0x48/4 && offset != 0x4c/4 && offset != 0x118/4 && offset != 0x11c/4) @@ -856,22 +856,22 @@ WRITE32_MEMBER(_3do_state::_3do_clio_w) case 0x0040/4: LOG(("%08x PEND0\n",data)); m_clio.irq0 |= data; - m_3do_request_fiq(0,0); + m_request_fiq(0,0); break; case 0x0044/4: //LOG(("%08x PEND0 CLEAR\n",data)); m_clio.irq0 &= ~data; - m_3do_request_fiq(0,0); + m_request_fiq(0,0); break; case 0x0048/4: LOG(("%08x MASK0\n",data)); m_clio.irq0_enable |= data; - m_3do_request_fiq(0,0); + m_request_fiq(0,0); break; case 0x004c/4: LOG(("%08x MASK0 CLEAR\n",data)); m_clio.irq0_enable &= ~data; - m_3do_request_fiq(0,0); + m_request_fiq(0,0); break; case 0x0050/4: m_clio.mode |= data; @@ -888,22 +888,22 @@ WRITE32_MEMBER(_3do_state::_3do_clio_w) case 0x0060/4: LOG(("%08x PEND1\n",data)); m_clio.irq1 |= data; - m_3do_request_fiq(0,1); + m_request_fiq(0,1); break; case 0x0064/4: LOG(("%08x PEND1 CLEAR\n",data)); m_clio.irq1 &= ~data; - m_3do_request_fiq(0,1); + m_request_fiq(0,1); break; case 0x0068/4: LOG(("%08x MASK1\n",data)); m_clio.irq1_enable |= data; - m_3do_request_fiq(0,1); + m_request_fiq(0,1); break; case 0x006c/4: LOG(("%08x MASK1 CLEAR\n",data)); m_clio.irq1_enable &= ~data; - m_3do_request_fiq(0,1); + m_request_fiq(0,1); break; case 0x0080/4: m_clio.hdelay = data; @@ -1040,7 +1040,7 @@ void _3do_state::video_start() } -uint32_t _3do_state::screen_update__3do(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t _3do_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { uint32_t *source_p = m_vram + 0x1c0000 / 4; @@ -1096,23 +1096,23 @@ uint32_t _3do_state::screen_update__3do(screen_device &screen, bitmap_rgb32 &bit * */ -void _3do_state::m_3do_madam_init( void ) +void _3do_state::m_madam_init( void ) { memset( &m_madam, 0, sizeof(MADAM) ); m_madam.revision = 0x01020000; m_madam.msysbits = 0x51; } -void _3do_state::m_3do_slow2_init( void ) +void _3do_state::m_slow2_init( void ) { m_slow2.cg_input = 0; m_slow2.cg_output = 0x00000005 - 1; } -void _3do_state::m_3do_clio_init( screen_device *screen ) +void _3do_state::m_clio_init() { memset( &m_clio, 0, sizeof(CLIO) ); - m_clio.screen = screen; + m_clio.screen = m_screen; m_clio.revision = 0x02022000 /* 0x04000000 */; m_clio.unclerev = 0x03800000; m_clio.expctl = 0x80; /* ARM has the expansion bus */ diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 9657fe83ffc..74da396d5f0 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -70,6 +70,7 @@ flagrall // ? 3do // 3DO consoles 3do_pal // 3dobios // +md23do // orbatak // @source:3x3puzzl.cpp |