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author Lord-Nightmare <Lord-Nightmare@users.noreply.github.com>2017-03-17 12:31:56 -0400
committer Lord-Nightmare <Lord-Nightmare@users.noreply.github.com>2017-03-17 12:31:56 -0400
commitddb0129159635cf8e96233e5d13e4264fc24a267 (patch)
tree754b1b7eb667b6852aab7fc2c9d4fed35c5d4ca5
parent4ba2a062cb349722f01a1f76e24db94629538f4f (diff)
upd7725: use accessors to access the SR p0 and p1 bits, rather than masking (nw)
-rw-r--r--src/devices/cpu/upd7725/upd7725.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp
index 11ecca2a82a..1eafbe6d963 100644
--- a/src/devices/cpu/upd7725/upd7725.cpp
+++ b/src/devices/cpu/upd7725/upd7725.cpp
@@ -583,8 +583,8 @@ void necdsp_device::exec_ld(uint32_t opcode) {
case 5: regs.rp = id; break;
case 6: regs.dr = id; regs.sr.rqm = 1; break;
case 7: regs.sr = (regs.sr & 0x907c) | (id & ~0x907c);
- m_out_p0_cb(regs.sr&0x1);
- m_out_p1_cb((regs.sr&0x2)>>1);
+ m_out_p0_cb(regs.sr.p0);
+ m_out_p1_cb(regs.sr.p1);
break;
case 8: regs.so = BITSWAP16(id, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB first output, output tapped at bit 15 shifting left
case 9: regs.so = id; break; //MSB first output, output tapped at bit 15 shifting left