diff options
author | Sterophonick <34801996+Sterophonick@users.noreply.github.com> | 2020-01-22 20:13:16 -0700 |
---|---|---|
committer | R. Belmont <rb6502@users.noreply.github.com> | 2020-01-22 22:13:16 -0500 |
commit | daba4e7ca7a5c5de18732138225dbe1a8af8c89b (patch) | |
tree | 9327ea9f72733c27478b7416f2f45c91cd16c8c4 | |
parent | 1a5b900759f491bf6b59be67b5446b0a1becb04b (diff) |
gigatron: start emulating cpu, remove unnecessary include (#6201)
* gigatron: start emulating cpu, remove unnecessary include
* gigatron: start on the registers
* gigatron: fixed duplication
(nw)
* gigaton: start on aluOp
(nw)
* gigatron: Fix a copy and paste error
(nw)
* gigatron: start instruction decoding
(nw)
also, there is an undefined reference to gigatron_cpu_device and I can't figure out why. please help
* gigatron: initialize registers
* gigatron: fix
(nw)
* gigatron: add the other ROM versions
(nw)
* gigatron: Fix ROM order
(nw)
-rw-r--r-- | src/devices/cpu/gigatron/gigatron.cpp | 68 | ||||
-rw-r--r-- | src/devices/cpu/gigatron/gigatron.h | 15 | ||||
-rw-r--r-- | src/mame/drivers/gigatron.cpp | 11 |
3 files changed, 80 insertions, 14 deletions
diff --git a/src/devices/cpu/gigatron/gigatron.cpp b/src/devices/cpu/gigatron/gigatron.cpp index 64a3b265bd6..5791d07e855 100644 --- a/src/devices/cpu/gigatron/gigatron.cpp +++ b/src/devices/cpu/gigatron/gigatron.cpp @@ -5,13 +5,15 @@ * Skeleton device for Gigatron CPU Core * *****************************************************************************/ + + //https://github.com/PhilThomas/gigatron/blob/master/src/gigatron.js #include "emu.h" #include "gigatron.h" #include "gigatrondasm.h" -DEFINE_DEVICE_TYPE(GTRON, gigatron_cpu_device, "gigatron", "Gigatron CPU Device") +DEFINE_DEVICE_TYPE(GTRON, gigatron_cpu_device, "gigatron_cpu", "Gigatron CPU Device") /* FLAGS */ @@ -48,9 +50,28 @@ void gigatron_cpu_device::execute_run() opcode = gigatron_readop(m_pc); m_pc++; + + uint8_t op = (opcode >> 13) & 0x0007; + uint8_t mode = (opcode >> 10) & 0x0007; + uint8_t bus = (opcode >> 8) & 0x0003; + uint8_t d = (opcode >> 0) & 0x00ff; - switch( opcode ) + switch( op) { + case 0: + case 1: + case 2: + case 3: + case 4: + case 5: + aluOp(op, mode, bus, d); + break; + case 6: + storeOp(op, mode, bus, d); + break; + case 7: + branchOp(op, mode, bus, d); + break; default: gigatron_illegal(); break; @@ -65,18 +86,45 @@ void gigatron_cpu_device::device_start() m_program = &space(AS_PROGRAM); m_data = &space(AS_DATA); - save_item(NAME(m_pc)); - save_item(NAME(m_flags)); - - // Register state for debugger - state_add( GTRON_R0, "PC", m_pc ).formatstr("%02X"); - state_add( STATE_GENPC, "GENPC", m_r[7] ).noshow(); - state_add( STATE_GENPCBASE, "CURPC", m_r[7] ).noshow(); - state_add( STATE_GENFLAGS, "GENFLAGS", m_flags ).noshow(); + init(); +} +void gigatron_cpu_device::init() +{ + ac = 0; + x = 0; + y = 0; + m_pc = 0; + state_add(GTRON_A, "AC", ac); + state_add(GTRON_X, "X", x); + state_add(GTRON_Y, "Y", y); + set_icountptr(m_icount); } +void gigatron_cpu_device::branchOp(int op, int mode, int bus, int d) +{ +} + +void gigatron_cpu_device::aluOp(int op, int mode, int bus, int d) +{ + int b; + switch(bus) { + case 0: + b = d; + break; + case 1: + case 2: + b = ac; + break; + case 3: + } +} + +void gigatron_cpu_device::storeOp(int op, int mode, int bus, int d) +{ +} + void gigatron_cpu_device::device_reset() { } diff --git a/src/devices/cpu/gigatron/gigatron.h b/src/devices/cpu/gigatron/gigatron.h index 27099efa572..12dbc75ef24 100644 --- a/src/devices/cpu/gigatron/gigatron.h +++ b/src/devices/cpu/gigatron/gigatron.h @@ -5,6 +5,8 @@ * Skeleton Device for Gigatron CPU Core * *****************************************************************************/ + + //https://github.com/PhilThomas/gigatron/blob/master/src/gigatron.js #ifndef MAME_CPU_GTRON_H #define MAME_CPU_GTRON_H @@ -13,8 +15,7 @@ enum { - GTRON_R0=1, GTRON_R1, GTRON_R2, GTRON_R3, - GTRON_R4, GTRON_R5, GTRON_R6, GTRON_R7 + GTRON_AC=1, GTRON_X, GTRON_Y }; @@ -44,6 +45,16 @@ protected: // device_memory_interface overrides virtual space_config_vector memory_space_config() const override; + + void branchOp(int op, int mode, int bus, int d); + void aluOp(int op, int mode, int bus, int d); + void storeOp(int op, int mode, int bus, int d); + + uint8_t ac; + uint8_t x; + uint8_t y; + + virtual void init(); private: address_space_config m_program_config; diff --git a/src/mame/drivers/gigatron.cpp b/src/mame/drivers/gigatron.cpp index 9b5953de55f..074c37c89d6 100644 --- a/src/mame/drivers/gigatron.cpp +++ b/src/mame/drivers/gigatron.cpp @@ -12,7 +12,6 @@ #include "emu.h" #include "cpu/gigatron/gigatron.h" -#include "machine/nvram.h" #include "screen.h" #include "speaker.h" @@ -81,13 +80,21 @@ void gigatron_state::gigatron(machine_config &config) screen.set_visarea(0, 640-1, 0, 480-1); screen.set_screen_update(FUNC(gigatron_state::screen_update)); + /* sound hardware */ SPEAKER(config, "mono").front_center(); } ROM_START( gigatron ) ROM_REGION( 0x20000, "maincpu", 0 ) - ROM_LOAD( "gigatron.rom", 0x0000, 0x20000, CRC(78995109) SHA1(2395fc48e64099836111f5aeca39ddbf4650ea4e) ) + ROM_SYSTEM_BIOS(0, "v4", "Gigatron ROM V4") + ROMX_LOAD( "ROMv4.rom", 0x0000, 0x20000, CRC(78995109) SHA1(2395fc48e64099836111f5aeca39ddbf4650ea4e),ROM_BIOS(0)) + ROM_SYSTEM_BIOS(1, "v3", "Gigatron ROM V3") + ROMX_LOAD( "ROMv3.rom", 0x0000, 0x20000, CRC(38b177c1) SHA1(959268069e761a01d620396eedb9abc1ee63c421),ROM_BIOS(1)) + ROM_SYSTEM_BIOS(2, "v2", "Gigatron ROM V2") + ROMX_LOAD( "ROMv2.rom", 0x0000, 0x20000, CRC(45f4902c) SHA1(c93f417d589144b912c79f85b9e942d66242c2c3),ROM_BIOS(2)) + ROM_SYSTEM_BIOS(3, "v1", "Gigatron ROM V1") + ROMX_LOAD( "ROMv1.rom", 0x0000, 0x20000, CRC(c6c9c09f) SHA1(e5758d5cc467c3476bd8f992fd45dfcdf06d0430),ROM_BIOS(3)) ROM_END COMP(2018, gigatron, 0, 0, gigatron, gigatron, gigatron_state, empty_init, "Marcel van Kervinck", "Gigatron TTL Microcomputer", MACHINE_IS_SKELETON) |