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author Lord-Nightmare <Lord-Nightmare@users.noreply.github.com>2017-09-17 02:14:18 -0400
committer Lord-Nightmare <Lord-Nightmare@users.noreply.github.com>2017-09-17 02:14:18 -0400
commitd54e33ec23916bc5b867d13721373473ad881061 (patch)
tree1620548876d7e8d6f2d71ad0157c8e764436b4de
parent093ae135572d78b5ec35671b86d1b1e52f61b17a (diff)
notetaker.cpp: add the disk data separator state machine prom, based on the source listing [Lord Nightmare]
-rw-r--r--src/mame/drivers/notetaker.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mame/drivers/notetaker.cpp b/src/mame/drivers/notetaker.cpp
index b38ce5777a9..2814b776818 100644
--- a/src/mame/drivers/notetaker.cpp
+++ b/src/mame/drivers/notetaker.cpp
@@ -934,7 +934,7 @@ ROM_START( notetakr )
ROM_REGION( 0x400, "kbmcu", ROMREGION_ERASEFF )
ROM_LOAD( "keyboard.i8748.a10a", 0x000, 0x400, NO_DUMP ) // keyboard mcu which handles key scanning as well as reading the mouse quadratures, and issues state responses if requested by the iocpu
ROM_REGION( 0x1000, "proms", ROMREGION_ERASEFF )
- ROM_LOAD( "disksep.prom.82s147.a4", 0x000, 0x200, NO_DUMP ) // disk data separator prom from the disk/display module board; there are two different versions of this prom, both generated by BCPL programs, one from 1978 (Single density only?) and one from 1979.
+ ROM_LOAD( "disksep.82s147.a4", 0x000, 0x200, CRC(38363714) SHA1(c995d2702573f5afb5fc919150d3a5661013f999) ) // disk data separator prom from the disk/display module board; there are two different versions of this prom, both generated by BCPL programs, one from 1978 (Single density only? seems very buggy and might not even work) and one from 1979 (which seems like it should work and appears here). Note that the bit order for the state counter (data bits 6,5,4,3) may be reversed vs the real machine, but since the prom address bus is the only thing that ever sees the prom data bus, this prom will work even if the bit order for those bits is backwards.
ROM_LOAD( "timingprom.82s147.b1", 0x200, 0x200, CRC(3003b50a) SHA1(77d9ffe4716c2297708b8e5ebce7f930619c3cc3) ) // memory cas/ras/write state machine prom from the memory address logic board; the contents of this are listed in http://www.bitsavers.org/pdf/xerox/notetaker/schematics/19781027_Memory_Address_Timing.pdf
ROM_LOAD( "memreqprom.82s126.d9", 0x400, 0x100, CRC(56b2be8b) SHA1(5df0579ed8afeb59113700be6f2982ef85f64b44) ) // SETMEMRQ memory timing prom from the disk/display module board; The equations for this one are actually listed on the schematic and the prom dump can be generated from these:
/*