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author AJR <ajrhacker@users.noreply.github.com>2017-06-15 19:44:24 -0400
committer AJR <ajrhacker@users.noreply.github.com>2017-06-15 19:44:24 -0400
commitd046fd723fd1e1d77370e495ba01172380cb2dbe (patch)
tree53be6574667b8e925eda50cd9bd2b1b71cc6fa3e
parent3f8c7e2244e28e4bae592f5a8fe635f5f14f5a26 (diff)
New device: TE7750 Super I/O Expander
-rw-r--r--scripts/src/machine.lua12
-rw-r--r--scripts/target/mame/arcade.lua1
-rw-r--r--scripts/target/mame/mess.lua1
-rw-r--r--src/devices/machine/te7750.cpp343
-rw-r--r--src/devices/machine/te7750.h111
-rw-r--r--src/mame/drivers/taito_f2.cpp124
-rw-r--r--src/mame/includes/taito_f2.h4
7 files changed, 509 insertions, 87 deletions
diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua
index d24828492e2..b69727f1475 100644
--- a/scripts/src/machine.lua
+++ b/scripts/src/machine.lua
@@ -2381,6 +2381,18 @@ end
---------------------------------------------------
--
+--@src/devices/machine/te7750.h,MACHINES["TE7750"] = true
+---------------------------------------------------
+
+if (MACHINES["TE7750"]~=null) then
+ files {
+ MAME_DIR .. "src/devices/machine/te7750.cpp",
+ MAME_DIR .. "src/devices/machine/te7750.h",
+ }
+end
+
+---------------------------------------------------
+--
--@src/devices/machine/timekpr.h,MACHINES["TIMEKPR"] = true
---------------------------------------------------
diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua
index 6bf5d7f52cf..e01edc73045 100644
--- a/scripts/target/mame/arcade.lua
+++ b/scripts/target/mame/arcade.lua
@@ -549,6 +549,7 @@ MACHINES["SMC91C9X"] = true
MACHINES["SMPC"] = true
MACHINES["STVCD"] = true
MACHINES["TC0091LVC"] = true
+MACHINES["TE7750"] = true
MACHINES["TIMEKPR"] = true
MACHINES["TMP68301"] = true
--MACHINES["TMS5501"] = true
diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua
index 8524bd9c5ca..24ffe99edd8 100644
--- a/scripts/target/mame/mess.lua
+++ b/scripts/target/mame/mess.lua
@@ -537,6 +537,7 @@ MACHINES["SMC91C9X"] = true
MACHINES["SMPC"] = true
MACHINES["STVCD"] = true
MACHINES["TC0091LVC"] = true
+--MACHINES["TE7750"] = true
MACHINES["TIMEKPR"] = true
MACHINES["TMC0430"] = true
MACHINES["TMP68301"] = true
diff --git a/src/devices/machine/te7750.cpp b/src/devices/machine/te7750.cpp
new file mode 100644
index 00000000000..6813557371f
--- /dev/null
+++ b/src/devices/machine/te7750.cpp
@@ -0,0 +1,343 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/**********************************************************************
+
+ TE7750 Super I/O Expander
+ by Tokyo Electron Device Ltd. (TEL)
+
+ The TE7750 and its successors are CMOS I/O expanders equipped with
+ nine 8-bit parallel ports, which can programmed for input or
+ output either in hardware or in software.
+
+ In soft mode (IOS2-0 = 0), control registers CR1, CR2 and CR3 to
+ set P1, P3, P4, P6, P7, P9 for byte input or output and P20-23,
+ P24-27, P50-53, P54-57 for separate nibble input or output. All
+ ports are set for input upon reset.
+
+ In hard mode, the state of the IOS pins upon reset determines
+ how many of P2, P3, P4, P5, P6 and P7 are set for output. P1 is
+ always set for input and P9 is always set for output. CR1-CR3 are
+ not used and separate nibble I/O is not available.
+
+ CR0 determines the direction of each bit of P8 in both modes.
+
+ The MS pin is offered for dual bus compatibility. When MS is 0,
+ RD and WR need to be brought active low separately. When MS is 1,
+ RD becomes a Motorola-style R/W control signal (R = 1, W = 0),
+ and WR becomes an active-low "M Enable" input.
+
+ TE7750, TE7751, TE7753 and TE7754 appear to be functionally
+ almost identical, though only the last two are pin-compatible.
+ One known difference is that TE7753 resets all output latches to
+ "H" and TE7754 resets them to "L" (the latches can be written in
+ soft mode before the ports are set for output). TE7750 and TE7751
+ probably do either one or the other, but available documentation
+ is incomplete.
+
+***********************************************************************
+
+ A3 A2 A1 A0 Register D7 D6 D5 D4 D3 D2 D1 D0
+ ----------- -------- -- -- -- -- -- -- -- --
+ 0 0 0 0 Port 1 R/W R/W R/W R/W R/W R/W R/W R/W
+ 0 0 0 1 Port 2 R/W R/W R/W R/W R/W R/W R/W R/W
+ 0 0 1 0 Port 3 R/W R/W R/W R/W R/W R/W R/W R/W
+ 0 0 1 1 Port 4 R/W R/W R/W R/W R/W R/W R/W R/W
+ 0 1 0 0 Port 5 R/W R/W R/W R/W R/W R/W R/W R/W
+ 0 1 0 1 Port 6 R/W R/W R/W R/W R/W R/W R/W R/W
+ 0 1 1 0 Port 7 R/W R/W R/W R/W R/W R/W R/W R/W
+ 0 1 1 1 Port 8 R/W R/W R/W R/W R/W R/W R/W R/W
+ 1 0 0 0 Port 9 R/W R/W R/W R/W R/W R/W R/W R/W
+ 1 0 0 1 CR0 W W W W W W W W
+ 1 0 1 0 CR1 W* W* W* W*
+ 1 0 1 1 CR2 W* W* W* W*
+ 1 1 0 0 CR3 W* W* W* W*
+
+ * CR1-CR3 are only writable in soft mode.
+
+***********************************************************************
+
+ Table of pin assignments
+
+ ---Parallel Port 1---
+ P10 P11 P12 P13 P14 P15 P16 P17
+ TE7750 4 5 6 7 8 9 10 11
+ TE7751 20 21 22 23 24 25 26 27
+ TE7753 17 18 19 20 21 22 23 24
+
+ ---Parallel Port 2---
+ P10 P11 P12 P13 P14 P15 P16 P17
+ TE7750 22 23 24 25 26 27 33 34
+ TE7751 28 29 30 31 32 33 34 35
+ TE7753 27 28 29 30 31 32 33 34
+
+ ---Parallel Port 3---
+ P30 P31 P32 P33 P34 P35 P36 P37
+ TE7750 43 46 47 48 49 50 51 52
+ TE7751 36 37 38 39 41 42 43 44
+ TE7753 35 36 37 38 39 40 41 42
+
+ ---Parallel Port 4---
+ P40 P41 P42 P43 P44 P45 P46 P47
+ TE7750 12 13 16 17 18 19 20 21
+ TE7751 45 46 47 48 49 50 51 52
+ TE7753 43 44 45 46 47 48 49 52
+
+ ---Parallel Port 5---
+ P50 P51 P52 P53 P54 P55 P56 P57
+ TE7750 35 36 37 38 39 40 41 42
+ TE7751 74 75 76 77 78 79 80 81
+ TE7753 73 74 77 78 79 80 81 82
+
+ ---Parallel Port 6---
+ P60 P61 P62 P63 P64 P65 P66 P67
+ TE7750 66 67 68 69 70 71 72 73
+ TE7751 82 83 84 85 86 87 88 89
+ TE7753 83 84 85 86 87 88 89 90
+
+ ---Parallel Port 7---
+ P70 P71 P72 P73 P74 P75 P76 P77
+ TE7750 53 54 55 56 60 63 64 65
+ TE7751 92 93 94 95 96 97 98 99
+ TE7753 91 92 93 94 95 96 97 98
+
+ ---Parallel Port 8---
+ P80 P81 P82 P83 P84 P85 P86 P87
+ TE7750 80 81 82 83 84 85 86 87
+ TE7751 100 1 2 3 4 5 6 7
+ TE7753 99 2 3 4 5 6 7 8
+
+ ---Parallel Port 9---
+ P90 P91 P92 P93 P94 P95 P96 P97
+ TE7750 76 77 78 79 93 94 95 96
+ TE7751 9 10 11 12 14 15 17 18
+ TE7753 9 10 11 12 13 14 15 16
+
+ ---Bidirectional Data Bus---
+ D0 D1 D2 D3 D4 D5 D6 D7
+ TE7750 100 101 102 103 106 107 108 109
+ TE7751 53 54 55 56 57 58 59 60
+ TE7753 53 54 55 56 57 58 59 60
+
+ ---Address Inputs---
+ A0 A1 A2 A3
+ TE7750 110 111 112 113
+ TE7751 66 67 68 69
+ TE7753 65 66 67 68
+
+ ---Input/Output Select---
+ RW0 RW1 RW2 - TE7750
+ IOS0 IOS1 IOS2 - TE7751/TE7753
+ TE7750 97 98 99
+ TE7751 70 71 72
+ TE7753 69 70 71
+
+ ---Chip Select---
+ #CS #RD #WR - MS = 0
+ #CS R#W #MEN - MS = 1
+ TE7750 116 114 115
+ TE7751 63 64 65
+ TE7753 62 63 64
+
+ ---Other Inputs---
+ MS RESET
+ TE7750 3 120
+ TE7751 73 62
+ TE7753 72 61
+
+
+ TE7750: 14,44,74,104 - Vdd
+ 1,15,31,45,61,75,91,105 - Vss
+ 2,28,29,30,32,57,58,59,62,88,89,90,92,117,118,119 - NC
+
+ TE7751: 16,89 - Vdd
+ 8,13,19,40,61,90 - Vss
+
+ TE7753: 1,25,51,75 - Vdd
+ 26,50,76,100 - Vss
+
+**********************************************************************/
+
+#include "emu.h"
+#include "machine/te7750.h"
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+DEFINE_DEVICE_TYPE(TE7750, te7750_device, "te7750", "TE7750 Super I/O Expander")
+
+//**************************************************************************
+// DEVICE DEFINITION
+//**************************************************************************
+
+//-------------------------------------------------
+// te7750_device - constructor
+//-------------------------------------------------
+
+te7750_device::te7750_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : device_t(mconfig, TE7750, tag, owner, clock),
+ m_input_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}},
+ m_output_cb{{*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}, {*this}},
+ m_ios(*this)
+{
+ std::fill(std::begin(m_data_dir), std::end(m_data_dir), 0xff);
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void te7750_device::device_start()
+{
+ // resolve port callbacks
+ for (auto &cb : m_input_cb)
+ cb.resolve_safe(0xff);
+ for (auto &cb : m_output_cb)
+ cb.resolve_safe();
+
+ // resolve IOS (assume soft mode unless specified)
+ m_ios.resolve_safe(0);
+
+ // save state
+ save_item(NAME(m_data_latch));
+ save_item(NAME(m_data_dir));
+}
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void te7750_device::device_reset()
+{
+ // reset output latches to zero (guess based on ninjak coin counters)
+ std::fill(std::begin(m_data_latch), std::end(m_data_latch), 0);
+
+ // set ports for input or output
+ set_ios();
+}
+
+//-------------------------------------------------
+// set_port_dir - set data direction for a port
+//-------------------------------------------------
+
+void te7750_device::set_port_dir(int port, u8 dir)
+{
+ // set bitwise direction (1 = input, 0 = output)
+ u8 old_dir = m_data_dir[port];
+ m_data_dir[port] = dir;
+
+ // update outputs if lines were formerly set for input
+ if ((old_dir & ~dir) != 0)
+ {
+ logerror("Setting P%d & %02X for output (%02X latched)\n", port + 1, dir ^ 0xff, m_data_latch[port]);
+ m_output_cb[port](0, m_data_latch[port] | dir, dir ^ 0xff);
+ }
+}
+
+//-------------------------------------------------
+// set_ios - reset data direction for all ports
+//-------------------------------------------------
+
+void te7750_device::set_ios()
+{
+ // get state of IOS pins (0 for soft mode, 1-7 for hard mode)
+ u8 ios = m_ios() & 7;
+
+ // P1: always input in hard mode; reset to input in soft mode
+ set_port_dir(0, 0xff);
+
+ // P2-P7: set to input or output depending on IOS setting
+ for (int port = 1; port < 7; port++)
+ set_port_dir(port, (ios == 0 || ios > port) ? 0xff : 0x00);
+
+ // P8: reset to input in either mode
+ set_port_dir(7, 0xff);
+
+ // P9: always output in hard mode; reset to input in soft mode
+ set_port_dir(8, (ios == 0) ? 0xff : 0x00);
+}
+
+//-------------------------------------------------
+// read - read input port and/or output latch
+//-------------------------------------------------
+
+READ8_MEMBER(te7750_device::read)
+{
+ if (offset < 9)
+ {
+ // read back P[1-9] output latch
+ u8 data = m_data_latch[offset];
+ u8 dir = m_data_dir[offset];
+
+ // combine with P[1-9] input lines (if any were defined)
+ if (dir != 0x00)
+ data = (data & ~dir) | (m_input_cb[offset](0, dir) & dir);
+
+ // put data on the bus
+ return data;
+ }
+
+ logerror("Attempt to read from register with offset %X\n", offset);
+ return space.unmap();
+}
+
+//-------------------------------------------------
+// write - write to output latch or to a control
+// register
+//-------------------------------------------------
+
+WRITE8_MEMBER(te7750_device::write)
+{
+ if (offset < 9)
+ {
+ // set P[1-9] output latch
+ m_data_latch[offset] = data;
+
+ // update output lines (if any were defined)
+ u8 dir = m_data_dir[offset];
+ if (dir != 0xff)
+ m_output_cb[offset](0, data | dir, dir ^ 0xff);
+ }
+ else if (offset == 9)
+ {
+ // CR0: set direction for each bit of P80-P87
+ set_port_dir(7, data);
+ }
+ else if (offset == 10)
+ {
+ if ((m_ios() & 7) != 0)
+ logerror("Attempt to write %02X to CR1 in hard mode\n", data);
+ else
+ {
+ // CR1: set direction for P10-17, P20-P23, P24-P27 and P30-P37
+ set_port_dir(0, BIT(data, 4) ? 0xff : 0x00);
+ set_port_dir(1, (BIT(data, 3) ? 0xf0 : 0x00) | (BIT(data, 0) ? 0x0f : 0x00));
+ set_port_dir(2, BIT(data, 1) ? 0xff : 0x00);
+ }
+ }
+ else if (offset == 11)
+ {
+ if ((m_ios() & 7) != 0)
+ logerror("Attempt to write %02X to CR2 in hard mode\n", data);
+ else
+ {
+ // CR2: set direction for P40-47, P50-P53, P54-P57 and P60-P67
+ set_port_dir(3, BIT(data, 4) ? 0xff : 0x00);
+ set_port_dir(4, (BIT(data, 3) ? 0xf0 : 0x00) | (BIT(data, 0) ? 0x0f : 0x00));
+ set_port_dir(5, BIT(data, 1) ? 0xff : 0x00);
+ }
+ }
+ else if (offset == 12)
+ {
+ if ((m_ios() & 7) != 0)
+ logerror("Attempt to write %02X to CR3 in hard mode\n", data);
+ else
+ {
+ // CR3: set direction for P70-77 and P90-P97
+ set_port_dir(6, BIT(data, 4) ? 0xff : 0x00);
+ set_port_dir(8, BIT(data, 1) ? 0xff : 0x00);
+ }
+ }
+ else
+ logerror("Attempt to write %02X to register with offset %X\n", data, offset);
+}
diff --git a/src/devices/machine/te7750.h b/src/devices/machine/te7750.h
new file mode 100644
index 00000000000..cf79c572b61
--- /dev/null
+++ b/src/devices/machine/te7750.h
@@ -0,0 +1,111 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/**********************************************************************
+
+ TE7750 Super I/O Expander
+
+**********************************************************************/
+
+#ifndef DEVICES_MACHINE_TE7750_H
+#define DEVICES_MACHINE_TE7750_H
+
+#pragma once
+
+//**************************************************************************
+// CONFIGURATION MACROS
+//**************************************************************************
+
+#define MCFG_TE7750_IN_PORT1_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 0, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT2_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 1, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT3_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 2, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT4_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 3, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT5_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 4, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT6_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 5, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT7_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 6, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT8_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 7, DEVCB_##_devcb);
+#define MCFG_TE7750_IN_PORT9_CB(_devcb) \
+ devcb = &te7750_device::set_input_cb(*device, 8, DEVCB_##_devcb);
+
+#define MCFG_TE7750_OUT_PORT1_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 0, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT2_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 1, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT3_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 2, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT4_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 3, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT5_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 4, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT6_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 5, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT7_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 6, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT8_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 7, DEVCB_##_devcb);
+#define MCFG_TE7750_OUT_PORT9_CB(_devcb) \
+ devcb = &te7750_device::set_output_cb(*device, 8, DEVCB_##_devcb);
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> te7750_device
+
+class te7750_device : public device_t
+{
+public:
+ // construction/destruction
+ te7750_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // static configuration
+ template<class Object>
+ static devcb_base &set_input_cb(device_t &device, int p, Object &&obj)
+ {
+ assert(p >= 0 && p < 9);
+ return downcast<te7750_device &>(device).m_input_cb[p].set_callback(std::forward<Object>(obj));
+ }
+ template<class Object>
+ static devcb_base &set_output_cb(device_t &device, int p, Object &&obj)
+ {
+ assert(p >= 0 && p < 9);
+ return downcast<te7750_device &>(device).m_output_cb[p].set_callback(std::forward<Object>(obj));
+ }
+
+ // bus-compatible interface
+ DECLARE_READ8_MEMBER(read);
+ DECLARE_WRITE8_MEMBER(write);
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+private:
+ // internal helpers
+ void set_port_dir(int port, u8 dir);
+ void set_ios();
+
+ // input/output callbacks
+ devcb_read8 m_input_cb[9];
+ devcb_write8 m_output_cb[9];
+
+ // mode callback
+ devcb_read8 m_ios;
+
+ // internal state
+ u8 m_data_latch[9];
+ u8 m_data_dir[9];
+};
+
+// device type definition
+DECLARE_DEVICE_TYPE(TE7750, te7750_device)
+
+#endif // DEVICES_MACHINE_TE7750_H
diff --git a/src/mame/drivers/taito_f2.cpp b/src/mame/drivers/taito_f2.cpp
index 52f9b859d0b..92af05a0357 100644
--- a/src/mame/drivers/taito_f2.cpp
+++ b/src/mame/drivers/taito_f2.cpp
@@ -270,6 +270,7 @@ Notes:
#include "cpu/m68000/m68000.h"
#include "cpu/z80/z80.h"
#include "machine/rp5c01.h"
+#include "machine/te7750.h"
#include "machine/watchdog.h"
#include "sound/2203intf.h"
#include "sound/2610intf.h"
@@ -301,68 +302,16 @@ WRITE16_MEMBER(taitof2_state::growl_coin_word_w)/* what about coins 3&4 ?? */
}
}
-WRITE16_MEMBER(taitof2_state::taitof2_4p_coin_word_w)
+WRITE8_MEMBER(taitof2_state::taitof2_4p_coin_word_w)
{
- if (ACCESSING_BITS_0_7)
- {
- machine().bookkeeping().coin_lockout_w(0, ~data & 0x01);
- machine().bookkeeping().coin_lockout_w(1, ~data & 0x02);
- machine().bookkeeping().coin_lockout_w(2, ~data & 0x04);
- machine().bookkeeping().coin_lockout_w(3, ~data & 0x08);
- machine().bookkeeping().coin_counter_w(0, data & 0x10);
- machine().bookkeeping().coin_counter_w(1, data & 0x20);
- machine().bookkeeping().coin_counter_w(2, data & 0x40);
- machine().bookkeeping().coin_counter_w(3, data & 0x80);
- }
-}
-
-WRITE16_MEMBER(taitof2_state::ninjak_coin_word_w)
-{
- if (ACCESSING_BITS_8_15)
- {
- machine().bookkeeping().coin_lockout_w(0, ~data & 0x0100);
- machine().bookkeeping().coin_lockout_w(1, ~data & 0x0200);
- machine().bookkeeping().coin_lockout_w(2, ~data & 0x0400);
- machine().bookkeeping().coin_lockout_w(3, ~data & 0x0800);
- machine().bookkeeping().coin_counter_w(0, data & 0x1000);
- machine().bookkeeping().coin_counter_w(1, data & 0x2000);
- machine().bookkeeping().coin_counter_w(2, data & 0x4000);
- machine().bookkeeping().coin_counter_w(3, data & 0x8000);
- }
-}
-
-READ16_MEMBER(taitof2_state::ninjak_input_r)
-{
- switch (offset)
- {
- case 0x00:
- return (ioport("DSWA")->read() << 8);
-
- case 0x01:
- return (ioport("DSWB")->read() << 8);
-
- case 0x02:
- return (ioport("IN0")->read() << 8);
-
- case 0x03:
- return (ioport("IN1")->read() << 8);
-
- case 0x04:
- return (ioport("IN3")->read() << 8);
-
- case 0x05:
- return (ioport("IN4")->read() << 8);
-
- case 0x06:
- return (ioport("IN2")->read() << 8);
-
-// case 0x07:
-// return (coin_word & mem_mask);
- }
-
- logerror("CPU #0 PC %06x: warning - read unmapped input offset %06x\n", space.device().safe_pc(), offset);
-
- return 0xff;
+ machine().bookkeeping().coin_lockout_w(0, ~data & 0x01);
+ machine().bookkeeping().coin_lockout_w(1, ~data & 0x02);
+ machine().bookkeeping().coin_lockout_w(2, ~data & 0x04);
+ machine().bookkeeping().coin_lockout_w(3, ~data & 0x08);
+ machine().bookkeeping().coin_counter_w(0, data & 0x10);
+ machine().bookkeeping().coin_counter_w(1, data & 0x20);
+ machine().bookkeeping().coin_counter_w(2, data & 0x40);
+ machine().bookkeeping().coin_counter_w(3, data & 0x80);
}
READ16_MEMBER(taitof2_state::cameltry_paddle_r)
@@ -897,15 +846,8 @@ static ADDRESS_MAP_START( footchmp_map, AS_PROGRAM, 16, taitof2_state )
AM_RANGE(0x430000, 0x43002f) AM_DEVREADWRITE("tc0480scp", tc0480scp_device, ctrl_word_r, ctrl_word_w)
AM_RANGE(0x500000, 0x50001f) AM_DEVWRITE8("tc0360pri", tc0360pri_device, write, 0x00ff) /* 500002 written like a watchdog?! */
AM_RANGE(0x600000, 0x601fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
- AM_RANGE(0x700006, 0x700007) AM_WRITE(taitof2_4p_coin_word_w)
- AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSWA")
- AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSWB")
- AM_RANGE(0x700004, 0x700005) AM_READ_PORT("IN2")
- AM_RANGE(0x70000a, 0x70000b) AM_READ_PORT("IN0")
- AM_RANGE(0x70000c, 0x70000d) AM_READ_PORT("IN1")
- AM_RANGE(0x70000e, 0x70000f) AM_READ_PORT("IN3")
- AM_RANGE(0x700010, 0x700011) AM_READ_PORT("IN4")
- AM_RANGE(0x800000, 0x800001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) /* ??? */
+ AM_RANGE(0x700000, 0x70001f) AM_DEVREADWRITE8("te7750", te7750_device, read, write, 0x00ff)
+ AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE("watchdog", watchdog_timer_device, reset16_r, reset16_w) /* ??? */
AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0x00ff)
AM_RANGE(0xa00002, 0xa00003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0x00ff)
ADDRESS_MAP_END
@@ -942,8 +884,7 @@ static ADDRESS_MAP_START( ninjak_map, AS_PROGRAM, 16, taitof2_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x100000, 0x10ffff) AM_RAM
AM_RANGE(0x200000, 0x201fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
- AM_RANGE(0x300000, 0x30000f) AM_READ(ninjak_input_r)
- AM_RANGE(0x30000e, 0x30000f) AM_WRITE(ninjak_coin_word_w)
+ AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE8("te7750", te7750_device, read, write, 0xff00)
AM_RANGE(0x380000, 0x380001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) /* ??? */
AM_RANGE(0x400000, 0x400001) AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0xff00)
AM_RANGE(0x400002, 0x400003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0xff00)
@@ -1060,14 +1001,7 @@ static ADDRESS_MAP_START( deadconx_map, AS_PROGRAM, 16, taitof2_state )
AM_RANGE(0x430000, 0x43002f) AM_DEVREADWRITE("tc0480scp", tc0480scp_device, ctrl_word_r, ctrl_word_w)
AM_RANGE(0x500000, 0x50001f) AM_DEVWRITE8("tc0360pri", tc0360pri_device, write, 0x00ff) /* uses 500002 like a watchdog !? */
AM_RANGE(0x600000, 0x601fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
- AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSWA")
- AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSWB")
- AM_RANGE(0x700004, 0x700005) AM_READ_PORT("IN2")
- AM_RANGE(0x700006, 0x700007) AM_WRITE(taitof2_4p_coin_word_w)
- AM_RANGE(0x70000a, 0x70000b) AM_READ_PORT("IN0")
- AM_RANGE(0x70000c, 0x70000d) AM_READ_PORT("IN1")
- AM_RANGE(0x70000e, 0x70000f) AM_READ_PORT("IN3")
- AM_RANGE(0x700010, 0x700011) AM_READ_PORT("IN4")
+ AM_RANGE(0x700000, 0x70001f) AM_DEVREADWRITE8("te7750", te7750_device, read, write, 0x00ff)
AM_RANGE(0x800000, 0x800001) AM_DEVWRITE("watchdog", watchdog_timer_device, reset16_w) /* ??? */
AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0xff00)
AM_RANGE(0xa00002, 0xa00003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0xff00)
@@ -2953,6 +2887,18 @@ static MACHINE_CONFIG_DERIVED( taito_f2_tc0510nio, taito_f2 )
MCFG_PALETTE_FORMAT(xRRRRRGGGGGBBBBB)
MACHINE_CONFIG_END
+static MACHINE_CONFIG_DERIVED( taito_f2_te7750, taito_f2 )
+ MCFG_DEVICE_ADD("te7750", TE7750, 0)
+ MCFG_TE7750_IN_PORT1_CB(IOPORT("DSWA"))
+ MCFG_TE7750_IN_PORT2_CB(IOPORT("DSWB"))
+ MCFG_TE7750_IN_PORT3_CB(IOPORT("IN2"))
+ MCFG_TE7750_OUT_PORT4_CB(WRITE8(taitof2_state, taitof2_4p_coin_word_w))
+ MCFG_TE7750_IN_PORT6_CB(IOPORT("IN0"))
+ MCFG_TE7750_IN_PORT7_CB(IOPORT("IN1"))
+ MCFG_TE7750_IN_PORT8_CB(IOPORT("IN3"))
+ MCFG_TE7750_IN_PORT9_CB(IOPORT("IN4"))
+MACHINE_CONFIG_END
+
static MACHINE_CONFIG_DERIVED( finalb, taito_f2_tc0220ioc )
@@ -3251,7 +3197,7 @@ static MACHINE_CONFIG_DERIVED( mjnquest, taito_f2 )
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( footchmp, taito_f2 )
+static MACHINE_CONFIG_DERIVED( footchmp, taito_f2_te7750 )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
@@ -3282,7 +3228,7 @@ static MACHINE_CONFIG_DERIVED( footchmpbl, footchmp )
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( hthero, taito_f2 )
+static MACHINE_CONFIG_DERIVED( hthero, taito_f2_te7750 )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
@@ -3362,6 +3308,16 @@ static MACHINE_CONFIG_DERIVED( ninjak, taito_f2 )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(ninjak_map)
+ MCFG_DEVICE_ADD("te7750", TE7750, 0)
+ MCFG_TE7750_IN_PORT1_CB(IOPORT("DSWA"))
+ MCFG_TE7750_IN_PORT2_CB(IOPORT("DSWB"))
+ MCFG_TE7750_IN_PORT3_CB(IOPORT("IN0"))
+ MCFG_TE7750_IN_PORT4_CB(IOPORT("IN1"))
+ MCFG_TE7750_IN_PORT5_CB(IOPORT("IN3"))
+ MCFG_TE7750_IN_PORT6_CB(IOPORT("IN4"))
+ MCFG_TE7750_IN_PORT7_CB(IOPORT("IN2"))
+ MCFG_TE7750_OUT_PORT8_CB(WRITE8(taitof2_state, taitof2_4p_coin_word_w))
+
/* video hardware */
MCFG_VIDEO_START_OVERRIDE(taitof2_state,taitof2_ninjak)
MCFG_SCREEN_MODIFY("screen")
@@ -3520,7 +3476,7 @@ static MACHINE_CONFIG_DERIVED( yesnoj, taito_f2 )
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( deadconx, taito_f2 )
+static MACHINE_CONFIG_DERIVED( deadconx, taito_f2_te7750 )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
@@ -3544,7 +3500,7 @@ static MACHINE_CONFIG_DERIVED( deadconx, taito_f2 )
MACHINE_CONFIG_END
-static MACHINE_CONFIG_DERIVED( deadconxj, taito_f2 )
+static MACHINE_CONFIG_DERIVED( deadconxj, taito_f2_te7750 )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
diff --git a/src/mame/includes/taito_f2.h b/src/mame/includes/taito_f2.h
index 9e6514e4749..28d1854faa6 100644
--- a/src/mame/includes/taito_f2.h
+++ b/src/mame/includes/taito_f2.h
@@ -115,9 +115,7 @@ public:
DECLARE_WRITE8_MEMBER(coin_nibble_w);
DECLARE_WRITE16_MEMBER(growl_coin_word_w);
- DECLARE_WRITE16_MEMBER(taitof2_4p_coin_word_w);
- DECLARE_WRITE16_MEMBER(ninjak_coin_word_w);
- DECLARE_READ16_MEMBER(ninjak_input_r);
+ DECLARE_WRITE8_MEMBER(taitof2_4p_coin_word_w);
DECLARE_READ16_MEMBER(cameltry_paddle_r);
DECLARE_READ16_MEMBER(mjnquest_dsw_r);
DECLARE_READ16_MEMBER(mjnquest_input_r);