diff options
author | 2016-09-27 17:41:24 +0200 | |
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committer | 2016-09-27 17:41:24 +0200 | |
commit | c8b7b13ca5a9eecb6d0dd1c7b1653eb8266a4d54 (patch) | |
tree | 9747077e25592e0984e8708c0bdbdcdc08b98ab0 | |
parent | 1c12f1f20d077c7c8536744c3bd30ccab4aecd42 (diff) |
More meat to SCI
-rw-r--r-- | src/devices/cpu/sh2/sh7604_bus.cpp | 1 | ||||
-rw-r--r-- | src/devices/cpu/sh2/sh7604_bus.h | 4 | ||||
-rw-r--r-- | src/devices/cpu/sh2/sh7604_sci.cpp | 91 | ||||
-rw-r--r-- | src/devices/cpu/sh2/sh7604_sci.h | 32 |
4 files changed, 120 insertions, 8 deletions
diff --git a/src/devices/cpu/sh2/sh7604_bus.cpp b/src/devices/cpu/sh2/sh7604_bus.cpp index 70705931d7f..19b0df01740 100644 --- a/src/devices/cpu/sh2/sh7604_bus.cpp +++ b/src/devices/cpu/sh2/sh7604_bus.cpp @@ -5,7 +5,6 @@ SH7604 BUS Controller Lies at 0xffffffe0-0xffffffff - TODO: diff --git a/src/devices/cpu/sh2/sh7604_bus.h b/src/devices/cpu/sh2/sh7604_bus.h index b663b4ee4de..df796fa371f 100644 --- a/src/devices/cpu/sh2/sh7604_bus.h +++ b/src/devices/cpu/sh2/sh7604_bus.h @@ -1,8 +1,8 @@ // license:BSD-3-Clause -// copyright-holders:<author_name> +// copyright-holders:Angelo Salese /*************************************************************************** -Template for skeleton device + SH7604 BUS Controller ***************************************************************************/ diff --git a/src/devices/cpu/sh2/sh7604_sci.cpp b/src/devices/cpu/sh2/sh7604_sci.cpp index b341c88f509..21b06b7bc7c 100644 --- a/src/devices/cpu/sh2/sh7604_sci.cpp +++ b/src/devices/cpu/sh2/sh7604_sci.cpp @@ -1,8 +1,14 @@ // license:BSD-3-Clause -// copyright-holders:<author_name> +// copyright-holders:Angelo Salese /*************************************************************************** -Template for skeleton device + SH7604 SCI Controller + + Lies at 0xfffffe00-0xfffffe0f + + TODO: + - diserial; + - CPU callbacks for RX and TX; ***************************************************************************/ @@ -23,8 +29,83 @@ const device_type SH7604_SCI = &device_creator<sh7604_sci_device>; // LIVE DEVICE //************************************************************************** -static ADDRESS_MAP_START( sci_regs, AS_0, 8, sh7604_sci_device ) +READ8_MEMBER(sh7604_sci_device::serial_mode_r) +{ + return m_smr; +} + +WRITE8_MEMBER(sh7604_sci_device::serial_mode_w) +{ + m_smr = data; + + logerror("%s: serial mode set:\n",tag()); + logerror("\tCommunication Mode: %s mode\n",data & 0x80 ? "clocked synchronous" : "asynchronous"); + logerror("\tCharacter Length: %s mode\n",data & 0x40 ? "7-bit" : "8-bit"); + logerror("\tParity Enable: %s\n",data & 0x20 ? "yes" : "no"); + logerror("\tParity Mode: %s\n",data & 0x10 ? "Odd" : "Even"); + logerror("\tStop bits: %s\n",data & 0x08 ? "2" : "1"); + logerror("\tMultiprocessor mode: %s\n",data & 0x04 ? "yes" : "no"); + logerror("\tClock select: clock/%d\n",4 << ((data & 0x03)*2)); +} + +READ8_MEMBER(sh7604_sci_device::serial_control_r) +{ + return m_scr; +} + +WRITE8_MEMBER(sh7604_sci_device::serial_control_w) +{ + m_scr = data; + + if(data & 0x30) + throw emu_fatalerror("%s: enabled serial control %02x\n", tag(),data); +} + +READ8_MEMBER(sh7604_sci_device::serial_status_r) +{ + return m_ssr; +} + +WRITE8_MEMBER(sh7604_sci_device::serial_ack_w) +{ + // TODO: verify this + m_ssr = (m_ssr & 0x06) | (m_ssr & data & 0xf9); +} + +READ8_MEMBER(sh7604_sci_device::bitrate_r ) +{ + return m_brr; +} + +WRITE8_MEMBER(sh7604_sci_device::bitrate_w ) +{ + m_brr = data; +} + +READ8_MEMBER(sh7604_sci_device::transmit_data_r) +{ + // ... + return 0; +} + +WRITE8_MEMBER(sh7604_sci_device::transmit_data_w) +{ + // ... +} +READ8_MEMBER(sh7604_sci_device::receive_data_r) +{ + // ... + return 0; +} + +static ADDRESS_MAP_START( sci_regs, AS_0, 8, sh7604_sci_device ) + AM_RANGE(0x00, 0x00) AM_READWRITE(serial_mode_r, serial_mode_w) + AM_RANGE(0x01, 0x01) AM_READWRITE(bitrate_r, bitrate_w) + AM_RANGE(0x02, 0x02) AM_READWRITE(serial_control_r,serial_control_w) + AM_RANGE(0x03, 0x03) AM_READWRITE(transmit_data_r, transmit_data_w) + AM_RANGE(0x04, 0x04) AM_READWRITE(serial_status_r, serial_ack_w) + AM_RANGE(0x05, 0x05) AM_READ(receive_data_r) ADDRESS_MAP_END //------------------------------------------------- @@ -60,6 +141,10 @@ void sh7604_sci_device::device_start() void sh7604_sci_device::device_reset() { + m_smr = 0; + m_scr = 0; + m_ssr = STATUS_TDRE|STATUS_TEND; //0x84; + m_brr = 0xff; } diff --git a/src/devices/cpu/sh2/sh7604_sci.h b/src/devices/cpu/sh2/sh7604_sci.h index a666d5c64e4..66e364f0cfe 100644 --- a/src/devices/cpu/sh2/sh7604_sci.h +++ b/src/devices/cpu/sh2/sh7604_sci.h @@ -1,8 +1,8 @@ // license:BSD-3-Clause -// copyright-holders:<author_name> +// copyright-holders:Angelo Salese /*************************************************************************** -Template for skeleton device + SH7604 SCI Controller ***************************************************************************/ @@ -11,6 +11,17 @@ Template for skeleton device #ifndef __SH7604_SCIDEV_H__ #define __SH7604_SCIDEV_H__ +enum { + STATUS_MPBT = 1 << 0, + STATUS_MPB = 1 << 1, + STATUS_TEND = 1 << 2, + STATUS_PER = 1 << 3, + STATUS_FER = 1 << 4, + STATUS_ORER = 1 << 5, + STATUS_RDRF = 1 << 6, + STATUS_TDRE = 1 << 7 +}; + //************************************************************************** @@ -36,6 +47,19 @@ public: // I/O operations DECLARE_WRITE8_MEMBER( write ); DECLARE_READ8_MEMBER( read ); + + DECLARE_READ8_MEMBER( serial_mode_r ); + DECLARE_WRITE8_MEMBER( serial_mode_w ); + DECLARE_READ8_MEMBER( bitrate_r ); + DECLARE_WRITE8_MEMBER( bitrate_w ); + DECLARE_READ8_MEMBER( serial_control_r ); + DECLARE_WRITE8_MEMBER( serial_control_w ); + + DECLARE_READ8_MEMBER( transmit_data_r ); + DECLARE_WRITE8_MEMBER( transmit_data_w ); + DECLARE_READ8_MEMBER( serial_status_r ); + DECLARE_WRITE8_MEMBER( serial_ack_w ); + DECLARE_READ8_MEMBER( receive_data_r ); virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const override; protected: @@ -45,6 +69,10 @@ protected: virtual void device_reset() override; private: const address_space_config m_space_config; + UINT8 m_smr; + UINT8 m_scr; + UINT8 m_ssr; + UINT8 m_brr; }; |