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authorGravatarGravatar Aaron Giles <aaron@aarongiles.com>2009-05-14 16:30:38 +0000
committerGravatarGravatar Aaron Giles <aaron@aarongiles.com>2009-05-14 16:30:38 +0000
commitbefc46f2579cf1835a7065d2e90c954eef13c576 (patch)
tree92732fcebe94d79eea3670298c34961bf37c315b
parent7dc342691f9c274dec8a506e6576a6c6be11bc52 (diff)
Cleanups and version bump.mame0131u2
-rw-r--r--src/mame/drivers/m14.c6
-rw-r--r--src/mame/drivers/ninjakd2.c10
-rw-r--r--src/mame/drivers/system1.c96
-rw-r--r--src/mame/machine/dc.c6
-rw-r--r--src/mame/video/dc.c86
-rw-r--r--src/version.c2
6 files changed, 103 insertions, 103 deletions
diff --git a/src/mame/drivers/m14.c b/src/mame/drivers/m14.c
index 7ba783bc8f1..1e5e6db3dc4 100644
--- a/src/mame/drivers/m14.c
+++ b/src/mame/drivers/m14.c
@@ -300,9 +300,9 @@ static MACHINE_DRIVER_START( m14 )
/* sound hardware */
// MDRV_SPEAKER_STANDARD_MONO("mono")
-// MDRV_SOUND_ADD("discrete", DISCRETE, 0)
-// MDRV_SOUND_CONFIG_DISCRETE(m14)
-// MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
+// MDRV_SOUND_ADD("discrete", DISCRETE, 0)
+// MDRV_SOUND_CONFIG_DISCRETE(m14)
+// MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_DRIVER_END
/***************************************************************************
diff --git a/src/mame/drivers/ninjakd2.c b/src/mame/drivers/ninjakd2.c
index 534d84fa0c1..9877d18940e 100644
--- a/src/mame/drivers/ninjakd2.c
+++ b/src/mame/drivers/ninjakd2.c
@@ -556,10 +556,10 @@ static INPUT_PORTS_START( common_2p )
INPUT_PORTS_END
/*************************************************************
- Note:
- These all games' DIP switch manufacturer settings are All Off.
- (looked into Japanese manuals only)
- *************************************************************/
+ Note:
+ These all games' DIP switch manufacturer settings are All Off.
+ (looked into Japanese manuals only)
+ *************************************************************/
static INPUT_PORTS_START( ninjakd2 )
PORT_INCLUDE(common)
@@ -686,7 +686,7 @@ static INPUT_PORTS_START( arkarea )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3") // listed on Japanese manual only ?
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3") // listed on Japanese manual only ?
PORT_DIPSETTING( 0x20, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:25")
diff --git a/src/mame/drivers/system1.c b/src/mame/drivers/system1.c
index 36b2f46935b..83094396aa4 100644
--- a/src/mame/drivers/system1.c
+++ b/src/mame/drivers/system1.c
@@ -395,7 +395,7 @@ static WRITE8_HANDLER( videomode_w )
{
const device_config *i8751 = cputag_get_cpu(space->machine, "mcu");
- /* bit 6 is connected to the 8751 IRQ */
+ /* bit 6 is connected to the 8751 IRQ */
if (i8751 != NULL)
cpu_set_input_line(i8751, MCS51_INT1_LINE, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
@@ -519,15 +519,15 @@ static WRITE_LINE_DEVICE_HANDLER( pio_ready_w )
static WRITE8_HANDLER( mcu_control_w )
{
/*
- Bit 7 -> connects to TD62003 pins 5 & 6 @ IC151
- Bit 6 -> via PLS153, when high, asserts the BUSREQ signal, halting the Z80
- Bit 5 -> n/c
- Bit 4 -> (with bit 3) Memory select: 0=Z80 program space, 1=banked ROM, 2=Z80 I/O space, 3=watchdog?
- Bit 3 ->
- Bit 2 -> n/c
- Bit 1 -> n/c
- Bit 0 -> Directly connected to Z80 /INT line
- */
+ Bit 7 -> connects to TD62003 pins 5 & 6 @ IC151
+ Bit 6 -> via PLS153, when high, asserts the BUSREQ signal, halting the Z80
+ Bit 5 -> n/c
+ Bit 4 -> (with bit 3) Memory select: 0=Z80 program space, 1=banked ROM, 2=Z80 I/O space, 3=watchdog?
+ Bit 3 ->
+ Bit 2 -> n/c
+ Bit 1 -> n/c
+ Bit 0 -> Directly connected to Z80 /INT line
+ */
mcu_control = data;
cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, (data & 0x40) ? ASSERT_LINE : CLEAR_LINE);
cputag_set_input_line(space->machine, "maincpu", 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
@@ -563,7 +563,7 @@ static READ8_HANDLER( mcu_io_r )
case 1:
return memory_region(space->machine, "maincpu")[offset + 0x10000];
-
+
case 2:
return memory_read_byte(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_IO), offset);
@@ -580,7 +580,7 @@ static INTERRUPT_GEN( mcu_irq_assert )
/* toggle the INT0 line on the MCU */
cpu_set_input_line(device, MCS51_INT0_LINE, ASSERT_LINE);
cpu_set_input_line(device, MCS51_INT0_LINE, CLEAR_LINE);
-
+
/* boost interleave to ensure that the MCU can break the Z80 out of a HALT */
cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(10));
}
@@ -589,8 +589,8 @@ static INTERRUPT_GEN( mcu_irq_assert )
static TIMER_DEVICE_CALLBACK( mcu_t0_callback )
{
/* the T0 line is clocked by something; if it is not clocked fast
- enough, the MCU will fail; on shtngmst this happens after 3
- VBLANKs without a tick */
+ enough, the MCU will fail; on shtngmst this happens after 3
+ VBLANKs without a tick */
const device_config *mcu = cputag_get_cpu(timer->machine, "mcu");
cpu_set_input_line(mcu, MCS51_T0_LINE, ASSERT_LINE);
@@ -601,7 +601,7 @@ static TIMER_DEVICE_CALLBACK( mcu_t0_callback )
/*************************************
*
- * nob MCU
+ * nob MCU
*
*************************************/
@@ -614,15 +614,15 @@ static WRITE8_HANDLER( nob_mcu_control_p2_w )
/* bit 1 triggers a write from MCU port 0 */
if (((mcu_control ^ data) & 0x02) && !(data & 0x02))
nob_maincpu_latch = *nob_mcu_latch;
-
+
/* bit 2 is toggled once near the end of an IRQ */
if (((mcu_control ^ data) & 0x04) && !(data & 0x04))
cpu_set_input_line(space->cpu, MCS51_INT0_LINE, CLEAR_LINE);
-
+
/* bit 3 is toggled once at the start of an IRQ, and again at the end */
if (((mcu_control ^ data) & 0x08) && !(data & 0x08))
;//logerror("MCU IRQ(8) toggle\n");
-
+
mcu_control = data;
}
@@ -2160,11 +2160,11 @@ static MACHINE_DRIVER_START( mcu )
/* basic machine hardware */
MDRV_CPU_MODIFY("maincpu")
MDRV_CPU_VBLANK_INT(NULL, NULL)
-
+
MDRV_CPU_ADD("mcu", I8751, SOUND_CLOCK)
MDRV_CPU_IO_MAP(mcu_io_map)
MDRV_CPU_VBLANK_INT("screen", mcu_irq_assert)
-
+
MDRV_TIMER_ADD_PERIODIC("mcu_t0", mcu_t0_callback, MSEC(20)) /* ??? actual clock unknown */
MACHINE_DRIVER_END
@@ -3334,30 +3334,30 @@ ROM_START( shtngmst )
ROM_END
/*
- Shooting Master (EVG)
- Year: 1985
- Manufacturer: E.V.G. SRL Milano made in Italy (Sega license)
-
- CPU
- 1x Z8400AB1-Z80ACPU-Y28548 (main board)
- 1x iC8751H-88-L5310039 (main board)
- 1x AMD P8255A-8526YP (main board)
- 1x SEGA 315-5012-8605P5 (main board)
- 1x SEGA 315-5011-8549X5 (main board)
- 1x SEGA 315-5049-8551PX (main board)
- 1x SEGA 315-5139-8537-CK2605-V-J (main board)
- 1x oscillator 20.000MHz (main board)
- 1x SYS Z8400AB1-Z80ACPU-Y28535 (upper board)
- 1x NEC D8255AC-2 (upper board)
- 1x oscillator 4.9152MHz (upper board)
-
- ROMs
- 1x HN27256G-25 (7043)(main board close to Z80)
- 2x HN27256G-25 (7101-7102)(main board close to C8751)
- 3x HN27256G-25 (7040-7041-7042)(main board close to 315-5049)
- 2x PAL16R4A (315-5137 and 315-5138)
- 1x HN27256G-25 (7100)(upper board close to oscillator)
- 7x HN27256G-25 (7104 to 7110)(upper board close to Z80 and 8255)
+ Shooting Master (EVG)
+ Year: 1985
+ Manufacturer: E.V.G. SRL Milano made in Italy (Sega license)
+
+ CPU
+ 1x Z8400AB1-Z80ACPU-Y28548 (main board)
+ 1x iC8751H-88-L5310039 (main board)
+ 1x AMD P8255A-8526YP (main board)
+ 1x SEGA 315-5012-8605P5 (main board)
+ 1x SEGA 315-5011-8549X5 (main board)
+ 1x SEGA 315-5049-8551PX (main board)
+ 1x SEGA 315-5139-8537-CK2605-V-J (main board)
+ 1x oscillator 20.000MHz (main board)
+ 1x SYS Z8400AB1-Z80ACPU-Y28535 (upper board)
+ 1x NEC D8255AC-2 (upper board)
+ 1x oscillator 4.9152MHz (upper board)
+
+ ROMs
+ 1x HN27256G-25 (7043)(main board close to Z80)
+ 2x HN27256G-25 (7101-7102)(main board close to C8751)
+ 3x HN27256G-25 (7040-7041-7042)(main board close to 315-5049)
+ 2x PAL16R4A (315-5137 and 315-5138)
+ 1x HN27256G-25 (7100)(upper board close to oscillator)
+ 7x HN27256G-25 (7104 to 7110)(upper board close to Z80 and 8255)
*/
ROM_START( shtngmste )
ROM_REGION( 0x20000, "maincpu", 0 )
@@ -4636,12 +4636,12 @@ static DRIVER_INIT( nob )
const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
DRIVER_INIT_CALL(bank44);
-
+
/* hack to fix incorrect JMP at start, which should obviously be to $0080 */
/* patching the ROM causes errors in the self-test */
/* in real-life, it could be some behavior dependent upon M1 */
memory_install_read8_handler(space, 0x0001, 0x0001, 0x0000, 0x0000, nob_start_r);
-
+
/* install MCU communications */
memory_install_readwrite8_handler(iospace, 0x18, 0x18, 0x00, 0x00, nob_maincpu_latch_r, nob_maincpu_latch_w);
memory_install_read8_handler(iospace, 0x1c, 0x1c, 0x00, 0x00, nob_mcu_status_r);
@@ -4697,12 +4697,12 @@ static DRIVER_INIT( bootlegb )
static DRIVER_INIT( choplift )
{
UINT8 *mcurom = memory_region(machine, "mcu");
-
+
/* the ROM dump we have is bad; the following patches make it work */
mcurom[0x100] = 0x55; /* D5 in current dump */
mcurom[0x27b] = 0xfb; /* F2 in current dump */
mcurom[0x2ff] = 0xff - 9; /* fix up checksum; means there's still something incorrect */
-
+
DRIVER_INIT_CALL(bank0c);
}
diff --git a/src/mame/machine/dc.c b/src/mame/machine/dc.c
index db8d74c4394..ade98de1a87 100644
--- a/src/mame/machine/dc.c
+++ b/src/mame/machine/dc.c
@@ -484,7 +484,7 @@ WRITE64_HANDLER( dc_sysctrl_w )
{
dc_sysctrl_regs[SB_C2DSTAT]=address+ddtdata.length;
}
-
+
dc_sysctrl_regs[SB_C2DLEN]=0;
dc_sysctrl_regs[SB_C2DST]=0;
dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_CH2;
@@ -582,14 +582,14 @@ WRITE64_HANDLER( dc_maple_w )
pattern=(buff[0] >> 8) & 7;
length=buff[0] & 255;
//if(length == 0)
- // length = 0x100;
+ // length = 0x100;
destination=buff[1];
command=buff[2] & 255;
dap=(buff[2] >> 8) & 255;
sap=(buff[2] >> 16) & 255;
//buff[0]=0;
//if(buff[1] == 0x700)
- // printf("%08x %08x",buff[0],buff[2]);
+ // printf("%08x %08x",buff[0],buff[2]);
ddtdata.size=4;
if (pattern == 0)
diff --git a/src/mame/video/dc.c b/src/mame/video/dc.c
index d488ff4fa10..50fcc0132d3 100644
--- a/src/mame/video/dc.c
+++ b/src/mame/video/dc.c
@@ -581,15 +581,15 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
int miptype = 0;
t->textured = sa->texture;
-
+
// not textured, abort.
if (!t->textured) return;
-
+
t->address = sa->textureaddress;
t->pf = sa->pixelformat;
t->palette = 0;
-
-
+
+
t->mode = (sa->vqcompressed<<1);
// scanorder is ignored for palettized textures (palettized textures are ALWAYS twiddled)
@@ -602,41 +602,41 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
{
t->mode |= sa->scanorder;
}
-
+
/* When scan order is 0 stride select is ignored */
/* When scan order is 1 mipmap is ignored */
if (t->mode&1)
{
/* scan order is 1 (non-twiddled tezture), use stride select if specified*/
t->mode |= (sa->strideselect<<2);
-
+
/* scan order is 1 (non-twiddled tezture), ignore mipmaps */
t->mipmapped = 0;
}
- else
+ else
{
/* scan order is 0 (twiddled tezture), ignore stride select*/
//t->mode += (sa->strideselect<<2);
-
+
/* scan order is 0 (twiddled tezture), use mipmap if specified */
t->mipmapped = sa->mipmapped;
}
-
+
// Mipmapped textures are always square, ignore v size
if (t->mipmapped)
- {
+ {
t->sizes = (sa->texturesizes & 0x38) | ((sa->texturesizes & 0x38) >> 3);
}
else
{
t->sizes = sa->texturesizes;
}
-
+
t->sizex = 1 << (3+((t->sizes >> 3) & 7));
t->sizey = 1 << (3+(t->sizes & 7));
-
-
-
+
+
+
t->blend_mode = sa->blend_mode;
t->filter_mode = sa->filtermode;
t->flip_u = (sa->flipuv >> 1) & 1;
@@ -660,7 +660,7 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
default:
//
- break;
+ break;
}
break;
@@ -673,7 +673,7 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
default:
//
- break;
+ break;
}
break;
@@ -681,12 +681,12 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
switch(t->mode) {
case 0: t->r = tex_r_4444_tw; miptype = 2; break;
case 1: t->r = tex_r_4444_n; miptype = 2; break;
- case 2:
+ case 2:
case 3: t->r = tex_r_4444_vq; miptype = 3; t->address += 0x800; break;
default:
//
- break;
+ break;
}
break;
@@ -723,10 +723,10 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
case 3: t->r = tex_r_p4_8888_vq; t->address += 0x800; break;
}
break;
-
+
default:
//
- break;
+ break;
}
break;
@@ -752,7 +752,7 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
case 3: t->r = tex_r_p8_8888_vq; t->address += 0x800; break;
}
break;
-
+
default:
//
break;
@@ -828,7 +828,7 @@ static void tex_get_info(texinfo *t, pvrta_state *sa)
static const int mipmap_4_8_offset[8] = { 0x00018, 0x00058, 0x00158, 0x00558, 0x01558, 0x05558, 0x15558, 0x55558 }; // 4bpp (4bit offset) / 8bpp (8bit offset)
static const int mipmap_np_offset[8] = { 0x00030, 0x000B0, 0x002B0, 0x00AB0, 0x02AB0, 0x0AAB0, 0x2AAB0, 0xAAAB0 }; // nonpalette textures
static const int mipmap_vq_offset[8] = { 0x00006, 0x00016, 0x00056, 0x00156, 0x00556, 0x01556, 0x05556, 0x15556 }; // vq textures
-
+
switch (miptype)
{
@@ -1182,17 +1182,17 @@ WRITE64_HANDLER( pvr_ta_w )
profiler_mark(PROFILER_END);
break;
-//#define TA_YUV_TEX_BASE ((0x005f8148-0x005f8000)/4)
+//#define TA_YUV_TEX_BASE ((0x005f8148-0x005f8000)/4)
case TA_YUV_TEX_BASE:
printf("TA_YUV_TEX_BASE initialized to %08x\n", dat);
-
+
// hack, this interrupt is generated after transfering a set amount of data
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_YUV;
dc_update_interrupt_status(space->machine);
-
+
break;
-
-
+
+
case TA_LIST_CONT:
#if DEBUG_PVRTA
mame_printf_verbose("List continuation processing\n");
@@ -1494,8 +1494,8 @@ void process_ta_fifo(running_machine* machine)
tv->w=u2f(tafifo_buff[3]);
tv->u=u2f(tafifo_buff[4]);
tv->v=u2f(tafifo_buff[5]);
-
-
+
+
if((!rd->strips_size) ||
rd->strips[rd->strips_size-1].evert != -1)
{
@@ -1606,7 +1606,7 @@ void render_hline(bitmap_t *bitmap, texinfo *ti, int y, float xl, float xr, floa
// untextured cases aren't handled
if (!ti->textured) return;
-
+
if(xr < 0 || xl >= 640)
return;
@@ -1635,7 +1635,7 @@ void render_hline(bitmap_t *bitmap, texinfo *ti, int y, float xl, float xr, floa
tdata = BITMAP_ADDR32(bitmap, y, xxl);
wbufline = &wbuffer[y][xxl];
-
+
while(xxl < xxr) {
if((wl >= *wbufline)) {
UINT32 c;
@@ -1643,21 +1643,21 @@ void render_hline(bitmap_t *bitmap, texinfo *ti, int y, float xl, float xr, floa
float v = vl/wl;
/*
- if(ti->flip_u)
- {
- u = ti->sizex - u;
- }
+ if(ti->flip_u)
+ {
+ u = ti->sizex - u;
+ }
- if(ti->flip_v)
- {
- v = ti->sizey - v;
- }*/
+ if(ti->flip_v)
+ {
+ v = ti->sizey - v;
+ }*/
c = ti->r(ti, u, v);
-
+
// debug dip to turn on/off bilinear filtering, it's slooooow
if (debug_dip_status&0x1)
- {
+ {
if(ti->filter_mode >= TEX_FILTER_BILINEAR)
{
UINT32 c1 = ti->r(ti, u+1.0, v);
@@ -1781,7 +1781,7 @@ static void sort_vertices(const vert *v, int *i0, int *i1, int *i2)
static void render_tri_sorted(bitmap_t *bitmap, texinfo *ti, const vert *v0, const vert *v1, const vert *v2)
{
float dy01, dy02, dy12;
-// float dy; // unused, compiler complains about this
+// float dy; // unused, compiler complains about this
float dx01dy, dx02dy, dx12dy, du01dy, du02dy, du12dy, dv01dy, dv02dy, dv12dy, dw01dy, dw02dy, dw12dy;
@@ -2168,7 +2168,7 @@ VIDEO_UPDATE(dc)
// update this here so we only do string lookup once per frame
debug_dip_status = input_port_read(screen->machine, "MAMEDEBUG");
-
+
return 0;
}
diff --git a/src/version.c b/src/version.c
index 86dbabe22bb..23d3d259fa4 100644
--- a/src/version.c
+++ b/src/version.c
@@ -10,4 +10,4 @@
***************************************************************************/
extern const char build_version[];
-const char build_version[] = "0.131u1 ("__DATE__")";
+const char build_version[] = "0.131u2 ("__DATE__")";