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author AJR <ajrhacker@users.noreply.github.com>2019-11-01 15:01:03 -0400
committer AJR <ajrhacker@users.noreply.github.com>2019-11-01 15:01:03 -0400
commitbaac95bf42d74a22569d6688ffed0696d10593d2 (patch)
tree73c6cfb2440916ce3bbb80098a36b164391cca30
parenta727db7888b13ef877381aca3d2a6017337a0b0d (diff)
riscii: Add interrupt processing (nw)
-rw-r--r--src/devices/cpu/rii/riscii.cpp43
-rw-r--r--src/devices/cpu/rii/riscii.h4
2 files changed, 47 insertions, 0 deletions
diff --git a/src/devices/cpu/rii/riscii.cpp b/src/devices/cpu/rii/riscii.cpp
index 0317c5c9c4b..2690724e42f 100644
--- a/src/devices/cpu/rii/riscii.cpp
+++ b/src/devices/cpu/rii/riscii.cpp
@@ -1826,6 +1826,43 @@ void riscii_series_device::execute_tbrd(u32 ptr)
m_exec_state = EXEC_CYCLE1;
}
+bool riscii_series_device::interrupt_active() const
+{
+ if (!BIT(m_cpucon, 2))
+ return false;
+ else
+ return (m_intcon & m_intsta) != 0
+ || (m_painten & m_paintsta) != 0
+ || (m_spista & 0x30) == 0x30
+ || (m_sphtcon & 0x30) == 0x30;
+}
+
+u32 riscii_series_device::vector_interrupt() const
+{
+ // Input port A
+ if ((m_painten & m_paintsta) != 0)
+ return 0x00002;
+
+ // Capture
+ if ((m_intcon & m_intsta & 0x80) != 0)
+ return 0x00004;
+
+ // Speech timer
+ if ((m_sphtcon & 0x30) == 0x30)
+ return 0x00006;
+
+ // Timers 0–2
+ if ((m_intcon & m_intsta & 0x07) != 0)
+ return 0x00008;
+
+ // Peripheral
+ if ((m_intcon & m_intsta & 0x78) != 0 || (m_spista & 0x30) == 0x30)
+ return 0x0000a;
+
+ // Should not reach here
+ return 0x00000;
+}
+
void riscii_series_device::execute_run()
{
while (m_icount > 0)
@@ -1844,6 +1881,12 @@ void riscii_series_device::execute_run()
m_pc = m_ppc;
}
}
+ else if (interrupt_active())
+ {
+ // Disable interrupts and call handler
+ m_cpucon &= 0xfb;
+ execute_call(vector_interrupt());
+ }
else
execute_cycle1(fetch_program_word());
break;
diff --git a/src/devices/cpu/rii/riscii.h b/src/devices/cpu/rii/riscii.h
index c670c1ea813..ce9837896b9 100644
--- a/src/devices/cpu/rii/riscii.h
+++ b/src/devices/cpu/rii/riscii.h
@@ -263,6 +263,10 @@ private:
void execute_cycle1(u16 opcode);
void execute_tbrd(u32 ptr);
+ // interrupt helpers
+ bool interrupt_active() const;
+ u32 vector_interrupt() const;
+
enum exec_state : u8 {
EXEC_CYCLE1,
EXEC_ADCPCM, EXEC_SBCPCM,