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author Calvin Buckley <calvin@cmpct.info>2021-04-30 20:31:13 -0300
committer GitHub <noreply@github.com>2021-04-30 19:31:13 -0400
commitb77f120ac769bee7d020a4a1ad2f5eef9894b6da (patch)
tree29b46981a5c857f8bbc82ada2c9de9c654fcbf08
parente72e97b17457124eaffff07fe462795ac526480a (diff)
m68k: Implement FMOVEM mode 0b11 (#8022)
Since the two bits seem to have symmetry, it's odd this wasn't there before. Should fix issues with Domain/OS and NeXTSTEP emulation.
-rw-r--r--src/devices/cpu/m68000/m68kfpu.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/devices/cpu/m68000/m68kfpu.cpp b/src/devices/cpu/m68000/m68kfpu.cpp
index 07cca095357..b15da8fe4bd 100644
--- a/src/devices/cpu/m68000/m68kfpu.cpp
+++ b/src/devices/cpu/m68000/m68kfpu.cpp
@@ -1773,6 +1773,10 @@ void m68000_base_device::fmovem(u16 w2)
break;
}
+ case 3: // Dynamic register list, postincrement or control addressing mode.
+ // FIXME: not really tested, but seems to work
+ reglist = REG_D()[(reglist >> 4) & 7];
+ [[fallthrough]];
case 2: // Static register list, postdecrement or control addressing mode
{
for (i=0; i < 8; i++)