summaryrefslogtreecommitdiffstatshomepage
diff options
context:
space:
mode:
author hap <happppp@users.noreply.github.com>2019-05-30 18:51:16 +0200
committer hap <happppp@users.noreply.github.com>2019-05-30 18:51:29 +0200
commitb48f4470cd72c975bcc086b1395a86566ca23df6 (patch)
tree3495ec3aa58edf4adbd0eb259e2261f50f43e9c1
parentea8383057bdc3d01d5cac77bb17fb8dd9b99a9a7 (diff)
arm: add back wrong interrupt handling and make it an option (nw)
-rw-r--r--src/devices/bus/isa/chessm.cpp1
-rw-r--r--src/devices/cpu/arm/arm.cpp19
-rw-r--r--src/devices/cpu/arm/arm.h2
3 files changed, 18 insertions, 4 deletions
diff --git a/src/devices/bus/isa/chessm.cpp b/src/devices/bus/isa/chessm.cpp
index 9ed0f37eaf3..1888fb900ca 100644
--- a/src/devices/bus/isa/chessm.cpp
+++ b/src/devices/bus/isa/chessm.cpp
@@ -137,6 +137,7 @@ void isa8_chessm_device::device_add_mconfig(machine_config &config)
ARM(config, m_maincpu, 30_MHz_XTAL/2);
m_maincpu->set_addrmap(AS_PROGRAM, &isa8_chessm_device::chessm_mem);
m_maincpu->set_copro_type(arm_cpu_device::copro_type::VL86C020);
+ m_maincpu->set_nested_irq_hack(false);
GENERIC_LATCH_8(config, m_mainlatch);
GENERIC_LATCH_8(config, m_sublatch);
diff --git a/src/devices/cpu/arm/arm.cpp b/src/devices/cpu/arm/arm.cpp
index d1ac14582a8..98e21c47201 100644
--- a/src/devices/cpu/arm/arm.cpp
+++ b/src/devices/cpu/arm/arm.cpp
@@ -4,8 +4,12 @@
ARM 2/3/6 Emulation (26 bit address bus)
Todo:
- Timing - Currently very approximated, nothing relies on proper timing so far.
- IRQ timing not yet correct (again, nothing is affected by this so far).
+ - Get rid of m_nested_irq_hack, interrupts don't work like that but several MAME
+ drivers rely on it since it's been in arm.cpp for so long
+ - Interrupts are currently implemented like HOLD_LINE for everything, with the way it
+ resets pending interrupts when taken, again wrong
+ - Timing - Currently very approximated, nothing relies on proper timing so far.
+ - IRQ timing not yet correct (again, nothing is affected by this so far).
Recent changes (2005):
Fixed software interrupts
@@ -243,6 +247,7 @@ arm_cpu_device::arm_cpu_device(const machine_config &mconfig, device_type type,
, m_program_config("program", endianness, 32, 26, 0)
, m_endian(endianness)
, m_copro_type(copro_type::UNKNOWN_CP15)
+ , m_nested_irq_hack(true)
{
std::fill(std::begin(m_sArmRegister), std::end(m_sArmRegister), 0);
}
@@ -488,11 +493,17 @@ void arm_cpu_device::execute_set_input(int irqline, int state)
switch (irqline)
{
case ARM_IRQ_LINE: /* IRQ */
- m_pendingIrq = state ? 1 : 0;
+ if (state && (!m_nested_irq_hack || (R15&0x3)!=eARM_MODE_IRQ)) /* Don't allow nested IRQs */
+ m_pendingIrq=1;
+ else
+ m_pendingIrq=0;
break;
case ARM_FIRQ_LINE: /* FIRQ */
- m_pendingFiq = state ? 1 : 0;
+ if (state && (!m_nested_irq_hack || (R15&0x3)!=eARM_MODE_FIQ)) /* Don't allow nested FIRQs */
+ m_pendingFiq=1;
+ else
+ m_pendingFiq=0;
break;
}
diff --git a/src/devices/cpu/arm/arm.h b/src/devices/cpu/arm/arm.h
index 27f764e26df..b05216cee81 100644
--- a/src/devices/cpu/arm/arm.h
+++ b/src/devices/cpu/arm/arm.h
@@ -30,6 +30,7 @@ public:
arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_copro_type(copro_type type) { m_copro_type = type; }
+ void set_nested_irq_hack(bool enable) { m_nested_irq_hack = enable; }
protected:
enum
@@ -74,6 +75,7 @@ protected:
std::function<u32 (offs_t)> m_pr32;
endianness_t m_endian;
copro_type m_copro_type;
+ bool m_nested_irq_hack;
void cpu_write32( int addr, uint32_t data );
void cpu_write8( int addr, uint8_t data );