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authorGravatarGravatar jbu <pullmoll@t-online.de>2014-12-04 04:09:26 +0100
committerGravatarGravatar jbu <pullmoll@t-online.de>2014-12-04 04:10:08 +0100
commitab0ea181e0a49f2fd9c1aae0b3bc9a91863efc5d (patch) (github)
tree723481140dfe19d43daa7b04229ff2fbf4ebf3d3
parent558ab8997beb0adaccf1aef5aecb79dc3aa23201 (diff)
downloadmame-ab0ea181e0a49f2fd9c1aae0b3bc9a91863efc5d.tar.bz2
mame-ab0ea181e0a49f2fd9c1aae0b3bc9a91863efc5d.zip
Introduc m_Skip to skip ops. Clean up + fixes (nw)
-rw-r--r--src/emu/cpu/pps4/pps4.c158
-rw-r--r--src/emu/cpu/pps4/pps4.h2
-rw-r--r--src/emu/cpu/pps4/pps4dasm.c536
3 files changed, 355 insertions, 341 deletions
diff --git a/src/emu/cpu/pps4/pps4.c b/src/emu/cpu/pps4/pps4.c
index 2611bbab53e..cffa5e4c5d4 100644
--- a/src/emu/cpu/pps4/pps4.c
+++ b/src/emu/cpu/pps4/pps4.c
@@ -33,7 +33,7 @@
#include "pps4.h"
-#define VERBOSE 0 //!< set to 1 to log certain instruction conditions
+#define VERBOSE 1 //!< set to 1 to log certain instruction conditions
#if VERBOSE
#define LOG(x) logerror x
@@ -81,7 +81,10 @@ offs_t pps4_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
/**
* @brief pps4_device::ROP Read the next opcode (instruction)
- * @return m_I
+ * The previous opcode mask (upper four bits) is set from the
+ * previous instruction. The new opcode is fetched and the
+ * program counter is incremented. The icount is decremented.
+ * @return m_I the next opcode
*/
inline UINT8 pps4_device::ROP()
{
@@ -93,8 +96,11 @@ inline UINT8 pps4_device::ROP()
}
/**
- * @brief pps4_device::ARG Read the next argument (instrunction 2)
- * @return m_I2
+ * @brief pps4_device::ARG Read the next argument (instruction 2)
+ * The byte at program counter is read from the unencrypted
+ * direct space. The program count is incremented and the
+ * icount is decremented.
+ * @return m_I2 the next argument
*/
inline UINT8 pps4_device::ARG()
{
@@ -141,7 +147,7 @@ inline UINT8 pps4_device::ARG()
void pps4_device::iAD()
{
m_A = m_A + M();
- m_C = m_A >> 4;
+ m_C = (m_A >> 4) & 1;
m_A = m_A & 15;
}
@@ -183,8 +189,8 @@ void pps4_device::iADSK()
{
m_A = m_A + M();
m_C = m_A >> 4;
+ m_Skip = m_C;
m_A = m_A & 15;
- m_P = (m_P + m_C) & 0xFFF;
}
/**
@@ -205,27 +211,8 @@ void pps4_device::iADCSK()
{
m_A = m_A + M() + m_C;
m_C = m_A >> 4;
+ m_Skip = m_C;
m_A = m_A & 15;
- m_P = (m_P + m_C) & 0xFFF;
-}
-
-/**
- * @brief pps4_device::iAND Logical AND
- * OPCODE cycles mnemonic
- * -----------------------------
- * 0000 1101 1 cyc AND
- *
- * Symbolic equation
- * -----------------------------
- * A <- A & M
- *
- * The result of logical AND of accumulator and
- * 4-bit contents of RAM currently addressed by
- * B register replaces contents of accumulator.
- */
-void pps4_device::iAND()
-{
- m_A = m_A & M();
}
/**
@@ -253,9 +240,8 @@ void pps4_device::iADI()
{
const UINT8 imm = ~m_I & 15;
m_A = m_A + imm;
- m_P = m_P + (m_A > 15) ? 1 : 0;
+ m_Skip = (m_A >> 4) & 1;
m_A = m_A & 15;
- m_P = m_P & 0xFFF;
}
/**
@@ -266,7 +252,7 @@ void pps4_device::iADI()
*
* Symbolic equation
* -----------------------------
- * A <- A + 1010b
+ * A <- A + 1010
*
* Decimal correction of accumulator.
* Binary 1010 is added to the contents of the accumulator.
@@ -279,6 +265,25 @@ void pps4_device::iDC()
}
/**
+ * @brief pps4_device::iAND Logical AND
+ * OPCODE cycles mnemonic
+ * -----------------------------
+ * 0000 1101 1 cyc AND
+ *
+ * Symbolic equation
+ * -----------------------------
+ * A <- A & M
+ *
+ * The result of logical AND of accumulator and
+ * 4-bit contents of RAM currently addressed by
+ * B register replaces contents of accumulator.
+ */
+void pps4_device::iAND()
+{
+ m_A = m_A & M();
+}
+
+/**
* @brief pps4_device::iOR Logical OR
* OPCODE cycles mnemonic
* -----------------------------
@@ -288,7 +293,7 @@ void pps4_device::iDC()
* -----------------------------
* A <- A | M
*
- * The result of logical OIR of accumulator and
+ * The result of logical OR of accumulator and
* 4-bit contents of RAM currently addressed by
* B register replaces contents of accumulator.
*/
@@ -441,7 +446,7 @@ void pps4_device::iRF2()
* @brief pps4_device::iLD Load accumulator from memory
* OPCODE cycles mnemonic
* -----------------------------
- * 0011 0xxx 1 cyc LDx
+ * 0011 0xxx 1 cyc LD x
*
* Symbolic equation
* -----------------------------
@@ -467,7 +472,7 @@ void pps4_device::iLD()
* @brief pps4_device::iEX Exchange accumulator and memory
* OPCODE cycles mnemonic
* -----------------------------
- * 0011 1xxx 1 cyc EXx
+ * 0011 1xxx 1 cyc EX x
*
* Symbolic equation
* -----------------------------
@@ -519,7 +524,7 @@ void pps4_device::iEXD()
if (0 == bl) {
// decrement BL wraps to 1111b
bl = 15;
- m_P = (m_P + 1) & 0xFFF;
+ m_Skip = 1;
} else {
// decrement BL
bl = bl - 1;
@@ -550,7 +555,7 @@ void pps4_device::iLDI()
{
// previous LDI instruction?
if (0x70 == m_Ip) {
- LOG(("%s: skip prev:%02x\n", __FUNCTION__, m_Ip));
+ LOG(("%s: skip prev:%02x op:%02x\n", __FUNCTION__, m_Ip, m_I));
return;
}
m_A = ~m_I & 15;
@@ -686,7 +691,7 @@ void pps4_device::iXABL()
void pps4_device::iXBMX()
{
// swap X and BM
- UINT8 bm = (m_B >> 4) & 15;
+ const UINT8 bm = (m_B >> 4) & 15;
m_B = (m_B & ~(15 << 4)) | (m_X << 4);
m_X = bm;
}
@@ -764,7 +769,7 @@ void pps4_device::iCYS()
* @brief pps4_device::iLB
* OPCODE cycles mnemonic
* -----------------------------
- * 1100 0000 2 cyc LB
+ * 1100 xxxx 2 cyc LB x
*
* Symbolic equation
* -----------------------------
@@ -797,12 +802,12 @@ void pps4_device::iLB()
{
// previous LB or LBL instruction?
if (0xc0 == m_Ip|| 0x00 == m_Ip) {
- LOG(("%s: skip prev:%02X\n", __FUNCTION__, m_Ip));
+ LOG(("%s: skip prev:%02x op:%02x\n", __FUNCTION__, m_Ip, m_I));
return;
}
m_SB = m_SA;
m_SA = (m_P + 1) & 0xFFF;
- m_P = (3 << 8) | (m_I & 15);
+ m_P = (3 << 6) | (m_I & 15);
m_B = ~ARG() & 255;
m_P = m_SA;
// swap SA and SB
@@ -838,7 +843,7 @@ void pps4_device::iLBL()
{
// previous LB or LBL instruction?
if (0xc0 == m_Ip || 0x00 == m_Ip) {
- LOG(("%s: skip prev:%02X\n", __FUNCTION__, m_Ip));
+ LOG(("%s: skip prev:%02x op:%02x\n", __FUNCTION__, m_Ip, m_I));
return;
}
m_B = ~ARG() & 255;
@@ -865,7 +870,7 @@ void pps4_device::iINCB()
bl = (bl + 1) & 15;
if (0 == bl) {
LOG(("%s: skip BL=%x\n", __FUNCTION__, bl));
- m_P = (m_P + 1) & 0xFFF;
+ m_Skip = 1;
}
m_B = (m_B & ~15) | bl;
}
@@ -874,7 +879,7 @@ void pps4_device::iINCB()
* @brief pps4_device::iDECB
* OPCODE cycles mnemonic
* -----------------------------
- * 0001 1111 1 cyc DECB
+ * 0001 1111 1 cyc DECq
*
* Symbolic equation
* -----------------------------
@@ -891,7 +896,7 @@ void pps4_device::iDECB()
bl = (bl - 1) & 15;
if (15 == bl) {
LOG(("%s: skip BL=%x\n", __FUNCTION__, bl));
- m_P = (m_P + 1) & 0xFFF;
+ m_Skip = 1;
}
m_B = (m_B & ~15) | bl;
}
@@ -922,7 +927,7 @@ void pps4_device::iT()
* @brief pps4_device::iTM Transfer and mark indirect
* OPCODE cycles mnemonic
* -----------------------------
- * 11xx xxxx 2 cyc TM *
+ * 11xx xxxx 2 cyc TM x
* yyyy yyyy from page 3
*
* Symbolic equation
@@ -949,16 +954,15 @@ void pps4_device::iTM()
m_SA = m_P;
m_P = 3 << 6;
m_P = m_P | (m_I & 63);
- ARG();
- m_P = 1 << 8;
- m_P |= m_I2;
+ m_I2 = ARG();
+ m_P = (1 << 8) | m_I2;
}
/**
* @brief pps4_device::iTL Transfer long
* OPCODE cycles mnemonic
* -----------------------------
- * 0101 xxxx 2 cyc TL *
+ * 0101 xxxx 2 cyc TL xyy
* yyyy yyyy
*
* Symbolic equation
@@ -973,7 +977,7 @@ void pps4_device::iTM()
*/
void pps4_device::iTL()
{
- ARG();
+ m_I2 = ARG();
m_P = (m_I & 15) << 8;
m_P = m_P | m_I2;
}
@@ -982,7 +986,7 @@ void pps4_device::iTL()
* @brief pps4_device::iTML Transfer and mark long
* OPCODE cycles mnemonic
* -----------------------------
- * 0101 xxxx 2 cyc TML *
+ * 0101 xxxx 2 cyc TML xyy
* yyyy yyyy
*
* Symbolic equation
@@ -999,11 +1003,10 @@ void pps4_device::iTL()
*/
void pps4_device::iTML()
{
- ARG();
+ m_I2 = ARG();
m_SB = m_SA;
m_SA = m_P;
- m_P = (m_I & 15) << 8;
- m_P = m_P | m_I2;
+ m_P = ((m_I & 15) << 8) | m_I2;
}
/**
@@ -1020,8 +1023,7 @@ void pps4_device::iTML()
*/
void pps4_device::iSKC()
{
- m_P = m_P + m_C;
- m_P = m_P & 0xFFF;
+ m_Skip = m_C;
}
/**
@@ -1038,8 +1040,7 @@ void pps4_device::iSKC()
*/
void pps4_device::iSKZ()
{
- m_P = m_P + (0 == m_A) ? 1 : 0;
- m_P = m_P & 0xFFF;
+ m_Skip = 0 == m_A ? 1 : 0;
}
/**
@@ -1058,9 +1059,9 @@ void pps4_device::iSKZ()
*/
void pps4_device::iSKBI()
{
- const unsigned imm = m_I & 15;
- m_P = m_P + (imm == (m_B & 15)) ? 1 : 0;
- m_P = m_P & 0xFFF;
+ const UINT8 imm = m_I & 15;
+ const UINT8 bl = m_B & 15;
+ m_Skip = bl == imm ? 1 : 0;
}
/**
@@ -1075,8 +1076,7 @@ void pps4_device::iSKBI()
*/
void pps4_device::iSKF1()
{
- m_P = m_P + m_FF1;
- m_P = m_P & 0xFFF;
+ m_Skip = m_FF1;
}
/**
@@ -1091,8 +1091,7 @@ void pps4_device::iSKF1()
*/
void pps4_device::iSKF2()
{
- m_P = m_P + m_FF2;
- m_P = m_P & 0xFFF;
+ m_Skip = m_FF2;
}
/**
@@ -1111,7 +1110,7 @@ void pps4_device::iSKF2()
*/
void pps4_device::iRTN()
{
- m_P = m_SA;
+ m_P = m_SA & 0xFFF;
// swap SA and SB
m_SA ^= m_SB;
m_SB ^= m_SA;
@@ -1129,26 +1128,25 @@ void pps4_device::iRTN()
* P <- SA, SA <-> SB
* P <- P + 1
*
- * Same as RTN expect the first ROM word encountered
+ * Same as RTN except the first ROM word encountered
* after the return from subroutine is skipped.
*/
void pps4_device::iRTNSK()
{
- m_P = m_SA;
- ROP(); // ignored
- m_I = 0; // avoid LB/LBL or LDI skipping
+ m_P = m_SA & 0xFFF;
// swap SA and SB
m_SA ^= m_SB;
m_SB ^= m_SA;
m_SA ^= m_SB;
- m_P = m_P & 0xFFF;
+ ROP(); // next opcode is ignored
+ m_I = 0; // avoid LB/LBL or LDI skipping due to m_Ip
}
/**
* @brief pps4_device::IOL
* OPCODE cycles mnemonic
* -----------------------------
- * 0001 1100 2 cyc IOL
+ * 0001 1100 2 cyc IOL yy
* yyyy yyyy
*
* Symbolic equation
@@ -1168,12 +1166,12 @@ void pps4_device::iRTNSK()
*/
void pps4_device::iIOL()
{
- const unsigned a = ~m_A & 15;
- ARG();
- LOG(("%s: port:%X <- %02X\n", __FUNCTION__, m_I2, a));
+ const UINT8 a = ~m_A & 15;
+ m_I2 = ARG();
m_io->write_byte(m_I2, a);
+ LOG(("%s: port:%02x <- %x\n", __FUNCTION__, m_I2, a));
m_A = ~m_io->read_byte(m_I2) & 15;
- LOG(("%s: port:%X -> %02X\n", __FUNCTION__, m_I2, m_A));
+ LOG(("%s: port:%02x -> %x\n", __FUNCTION__, m_I2, m_A));
}
/**
@@ -1249,7 +1247,7 @@ void pps4_device::iDOA()
*/
void pps4_device::iSAG()
{
- // mask bits 12:5
+ // mask bits 12:5 on next memory access
m_SAG = 0xff0;
}
@@ -1259,6 +1257,11 @@ void pps4_device::iSAG()
void pps4_device::execute_one()
{
m_I = ROP();
+ if (m_Skip) {
+ m_Skip = 0;
+ LOG(("%s: skip op:%02x\n", __FUNCTION__, m_I));
+ return;
+ }
switch (m_I) {
case 0x00:
iLBL();
@@ -1492,6 +1495,7 @@ void pps4_device::device_start()
save_item(NAME(m_P));
save_item(NAME(m_SA));
save_item(NAME(m_SB));
+ save_item(NAME(m_Skip));
save_item(NAME(m_SAG));
save_item(NAME(m_B));
save_item(NAME(m_C));
@@ -1506,8 +1510,10 @@ void pps4_device::device_start()
state_add( PPS4_X, "X", m_X ).formatstr("%01X");
state_add( PPS4_SA, "SA", m_SA ).formatstr("%03X");
state_add( PPS4_SB, "SB", m_SB ).formatstr("%03X");
- state_add( PPS4_B, "B", m_B ).formatstr("%03X");
+ state_add( PPS4_Skip, "Skip", m_Skip ).formatstr("%01X");
state_add( PPS4_SAG, "SAG", m_SAG ).formatstr("%03X");
+ state_add( PPS4_B, "B", m_B ).formatstr("%03X");
+ state_add( PPS4_I2, "I", m_I ).formatstr("%02X").noshow();
state_add( PPS4_I2, "I2", m_I2 ).formatstr("%02X").noshow();
state_add( PPS4_Ip, "Ip", m_Ip ).formatstr("%02X").noshow();
state_add( STATE_GENPC, "GENPC", m_P ).noshow();
diff --git a/src/emu/cpu/pps4/pps4.h b/src/emu/cpu/pps4/pps4.h
index 35aebd0db2f..710b5bfca5d 100644
--- a/src/emu/cpu/pps4/pps4.h
+++ b/src/emu/cpu/pps4/pps4.h
@@ -15,6 +15,7 @@ enum
PPS4_SA,
PPS4_SB,
PPS4_B,
+ PPS4_Skip,
PPS4_SAG,
PPS4_I2,
PPS4_Ip,
@@ -83,6 +84,7 @@ private:
UINT16 m_P; //!< program counter P(12:1)
UINT16 m_SA; //!< Shift register SA(12:1)
UINT16 m_SB; //!< Shift register SB(12:1)
+ UINT8 m_Skip; //!< Skip next instruction
UINT16 m_SAG; //!< Special address generation mask
UINT16 m_B; //!< B register B(12:1) (BL, BM and BH)
UINT8 m_C; //!< Carry flip-flop
diff --git a/src/emu/cpu/pps4/pps4dasm.c b/src/emu/cpu/pps4/pps4dasm.c
index 35eda8e09fb..4b6ee314175 100644
--- a/src/emu/cpu/pps4/pps4dasm.c
+++ b/src/emu/cpu/pps4/pps4dasm.c
@@ -28,13 +28,15 @@ typedef enum pps4_token_e {
t_IOL, t_DIA, t_DIB, t_DOA, t_SAG,
t_COUNT,
t_MASK = (1 << 6) - 1,
- t_I3c = 1 << 6, /* immediate 3 bit constant, complemented */
- t_I4 = 1 << 7, /* immediate 4 bit constant */
- t_I4c = 1 << 8, /* immediate 4 bit constant, complemented */
- t_I4p = 1 << 9, /* immediate 4 bit offset into page 3 */
- t_I6p = 1 << 10, /* immediate 6 bit constant; address in current page */
- t_I8 = 1 << 11, /* immediate 8 bit constant (I/O port number) */
- t_I8c = 1 << 12, /* immediate 8 bit constant inverted */
+ t_I3c = 1 << 6, /* immediate 3 bit constant, complemented */
+ t_I4 = 1 << 7, /* immediate 4 bit constant */
+ t_I4c = 1 << 8, /* immediate 4 bit constant, complemented */
+ t_I4p = 1 << 9, /* immediate 4 bit offset into page 3 */
+ t_I6p = 1 << 10, /* immediate 6 bit constant; address in current page */
+ t_I8 = 1 << 11, /* immediate 8 bit constant (I/O port number) */
+ t_I8c = 1 << 12, /* immediate 8 bit constant inverted */
+ t_OVER = 1 << 13, /* Debugger step over (CALL) */
+ t_OUT = 1 << 14 /* Debugger step out (RETURN) */
} pps4_token_e;
static const char *token_str[t_COUNT] = {
@@ -91,277 +93,277 @@ static const char *token_str[t_COUNT] = {
};
static const UINT16 table[] = {
- t_LBL | t_I8c, /* 00 */
- t_TML | t_I4 | t_I8, /* 01 */
- t_TML | t_I4 | t_I8, /* 02 */
- t_TML | t_I4 | t_I8, /* 03 */
- t_LBUA, /* 04 */
- t_RTN, /* 05 */
- t_XS, /* 06 */
- t_RTNSK, /* 07 */
- t_ADCSK, /* 08 */
- t_ADSK, /* 09 */
- t_ADC, /* 0a */
- t_AD, /* 0b */
- t_EOR, /* 0c */
- t_AND, /* 0d */
- t_COMP, /* 0e */
- t_OR, /* 0f */
+/* 00 */ t_LBL | t_I8c,
+/* 01 */ t_TML | t_I4 | t_I8,
+/* 02 */ t_TML | t_I4 | t_I8,
+/* 03 */ t_TML | t_I4 | t_I8,
+/* 04 */ t_LBUA,
+/* 05 */ t_RTN | t_OUT,
+/* 06 */ t_XS,
+/* 07 */ t_RTNSK | t_OUT,
+/* 08 */ t_ADCSK,
+/* 09 */ t_ADSK,
+/* 0a */ t_ADC,
+/* 0b */ t_AD,
+/* 0c */ t_EOR,
+/* 0d */ t_AND,
+/* 0e */ t_COMP,
+/* 0f */ t_OR,
- t_LBMX, /* 10 */
- t_LABL, /* 11 */
- t_LAX, /* 12 */
- t_SAG, /* 13 */
- t_SKF2, /* 14 */
- t_SKC, /* 15 */
- t_SKF1, /* 16 */
- t_INCB, /* 17 */
- t_XBMX, /* 18 */
- t_XABL, /* 19 */
- t_XAX, /* 1a */
- t_LXA, /* 1b */
- t_IOL | t_I8, /* 1c */
- t_DOA, /* 1d */
- t_SKZ, /* 1e */
- t_DECB, /* 1f */
+/* 10 */ t_LBMX,
+/* 11 */ t_LABL,
+/* 12 */ t_LAX,
+/* 13 */ t_SAG,
+/* 14 */ t_SKF2,
+/* 15 */ t_SKC,
+/* 16 */ t_SKF1,
+/* 17 */ t_INCB,
+/* 18 */ t_XBMX,
+/* 19 */ t_XABL,
+/* 1a */ t_XAX,
+/* 1b */ t_LXA,
+/* 1c */ t_IOL | t_I8,
+/* 1d */ t_DOA,
+/* 1e */ t_SKZ,
+/* 1f */ t_DECB,
- t_SC, /* 20 */
- t_SF2, /* 21 */
- t_SF1, /* 22 */
- t_DIB, /* 23 */
- t_RC, /* 24 */
- t_RF2, /* 25 */
- t_RF1, /* 26 */
- t_DIA, /* 27 */
- t_EXD | t_I3c, /* 28 */
- t_EXD | t_I3c, /* 29 */
- t_EXD | t_I3c, /* 2a */
- t_EXD | t_I3c, /* 2b */
- t_EXD | t_I3c, /* 2c */
- t_EXD | t_I3c, /* 2d */
- t_EXD | t_I3c, /* 2e */
- t_EXD | t_I3c, /* 2f */
+/* 20 */ t_SC,
+/* 21 */ t_SF2,
+/* 22 */ t_SF1,
+/* 23 */ t_DIB,
+/* 24 */ t_RC,
+/* 25 */ t_RF2,
+/* 26 */ t_RF1,
+/* 27 */ t_DIA,
+/* 28 */ t_EXD | t_I3c,
+/* 29 */ t_EXD | t_I3c,
+/* 2a */ t_EXD | t_I3c,
+/* 2b */ t_EXD | t_I3c,
+/* 2c */ t_EXD | t_I3c,
+/* 2d */ t_EXD | t_I3c,
+/* 2e */ t_EXD | t_I3c,
+/* 2f */ t_EXD | t_I3c,
- t_LD | t_I3c, /* 30 */
- t_LD | t_I3c, /* 31 */
- t_LD | t_I3c, /* 32 */
- t_LD | t_I3c, /* 33 */
- t_LD | t_I3c, /* 34 */
- t_LD | t_I3c, /* 35 */
- t_LD | t_I3c, /* 36 */
- t_LD | t_I3c, /* 37 */
- t_EX | t_I3c, /* 38 */
- t_EX | t_I3c, /* 39 */
- t_EX | t_I3c, /* 3a */
- t_EX | t_I3c, /* 3b */
- t_EX | t_I3c, /* 3c */
- t_EX | t_I3c, /* 3d */
- t_EX | t_I3c, /* 3e */
- t_EX | t_I3c, /* 3f */
+/* 30 */ t_LD | t_I3c,
+/* 31 */ t_LD | t_I3c,
+/* 32 */ t_LD | t_I3c,
+/* 33 */ t_LD | t_I3c,
+/* 34 */ t_LD | t_I3c,
+/* 35 */ t_LD | t_I3c,
+/* 36 */ t_LD | t_I3c,
+/* 37 */ t_LD | t_I3c,
+/* 38 */ t_EX | t_I3c,
+/* 39 */ t_EX | t_I3c,
+/* 3a */ t_EX | t_I3c,
+/* 3b */ t_EX | t_I3c,
+/* 3c */ t_EX | t_I3c,
+/* 3d */ t_EX | t_I3c,
+/* 3e */ t_EX | t_I3c,
+/* 3f */ t_EX | t_I3c,
- t_SKBI | t_I4, /* 40 */
- t_SKBI | t_I4, /* 41 */
- t_SKBI | t_I4, /* 42 */
- t_SKBI | t_I4, /* 43 */
- t_SKBI | t_I4, /* 44 */
- t_SKBI | t_I4, /* 45 */
- t_SKBI | t_I4, /* 46 */
- t_SKBI | t_I4, /* 47 */
- t_SKBI | t_I4, /* 48 */
- t_SKBI | t_I4, /* 49 */
- t_SKBI | t_I4, /* 4a */
- t_SKBI | t_I4, /* 4b */
- t_SKBI | t_I4, /* 4c */
- t_SKBI | t_I4, /* 4d */
- t_SKBI | t_I4, /* 4e */
- t_SKBI | t_I4, /* 4f */
+/* 40 */ t_SKBI | t_I4,
+/* 41 */ t_SKBI | t_I4,
+/* 42 */ t_SKBI | t_I4,
+/* 43 */ t_SKBI | t_I4,
+/* 44 */ t_SKBI | t_I4,
+/* 45 */ t_SKBI | t_I4,
+/* 46 */ t_SKBI | t_I4,
+/* 47 */ t_SKBI | t_I4,
+/* 48 */ t_SKBI | t_I4,
+/* 49 */ t_SKBI | t_I4,
+/* 4a */ t_SKBI | t_I4,
+/* 4b */ t_SKBI | t_I4,
+/* 4c */ t_SKBI | t_I4,
+/* 4d */ t_SKBI | t_I4,
+/* 4e */ t_SKBI | t_I4,
+/* 4f */ t_SKBI | t_I4,
- t_TL | t_I4 | t_I8, /* 50 */
- t_TL | t_I4 | t_I8, /* 51 */
- t_TL | t_I4 | t_I8, /* 52 */
- t_TL | t_I4 | t_I8, /* 53 */
- t_TL | t_I4 | t_I8, /* 54 */
- t_TL | t_I4 | t_I8, /* 55 */
- t_TL | t_I4 | t_I8, /* 56 */
- t_TL | t_I4 | t_I8, /* 57 */
- t_TL | t_I4 | t_I8, /* 58 */
- t_TL | t_I4 | t_I8, /* 59 */
- t_TL | t_I4 | t_I8, /* 5a */
- t_TL | t_I4 | t_I8, /* 5b */
- t_TL | t_I4 | t_I8, /* 5c */
- t_TL | t_I4 | t_I8, /* 5d */
- t_TL | t_I4 | t_I8, /* 5e */
- t_TL | t_I4 | t_I8, /* 5f */
+/* 50 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 51 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 52 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 53 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 54 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 55 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 56 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 57 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 58 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 59 */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 5a */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 5b */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 5c */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 5d */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 5e */ t_TL | t_I4 | t_I8 | t_OVER,
+/* 5f */ t_TL | t_I4 | t_I8 | t_OVER,
- t_ADI | t_I4c, /* 60 */
- t_ADI | t_I4c, /* 61 */
- t_ADI | t_I4c, /* 62 */
- t_ADI | t_I4c, /* 63 */
- t_ADI | t_I4c, /* 64 */
- t_DC, /* 65 */
- t_ADI | t_I4c, /* 66 */
- t_ADI | t_I4c, /* 67 */
- t_ADI | t_I4c, /* 68 */
- t_ADI | t_I4c, /* 69 */
- t_ADI | t_I4c, /* 6a */
- t_ADI | t_I4c, /* 6b */
- t_ADI | t_I4c, /* 6c */
- t_ADI | t_I4c, /* 6d */
- t_ADI | t_I4c, /* 6e */
- t_CYS, /* 6f */
+/* 60 */ t_ADI | t_I4c,
+/* 61 */ t_ADI | t_I4c,
+/* 62 */ t_ADI | t_I4c,
+/* 63 */ t_ADI | t_I4c,
+/* 64 */ t_ADI | t_I4c,
+/* 65 */ t_DC,
+/* 66 */ t_ADI | t_I4c,
+/* 67 */ t_ADI | t_I4c,
+/* 68 */ t_ADI | t_I4c,
+/* 69 */ t_ADI | t_I4c,
+/* 6a */ t_ADI | t_I4c,
+/* 6b */ t_ADI | t_I4c,
+/* 6c */ t_ADI | t_I4c,
+/* 6d */ t_ADI | t_I4c,
+/* 6e */ t_ADI | t_I4c,
+/* 6f */ t_CYS,
- t_LDI | t_I4c, /* 70 */
- t_LDI | t_I4c, /* 71 */
- t_LDI | t_I4c, /* 72 */
- t_LDI | t_I4c, /* 73 */
- t_LDI | t_I4c, /* 74 */
- t_LDI | t_I4c, /* 75 */
- t_LDI | t_I4c, /* 76 */
- t_LDI | t_I4c, /* 77 */
- t_LDI | t_I4c, /* 78 */
- t_LDI | t_I4c, /* 79 */
- t_LDI | t_I4c, /* 7a */
- t_LDI | t_I4c, /* 7b */
- t_LDI | t_I4c, /* 7c */
- t_LDI | t_I4c, /* 7d */
- t_LDI | t_I4c, /* 7e */
- t_LDI | t_I4c, /* 7f */
+/* 70 */ t_LDI | t_I4c,
+/* 71 */ t_LDI | t_I4c,
+/* 72 */ t_LDI | t_I4c,
+/* 73 */ t_LDI | t_I4c,
+/* 74 */ t_LDI | t_I4c,
+/* 75 */ t_LDI | t_I4c,
+/* 76 */ t_LDI | t_I4c,
+/* 77 */ t_LDI | t_I4c,
+/* 78 */ t_LDI | t_I4c,
+/* 79 */ t_LDI | t_I4c,
+/* 7a */ t_LDI | t_I4c,
+/* 7b */ t_LDI | t_I4c,
+/* 7c */ t_LDI | t_I4c,
+/* 7d */ t_LDI | t_I4c,
+/* 7e */ t_LDI | t_I4c,
+/* 7f */ t_LDI | t_I4c,
- t_T | t_I6p, /* 80 */
- t_T | t_I6p, /* 81 */
- t_T | t_I6p, /* 82 */
- t_T | t_I6p, /* 83 */
- t_T | t_I6p, /* 84 */
- t_T | t_I6p, /* 85 */
- t_T | t_I6p, /* 86 */
- t_T | t_I6p, /* 87 */
- t_T | t_I6p, /* 88 */
- t_T | t_I6p, /* 89 */
- t_T | t_I6p, /* 8a */
- t_T | t_I6p, /* 8b */
- t_T | t_I6p, /* 8c */
- t_T | t_I6p, /* 8d */
- t_T | t_I6p, /* 8e */
- t_T | t_I6p, /* 8f */
+/* 80 */ t_T | t_I6p,
+/* 81 */ t_T | t_I6p,
+/* 82 */ t_T | t_I6p,
+/* 83 */ t_T | t_I6p,
+/* 84 */ t_T | t_I6p,
+/* 85 */ t_T | t_I6p,
+/* 86 */ t_T | t_I6p,
+/* 87 */ t_T | t_I6p,
+/* 88 */ t_T | t_I6p,
+/* 89 */ t_T | t_I6p,
+/* 8a */ t_T | t_I6p,
+/* 8b */ t_T | t_I6p,
+/* 8c */ t_T | t_I6p,
+/* 8d */ t_T | t_I6p,
+/* 8e */ t_T | t_I6p,
+/* 8f */ t_T | t_I6p,
- t_T | t_I6p, /* 90 */
- t_T | t_I6p, /* 91 */
- t_T | t_I6p, /* 92 */
- t_T | t_I6p, /* 93 */
- t_T | t_I6p, /* 94 */
- t_T | t_I6p, /* 95 */
- t_T | t_I6p, /* 96 */
- t_T | t_I6p, /* 97 */
- t_T | t_I6p, /* 98 */
- t_T | t_I6p, /* 99 */
- t_T | t_I6p, /* 9a */
- t_T | t_I6p, /* 9b */
- t_T | t_I6p, /* 9c */
- t_T | t_I6p, /* 9d */
- t_T | t_I6p, /* 9e */
- t_T | t_I6p, /* 9f */
+/* 90 */ t_T | t_I6p,
+/* 91 */ t_T | t_I6p,
+/* 92 */ t_T | t_I6p,
+/* 93 */ t_T | t_I6p,
+/* 94 */ t_T | t_I6p,
+/* 95 */ t_T | t_I6p,
+/* 96 */ t_T | t_I6p,
+/* 97 */ t_T | t_I6p,
+/* 98 */ t_T | t_I6p,
+/* 99 */ t_T | t_I6p,
+/* 9a */ t_T | t_I6p,
+/* 9b */ t_T | t_I6p,
+/* 9c */ t_T | t_I6p,
+/* 9d */ t_T | t_I6p,
+/* 9e */ t_T | t_I6p,
+/* 9f */ t_T | t_I6p,
- t_T | t_I6p, /* a0 */
- t_T | t_I6p, /* a1 */
- t_T | t_I6p, /* a2 */
- t_T | t_I6p, /* a3 */
- t_T | t_I6p, /* a4 */
- t_T | t_I6p, /* a5 */
- t_T | t_I6p, /* a6 */
- t_T | t_I6p, /* a7 */
- t_T | t_I6p, /* a8 */
- t_T | t_I6p, /* a9 */
- t_T | t_I6p, /* aa */
- t_T | t_I6p, /* ab */
- t_T | t_I6p, /* ac */
- t_T | t_I6p, /* ad */
- t_T | t_I6p, /* ae */
- t_T | t_I6p, /* af */
+/* a0 */ t_T | t_I6p,
+/* a1 */ t_T | t_I6p,
+/* a2 */ t_T | t_I6p,
+/* a3 */ t_T | t_I6p,
+/* a4 */ t_T | t_I6p,
+/* a5 */ t_T | t_I6p,
+/* a6 */ t_T | t_I6p,
+/* a7 */ t_T | t_I6p,
+/* a8 */ t_T | t_I6p,
+/* a9 */ t_T | t_I6p,
+/* aa */ t_T | t_I6p,
+/* ab */ t_T | t_I6p,
+/* ac */ t_T | t_I6p,
+/* ad */ t_T | t_I6p,
+/* ae */ t_T | t_I6p,
+/* af */ t_T | t_I6p,
- t_T | t_I6p, /* b0 */
- t_T | t_I6p, /* b1 */
- t_T | t_I6p, /* b2 */
- t_T | t_I6p, /* b3 */
- t_T | t_I6p, /* b4 */
- t_T | t_I6p, /* b5 */
- t_T | t_I6p, /* b6 */
- t_T | t_I6p, /* b7 */
- t_T | t_I6p, /* b8 */
- t_T | t_I6p, /* b9 */
- t_T | t_I6p, /* ba */
- t_T | t_I6p, /* bb */
- t_T | t_I6p, /* bc */
- t_T | t_I6p, /* bd */
- t_T | t_I6p, /* be */
- t_T | t_I6p, /* bf */
+/* b0 */ t_T | t_I6p,
+/* b1 */ t_T | t_I6p,
+/* b2 */ t_T | t_I6p,
+/* b3 */ t_T | t_I6p,
+/* b4 */ t_T | t_I6p,
+/* b5 */ t_T | t_I6p,
+/* b6 */ t_T | t_I6p,
+/* b7 */ t_T | t_I6p,
+/* b8 */ t_T | t_I6p,
+/* b9 */ t_T | t_I6p,
+/* ba */ t_T | t_I6p,
+/* bb */ t_T | t_I6p,
+/* bc */ t_T | t_I6p,
+/* bd */ t_T | t_I6p,
+/* be */ t_T | t_I6p,
+/* bf */ t_T | t_I6p,
- t_LB | t_I4p, /* c0 */
- t_LB | t_I4p, /* c1 */
- t_LB | t_I4p, /* c2 */
- t_LB | t_I4p, /* c3 */
- t_LB | t_I4p, /* c4 */
- t_LB | t_I4p, /* c5 */
- t_LB | t_I4p, /* c6 */
- t_LB | t_I4p, /* c7 */
- t_LB | t_I4p, /* c8 */
- t_LB | t_I4p, /* c9 */
- t_LB | t_I4p, /* ca */
- t_LB | t_I4p, /* cb */
- t_LB | t_I4p, /* cc */
- t_LB | t_I4p, /* cd */
- t_LB | t_I4p, /* ce */
- t_LB | t_I4p, /* cf */
+/* c0 */ t_LB | t_I4p,
+/* c1 */ t_LB | t_I4p,
+/* c2 */ t_LB | t_I4p,
+/* c3 */ t_LB | t_I4p,
+/* c4 */ t_LB | t_I4p,
+/* c5 */ t_LB | t_I4p,
+/* c6 */ t_LB | t_I4p,
+/* c7 */ t_LB | t_I4p,
+/* c8 */ t_LB | t_I4p,
+/* c9 */ t_LB | t_I4p,
+/* ca */ t_LB | t_I4p,
+/* cb */ t_LB | t_I4p,
+/* cc */ t_LB | t_I4p,
+/* cd */ t_LB | t_I4p,
+/* ce */ t_LB | t_I4p,
+/* cf */ t_LB | t_I4p,
- t_TM | t_I6p, /* d0 */
- t_TM | t_I6p, /* d1 */
- t_TM | t_I6p, /* d2 */
- t_TM | t_I6p, /* d3 */
- t_TM | t_I6p, /* d4 */
- t_TM | t_I6p, /* d5 */
- t_TM | t_I6p, /* d6 */
- t_TM | t_I6p, /* d7 */
- t_TM | t_I6p, /* d8 */
- t_TM | t_I6p, /* d9 */
- t_TM | t_I6p, /* da */
- t_TM | t_I6p, /* db */
- t_TM | t_I6p, /* dc */
- t_TM | t_I6p, /* dd */
- t_TM | t_I6p, /* de */
- t_TM | t_I6p, /* df */
+/* d0 */ t_TM | t_I6p | t_OVER,
+/* d1 */ t_TM | t_I6p | t_OVER,
+/* d2 */ t_TM | t_I6p | t_OVER,
+/* d3 */ t_TM | t_I6p | t_OVER,
+/* d4 */ t_TM | t_I6p | t_OVER,
+/* d5 */ t_TM | t_I6p | t_OVER,
+/* d6 */ t_TM | t_I6p | t_OVER,
+/* d7 */ t_TM | t_I6p | t_OVER,
+/* d8 */ t_TM | t_I6p | t_OVER,
+/* d9 */ t_TM | t_I6p | t_OVER,
+/* da */ t_TM | t_I6p | t_OVER,
+/* db */ t_TM | t_I6p | t_OVER,
+/* dc */ t_TM | t_I6p | t_OVER,
+/* dd */ t_TM | t_I6p | t_OVER,
+/* de */ t_TM | t_I6p | t_OVER,
+/* df */ t_TM | t_I6p | t_OVER,
- t_TM | t_I6p, /* e0 */
- t_TM | t_I6p, /* e1 */
- t_TM | t_I6p, /* e2 */
- t_TM | t_I6p, /* e3 */
- t_TM | t_I6p, /* e4 */
- t_TM | t_I6p, /* e5 */
- t_TM | t_I6p, /* e6 */
- t_TM | t_I6p, /* e7 */
- t_TM | t_I6p, /* e8 */
- t_TM | t_I6p, /* e9 */
- t_TM | t_I6p, /* ea */
- t_TM | t_I6p, /* eb */
- t_TM | t_I6p, /* ec */
- t_TM | t_I6p, /* ed */
- t_TM | t_I6p, /* ee */
- t_TM | t_I6p, /* ef */
+/* e0 */ t_TM | t_I6p | t_OVER,
+/* e1 */ t_TM | t_I6p | t_OVER,
+/* e2 */ t_TM | t_I6p | t_OVER,
+/* e3 */ t_TM | t_I6p | t_OVER,
+/* e4 */ t_TM | t_I6p | t_OVER,
+/* e5 */ t_TM | t_I6p | t_OVER,
+/* e6 */ t_TM | t_I6p | t_OVER,
+/* e7 */ t_TM | t_I6p | t_OVER,
+/* e8 */ t_TM | t_I6p | t_OVER,
+/* e9 */ t_TM | t_I6p | t_OVER,
+/* ea */ t_TM | t_I6p | t_OVER,
+/* eb */ t_TM | t_I6p | t_OVER,
+/* ec */ t_TM | t_I6p | t_OVER,
+/* ed */ t_TM | t_I6p | t_OVER,
+/* ee */ t_TM | t_I6p | t_OVER,
+/* ef */ t_TM | t_I6p | t_OVER,
- t_TM | t_I6p, /* f0 */
- t_TM | t_I6p, /* f1 */
- t_TM | t_I6p, /* f2 */
- t_TM | t_I6p, /* f3 */
- t_TM | t_I6p, /* f4 */
- t_TM | t_I6p, /* f5 */
- t_TM | t_I6p, /* f6 */
- t_TM | t_I6p, /* f7 */
- t_TM | t_I6p, /* f8 */
- t_TM | t_I6p, /* f9 */
- t_TM | t_I6p, /* fa */
- t_TM | t_I6p, /* fb */
- t_TM | t_I6p, /* fc */
- t_TM | t_I6p, /* fd */
- t_TM | t_I6p, /* fe */
- t_TM | t_I6p, /* ff */
+/* f0 */ t_TM | t_I6p | t_OVER,
+/* f1 */ t_TM | t_I6p | t_OVER,
+/* f2 */ t_TM | t_I6p | t_OVER,
+/* f3 */ t_TM | t_I6p | t_OVER,
+/* f4 */ t_TM | t_I6p | t_OVER,
+/* f5 */ t_TM | t_I6p | t_OVER,
+/* f6 */ t_TM | t_I6p | t_OVER,
+/* f7 */ t_TM | t_I6p | t_OVER,
+/* f8 */ t_TM | t_I6p | t_OVER,
+/* f9 */ t_TM | t_I6p | t_OVER,
+/* fa */ t_TM | t_I6p | t_OVER,
+/* fb */ t_TM | t_I6p | t_OVER,
+/* fc */ t_TM | t_I6p | t_OVER,
+/* fd */ t_TM | t_I6p | t_OVER,
+/* fe */ t_TM | t_I6p | t_OVER,
+/* ff */ t_TM | t_I6p | t_OVER
};
CPU_DISASSEMBLE( pps4 )
@@ -380,7 +382,8 @@ CPU_DISASSEMBLE( pps4 )
if (tok & t_I3c) {
// 3 bit immediate, complemented
UINT8 i = ~op & 7;
- dst += sprintf(dst, "%x", i);
+ if (0 != i) // only print if non-zero
+ dst += sprintf(dst, "%x", i);
}
if (tok & t_I4) {
@@ -419,7 +422,10 @@ CPU_DISASSEMBLE( pps4 )
dst += sprintf(dst, "%03x", arg);
}
- if (0x05 == op || 0x07 == op) // RTN or RTNSK
+ if (tok & t_OVER) // TL or TML
+ flags |= DASMFLAG_STEP_OVER;
+
+ if (tok & t_OUT) // RTN or RTNSK
flags |= DASMFLAG_STEP_OUT;
return (pc - PC) | flags | DASMFLAG_SUPPORTED;