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author Patrick Mackinlay <pmackinlay@hotmail.com>2020-01-28 17:40:35 +0700
committer Patrick Mackinlay <pmackinlay@hotmail.com>2020-01-28 17:40:35 +0700
commita97b9091be6037976e3f4c1812ec323fa6ac8d4b (patch)
tree1bdb2b68c686a7aec25fc86ce1e8b632faf44b07
parent63fd509d7ea6eef464f3ccfd2eaa658ab6903a80 (diff)
jazz: mct_adr address mapping (nw)
* route r4000 addressing through mct_adr * add notes about other graphics options * housekeeping
-rw-r--r--src/mame/drivers/jazz.cpp69
-rw-r--r--src/mame/includes/jazz.h3
-rw-r--r--src/mame/machine/mct_adr.cpp31
-rw-r--r--src/mame/machine/mct_adr.h10
4 files changed, 72 insertions, 41 deletions
diff --git a/src/mame/drivers/jazz.cpp b/src/mame/drivers/jazz.cpp
index e74aaee15f1..57b4bcf9756 100644
--- a/src/mame/drivers/jazz.cpp
+++ b/src/mame/drivers/jazz.cpp
@@ -79,20 +79,35 @@ void jazz_state::machine_reset()
void jazz_state::init_common()
{
// map the configured ram and vram
- m_cpu->space(0).install_ram(0x00000000, 0x00000000 | m_ram->mask(), m_ram->pointer());
- // FIXME: video ram must be written in emulated cpu order
- m_cpu->space(0).install_ram(0x40000000, 0x40000000 | m_vram->mask(), m_vram->pointer());
+ m_mct_adr->space(0).install_ram(0x00000000, 0x00000000 | m_ram->mask(), m_ram->pointer());
+ m_mct_adr->space(0).install_ram(0x40000000, 0x40000000 | m_vram->mask(), m_vram->pointer());
}
-void jazz_state::jazz_common_map(address_map &map)
+void jazz_state::cpu_map(address_map &map)
{
- map(0x1fc00000, 0x1fc3ffff).r(m_flash, FUNC(amd_28f020_device::read));
-
- // NOTE: defaults to console on serial1 if no video rom found
- map(0x60000000, 0x600001ff).rom().region("graphics", 0);
+ map(0x00000000, 0xffffffff).rw(m_mct_adr, FUNC(mct_adr_device::r4k_r), FUNC(mct_adr_device::r4k_w));
+}
+void jazz_state::mct_map(address_map &map)
+{
+ map(0x1fc00000, 0x1fc3ffff).r(m_flash, FUNC(amd_28f020_device::read));
+
+ // VDR1
+ //map(0x60000000, 0x60001fff).m(m_cvc, FUNC(g364_device::map));
+ //map(0x60010000, 0x60010000); // id (r/w)
+ //map(0x60020000, 0x60020000); // reset
+
+ // VDR1F "Fission"
+ map(0x60000000, 0x6007ffff).rom().region("graphics", 0);
map(0x60080000, 0x60081fff).m(m_cvc, FUNC(g364_device::map));
- map(0x60180000, 0x60180007).lw32([this] (u32 data) { m_cvc->reset(); }, "g364_reset");
+ map(0x60100000, 0x60100000).lw8([this] (u8 data) { m_cvc->set_swapped(ENDIANNESS_NATIVE == ENDIANNESS_BIG); }, "little_endian");
+ map(0x60102000, 0x60102000).lw8([this] (u8 data) { m_cvc->set_swapped(ENDIANNESS_NATIVE == ENDIANNESS_LITTLE); }, "big_endian");
+ map(0x60180000, 0x60180000).lw8([this] (u8 data) { m_cvc->reset(); }, "g364_reset");
+ //map(0x60182000, 0x60182000); // TODO: monitor
+
+ // VDR2
+ //map(0x60000000, 0x60000fff).m(m_cvc, FUNC(g300_device::map));
+ //map(0x60008000, 0x60008fff).m(m_cursor, FUNC(bt431_device::map)).umask32(0x000000ff);
map(0x80000000, 0x80000fff).m(m_mct_adr, FUNC(mct_adr_device::map));
@@ -104,13 +119,13 @@ void jazz_state::jazz_common_map(address_map &map)
// BE: read 400d, write 400d, write 400c
map(0x80004000, 0x8000400f).lrw8(
NAME([this] (offs_t offset) { return m_rtc->read(1); }),
- NAME([this] (offs_t offset, u8 data) { m_rtc->write(1, data); })).umask64(0xff);
- map(0x80005000, 0x80005007).rw(m_kbdc, FUNC(ps2_keyboard_controller_device::data_r), FUNC(ps2_keyboard_controller_device::data_w)).umask64(0x00ff);
- map(0x80005000, 0x80005007).rw(m_kbdc, FUNC(ps2_keyboard_controller_device::status_r), FUNC(ps2_keyboard_controller_device::command_w)).umask64(0xff00);
+ NAME([this] (offs_t offset, u8 data) { m_rtc->write(1, data); }));
+ map(0x80005000, 0x80005000).rw(m_kbdc, FUNC(ps2_keyboard_controller_device::data_r), FUNC(ps2_keyboard_controller_device::data_w));
+ map(0x80005001, 0x80005001).rw(m_kbdc, FUNC(ps2_keyboard_controller_device::status_r), FUNC(ps2_keyboard_controller_device::command_w));
map(0x80006000, 0x80006007).rw(m_ace[0], FUNC(ns16550_device::ins8250_r), FUNC(ns16550_device::ins8250_w));
map(0x80007000, 0x80007007).rw(m_ace[1], FUNC(ns16550_device::ins8250_r), FUNC(ns16550_device::ins8250_w));
- map(0x80008000, 0x80008007).rw(m_lpt, FUNC(pc_lpt_device::read), FUNC(pc_lpt_device::write)).umask64(0xffffffff);
- map(0x80009000, 0x8000afff).ram().share("nvram"); // 9000-9fff unprotected/a000-afff protected?
+ map(0x80008000, 0x80008003).rw(m_lpt, FUNC(pc_lpt_device::read), FUNC(pc_lpt_device::write));
+ map(0x80009000, 0x8000afff).ram().share("nvram");
map(0x8000b000, 0x8000b007).lr8(
[] (offs_t offset)
{
@@ -120,14 +135,12 @@ void jazz_state::jazz_common_map(address_map &map)
return mac[offset];
},
"mac");
- // 3 4k pages of nvram: read/write, protected, read-only
- // last page holds ethernet mac and checksum in bytes 0-7
//map(0x8000c000, 0x8000cfff) // sound
//map(0x8000d000, 0x8000dfff).noprw(); // dummy dma device?
map(0x8000d600, 0x8000d607).nopw();
- map(0x8000f000, 0x8000f007).w(FUNC(jazz_state::led_w)).umask64(0xff);
+ map(0x8000f000, 0x8000f000).w(FUNC(jazz_state::led_w));
// lots of byte data written to 800
//map(0x800e0000, 0x800fffff).m() // dram config
@@ -144,8 +157,8 @@ void jazz_state::jazz_common_map(address_map &map)
//map(0x92000000, 0x92ffffff).m(); // EISA I/O ports?
//map(0x93000000, 0x93ffffff).m(); // EISA memory
- map(0xf0000000, 0xf0000007).r(m_mct_adr, FUNC(mct_adr_device::isr_r)).umask64(0xffff);
- map(0xf0000000, 0xf0000007).rw(m_mct_adr, FUNC(mct_adr_device::imr_r), FUNC(mct_adr_device::imr_w)).umask64(0xffff0000);
+ map(0xf0000000, 0xf0000001).r(m_mct_adr, FUNC(mct_adr_device::isr_r));
+ map(0xf0000002, 0xf0000003).rw(m_mct_adr, FUNC(mct_adr_device::imr_r), FUNC(mct_adr_device::imr_w));
map(0xfff00000, 0xfff3ffff).r(m_flash, FUNC(amd_28f020_device::read)); // mirror?
}
@@ -164,7 +177,7 @@ void jazz_state::jazz(machine_config &config)
{
// FIXME: slow the cpu clock to get past session manager bugcheck
R4000(config, m_cpu, 50_MHz_XTAL / 5);
- m_cpu->set_addrmap(0, &jazz_state::jazz_common_map);
+ m_cpu->set_addrmap(0, &jazz_state::cpu_map);
RAM(config, m_ram);
m_ram->set_default_size("16M");
@@ -177,7 +190,7 @@ void jazz_state::jazz(machine_config &config)
// local bus dma, timer and interrupt controller
MCT_ADR(config, m_mct_adr, 0);
- m_mct_adr->set_bus(m_cpu, 0);
+ m_mct_adr->set_addrmap(0, &jazz_state::mct_map);
m_mct_adr->out_int_dma_cb().set_inputline(m_cpu, INPUT_LINE_IRQ0);
m_mct_adr->out_int_device_cb().set_inputline(m_cpu, INPUT_LINE_IRQ1);
m_mct_adr->out_int_timer_cb().set_inputline(m_cpu, INPUT_LINE_IRQ4);
@@ -195,7 +208,7 @@ void jazz_state::jazz(machine_config &config)
// scsi host adapter
NSCSI_CONNECTOR(config, "scsi:7").option_set("ncr53c94", NCR53C94).clock(24_MHz_XTAL).machine_config(
- [this](device_t *device)
+ [this] (device_t *device)
{
ncr53c94_device &adapter = downcast<ncr53c94_device &>(*device);
@@ -242,7 +255,7 @@ void jazz_state::jazz(machine_config &config)
// keyboard controller
PS2_KEYBOARD_CONTROLLER(config, m_kbdc, 12_MHz_XTAL);
// FIXME: reset is probably routed through the MCT-ADR
- m_kbdc->hot_res().set([this](int state) { machine().schedule_soft_reset(); });
+ m_kbdc->hot_res().set([this] (int state) { machine().schedule_soft_reset(); });
m_kbdc->kbd_clk().set(kbd_con, FUNC(pc_kbdc_device::clock_write_from_mb));
m_kbdc->kbd_data().set(kbd_con, FUNC(pc_kbdc_device::data_write_from_mb));
m_kbdc->kbd_irq().set(m_mct_adr, FUNC(mct_adr_device::irq<6>));
@@ -300,7 +313,7 @@ void jazz_state::jazz(machine_config &config)
DP83932C(config, m_net, 20_MHz_XTAL);
m_net->out_int_cb().set(m_mct_adr, FUNC(mct_adr_device::irq<4>));
- m_net->set_bus(m_mct_adr, 0);
+ m_net->set_bus(m_mct_adr, 1);
I82357(config, m_isp, 14.318181_MHz_XTAL);
m_isp->out_rtc_cb().set(m_rtc, FUNC(mc146818_device::write));
@@ -355,20 +368,20 @@ void jazz_state::mmr4000le(machine_config &config)
}
ROM_START(mmr4000be)
- ROM_REGION64_BE(0x40000, "flash", 0)
+ ROM_REGION32_LE(0x40000, "flash", 0)
ROM_SYSTEM_BIOS(0, "riscos", "R4000 RISC/os PROM")
ROMX_LOAD("riscos.bin", 0x00000, 0x40000, CRC(cea6bc8f) SHA1(3e47b4ad5d1a0c7aac649e6aef3df1bf86fc938b), ROM_BIOS(0))
- ROM_REGION64_BE(0x200, "graphics", 0)
+ ROM_REGION32_LE(0x800000, "graphics", 0)
ROM_LOAD64_BYTE("mips_g364.bin", 0x00, 0x40, CRC(9265ccb6) SHA1(ef5c3a6bc5249274dd9c9a18d88a668cdd457370) BAD_DUMP)
ROM_END
ROM_START(mmr4000le)
- ROM_REGION64_LE(0x40000, "flash", 0)
+ ROM_REGION32_LE(0x40000, "flash", 0)
ROM_SYSTEM_BIOS(0, "ntprom", "R4000 Windows NT PROM")
ROMX_LOAD("ntprom.bin", 0x00000, 0x40000, CRC(d91018d7) SHA1(316de17820192c89b8ee6d9936ab8364a739ca53), ROM_BIOS(0))
- ROM_REGION64_LE(0x200, "graphics", 0)
+ ROM_REGION32_LE(0x800000, "graphics", 0)
// Jazz G300 (8.125MHz video clock)
//ROM_LOAD64_BYTE("jazz_g300.bin", 0x00, 0x40, CRC(258eb00a) SHA1(6e3fd0272957524de82e7042d6e36aca492c4d26) BAD_DUMP)
// Jazz G364 (8.125MHz video clock)
diff --git a/src/mame/includes/jazz.h b/src/mame/includes/jazz.h
index 449035a4293..7b8135899e5 100644
--- a/src/mame/includes/jazz.h
+++ b/src/mame/includes/jazz.h
@@ -76,7 +76,8 @@ protected:
virtual void machine_reset() override;
// address maps
- void jazz_common_map(address_map &map);
+ void cpu_map(address_map &map);
+ void mct_map(address_map &map);
// machine config
void jazz(machine_config &config);
diff --git a/src/mame/machine/mct_adr.cpp b/src/mame/machine/mct_adr.cpp
index 2882bcca339..168b43ed7d2 100644
--- a/src/mame/machine/mct_adr.cpp
+++ b/src/mame/machine/mct_adr.cpp
@@ -40,8 +40,8 @@ DEFINE_DEVICE_TYPE(MCT_ADR, mct_adr_device, "mct_adr", "MCT-ADR Address Path Con
mct_adr_device::mct_adr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, MCT_ADR, tag, owner, clock)
, device_memory_interface(mconfig, *this)
+ , m_io_config("io", ENDIANNESS_LITTLE, 32, 32, 0)
, m_dma_config("dma", ENDIANNESS_LITTLE, 32, 32, 0, address_map_constructor(FUNC(mct_adr_device::dma), this))
- , m_bus(*this, finder_base::DUMMY_TAG, -1, 64)
, m_out_int_dma(*this)
, m_out_int_device(*this)
, m_out_int_timer(*this)
@@ -83,7 +83,7 @@ void mct_adr_device::map(address_map &map)
{
u32 const address = (m_ioc_physical_tag & ~0x1) + ((m_ioc_maint & 0x3) << 3);
- m_bus->write_dword(address, data);
+ space(0).write_dword(address, data);
}
}, "io_cache_buffer_window_lo");
// io_cache_buffer_window_hi
@@ -128,15 +128,14 @@ void mct_adr_device::map(address_map &map)
device_memory_interface::space_config_vector mct_adr_device::memory_space_config() const
{
return space_config_vector{
- std::make_pair(0, &m_dma_config)
+ std::make_pair(0, &m_io_config),
+ std::make_pair(1, &m_dma_config)
};
}
void mct_adr_device::dma(address_map &map)
{
- map(0x00000000U, 0xffffffffU).lrw32(
- [this](offs_t offset) { return m_bus->read_dword(translate_address(offset << 2)); }, "dma_r",
- [this](offs_t offset, u32 data, u32 mem_mask) { m_bus->write_dword(translate_address(offset << 2), data, mem_mask); }, "dma_w");
+ map(0x00000000U, 0xffffffffU).rw(FUNC(mct_adr_device::dma_r), FUNC(mct_adr_device::dma_w));
}
void mct_adr_device::device_start()
@@ -278,7 +277,7 @@ TIMER_CALLBACK_MEMBER(mct_adr_device::dma_check)
// perform dma transfer
if (m_dma_reg[(channel << 2) + REG_ENABLE] & DMA_DIRECTION)
{
- u8 const data = m_bus->read_byte(address);
+ u8 const data = space(0).read_byte(address);
//LOG("dma_w data 0x%02x address 0x%08x\n", data, address);
@@ -290,7 +289,7 @@ TIMER_CALLBACK_MEMBER(mct_adr_device::dma_check)
//LOG("dma_r data 0x%02x address 0x%08x\n", data, address);
- m_bus->write_byte(address, data);
+ space(0).write_byte(address, data);
}
// increment address, decrement count
@@ -322,7 +321,7 @@ u32 mct_adr_device::translate_address(u32 logical_address)
{
u32 entry_address = (m_trans_tbl_base & 0x7fffffff) + page * 8;
- return m_bus->read_dword(entry_address) | (logical_address & 0xfff);
+ return space(0).read_dword(entry_address) | (logical_address & 0xfff);
}
else
{
@@ -331,3 +330,17 @@ u32 mct_adr_device::translate_address(u32 logical_address)
return 0; // FIXME: address error
}
}
+
+u32 mct_adr_device::dma_r(offs_t offset, u32 mem_mask)
+{
+ u32 const address = translate_address(offset << 2);
+
+ return space(0).read_dword(address, mem_mask);
+}
+
+void mct_adr_device::dma_w(offs_t offset, u32 data, u32 mem_mask)
+{
+ u32 const address = translate_address(offset << 2);
+
+ space(0).write_dword(address, data, mem_mask);
+}
diff --git a/src/mame/machine/mct_adr.h b/src/mame/machine/mct_adr.h
index 6adfa508be1..d46f51c0291 100644
--- a/src/mame/machine/mct_adr.h
+++ b/src/mame/machine/mct_adr.h
@@ -14,8 +14,6 @@ public:
mct_adr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration
- template <typename T> void set_bus(T &&tag, int spacenum) { m_bus.set_tag(std::forward<T>(tag), spacenum); }
-
auto out_int_dma_cb() { return m_out_int_dma.bind(); }
auto out_int_device_cb() { return m_out_int_device.bind(); }
auto out_int_timer_cb() { return m_out_int_timer.bind(); }
@@ -29,6 +27,9 @@ public:
void map(address_map &map);
+ u64 r4k_r(offs_t offset, u64 mem_mask) { return space(0).read_qword(offset << 3, mem_mask); }
+ void r4k_w(offs_t offset, u64 data, u64 mem_mask) { space(0).write_qword(offset << 3, data, mem_mask); }
+
u16 isr_r();
u16 imr_r() { return m_imr; }
void imr_w(u16 data);
@@ -42,6 +43,9 @@ protected:
virtual space_config_vector memory_space_config() const override;
//virtual bool memory_translate(int spacenum, int intention, offs_t &address) override;
+ u32 dma_r(offs_t offset, u32 mem_mask);
+ void dma_w(offs_t offset, u32 data, u32 mem_mask);
+
private:
void dma(address_map &map);
@@ -54,8 +58,8 @@ private:
u32 translate_address(u32 logical_address);
+ address_space_config m_io_config;
address_space_config m_dma_config;
- required_address_space m_bus;
devcb_write_line m_out_int_dma;
devcb_write_line m_out_int_device;