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author Robbbert <Robbbert@users.noreply.github.com>2019-05-05 17:46:39 +1000
committer Robbbert <Robbbert@users.noreply.github.com>2019-05-05 17:46:39 +1000
commita735f009f4106102302379488416bbe295034e0d (patch)
tree3e0ddc17db6546c364541750f2519c9eb97dac4a
parentcec68f5a612019b7d242d0fb9d8a83f948500dd5 (diff)
(nw) fixed the build.
-rw-r--r--scripts/target/mame/mess.lua1
-rw-r--r--src/mame/drivers/mvme162.cpp18
-rw-r--r--src/mame/mess.flt1
3 files changed, 12 insertions, 8 deletions
diff --git a/scripts/target/mame/mess.lua b/scripts/target/mame/mess.lua
index f6a573aba1b..cf007676089 100644
--- a/scripts/target/mame/mess.lua
+++ b/scripts/target/mame/mess.lua
@@ -2622,6 +2622,7 @@ files {
MAME_DIR .. "src/mame/drivers/m68705prg.cpp",
MAME_DIR .. "src/mame/drivers/mekd2.cpp",
MAME_DIR .. "src/mame/drivers/mvme147.cpp",
+ MAME_DIR .. "src/mame/drivers/mvme162.cpp",
}
createMESSProjects(_target, _subtarget, "multitch")
diff --git a/src/mame/drivers/mvme162.cpp b/src/mame/drivers/mvme162.cpp
index a4439763423..961e7e9daa7 100644
--- a/src/mame/drivers/mvme162.cpp
+++ b/src/mame/drivers/mvme162.cpp
@@ -196,10 +196,10 @@ signal levels. The four serial ports are routed to four RJ45 telephone connector
class mvme162_state : public driver_device
{
public:
-mvme162_state(const machine_config &mconfig, device_type type, const char *tag) :
- driver_device (mconfig, type, tag),
- m_maincpu (*this, "maincpu")
- ,m_sccterm(*this, "scc")
+mvme162_state(const machine_config &mconfig, device_type type, const char *tag)
+ : driver_device (mconfig, type, tag)
+ , m_maincpu (*this, "maincpu")
+ , m_sccterm(*this, "scc")
{
}
@@ -217,8 +217,8 @@ private:
//required_device<scc85230_device> m_sccterm2;
// Pointer to System ROMs needed by bootvect_r and masking RAM buffer for post reset accesses
- uint32_t *m_sysrom;
- uint32_t m_sysram[2];
+ uint32_t *m_sysrom;
+ uint32_t m_sysram[2];
// PCC registers
uint8_t m_genpurp_stat;
@@ -277,11 +277,13 @@ void mvme162_state::machine_reset ()
in the MCchip EPROM control register is high (ROM0=1). ROM0 is set to 1 after each reset. The ROM0 bit must be
cleared before other resources (DRAM or SRAM) can be mapped in this range ($00000000 - $001FFFFF).
*/
-READ32_MEMBER (mvme162_state::bootvect_r){
+READ32_MEMBER (mvme162_state::bootvect_r)
+{
return m_sysrom[offset];
}
-WRITE32_MEMBER (mvme162_state::bootvect_w){
+WRITE32_MEMBER (mvme162_state::bootvect_w)
+{
m_sysram[offset % sizeof(m_sysram)] &= ~mem_mask;
m_sysram[offset % sizeof(m_sysram)] |= (data & mem_mask);
m_sysrom = &m_sysram[0]; // redirect all upcomming accesses to masking RAM until reset.
diff --git a/src/mame/mess.flt b/src/mame/mess.flt
index 5c26482e3be..00221331e52 100644
--- a/src/mame/mess.flt
+++ b/src/mame/mess.flt
@@ -498,6 +498,7 @@ multi16.cpp
multi8.cpp
mupid2.cpp
mvme147.cpp
+mvme162.cpp
mx2178.cpp
myb3k.cpp
mycom.cpp