diff options
| author | 2025-11-09 14:50:44 +0100 | |
|---|---|---|
| committer | 2025-11-09 15:12:07 +0100 | |
| commit | 9f7cf0145a11c4be9d764c9faabe903e926aea60 (patch) | |
| tree | bc3f66c88397c505e2790cc1a338e8f0c308b7ad | |
| parent | 1ea36a021207e6c75b85b6d7096c0234e6632b9a (diff) | |
nec/pc9801.cpp: move RAM handling to specific 54simm / 61simm options
29 files changed, 1264 insertions, 151 deletions
diff --git a/hash/pc98_cd.xml b/hash/pc98_cd.xml index b55cff4edc7..245cfd0c5bd 100644 --- a/hash/pc98_cd.xml +++ b/hash/pc98_cd.xml @@ -374,6 +374,12 @@ Slackware-based distro, cfr. plamo3x <description>Windows NT 4.0 Workstation</description> <year>1996</year> <publisher>Microsoft</publisher> + <notes><![CDATA[ +Triggers [pc98_kbd] 0x96 command at install startup +Triggers tons of [DMA] 32-bit space registers at install startup +]]></notes> + <!-- NOTE: Win NT will ask disks in inverse order, so disk #3 first then #2, finally #1 --> + <info name="usage" value="From an HDD installed DOS, format three floppies then run WINNT.EXE in PC98 folder. Requires 16MB or more RAM." /> <part name="cdrom1" interface="cdrom"> <diskarea name="cdrom"> <disk name="windows nt 4.0 workstation (disc 1)" sha1="32fb5639983ba8c3e726ce9b3291a9a14b37facd" /> diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua index b902c086eaa..bc906a8f200 100644 --- a/scripts/src/bus.lua +++ b/scripts/src/bus.lua @@ -5571,6 +5571,8 @@ if (BUSES["PC98_CBUS"]~=null) then MAME_DIR .. "src/devices/bus/pc98_cbus/mpu_pc98.h", MAME_DIR .. "src/devices/bus/pc98_cbus/options.cpp", MAME_DIR .. "src/devices/bus/pc98_cbus/options.h", + MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_02.cpp", + MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_02.h", MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_14.cpp", MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_14.h", MAME_DIR .. "src/devices/bus/pc98_cbus/pc9801_26.cpp", @@ -5592,6 +5594,41 @@ if (BUSES["PC98_CBUS"]~=null) then } end + +--------------------------------------------------- +-- +--@src/devices/bus/pc98_54simm/slot.h,BUSES["PC98_54SIMM"] = true +--------------------------------------------------- + +if (BUSES["PC98_54SIMM"]~=null) then + files { + MAME_DIR .. "src/devices/bus/pc98_54simm/options.cpp", + MAME_DIR .. "src/devices/bus/pc98_54simm/options.h", + MAME_DIR .. "src/devices/bus/pc98_54simm/simm.cpp", + MAME_DIR .. "src/devices/bus/pc98_54simm/simm.h", + MAME_DIR .. "src/devices/bus/pc98_54simm/slot.cpp", + MAME_DIR .. "src/devices/bus/pc98_54simm/slot.h", + } +end + + +--------------------------------------------------- +-- +--@src/devices/bus/pc98_61simm/slot.h,BUSES["PC98_61SIMM"] = true +--------------------------------------------------- + +if (BUSES["PC98_61SIMM"]~=null) then + files { + MAME_DIR .. "src/devices/bus/pc98_61simm/options.cpp", + MAME_DIR .. "src/devices/bus/pc98_61simm/options.h", + MAME_DIR .. "src/devices/bus/pc98_61simm/simm.cpp", + MAME_DIR .. "src/devices/bus/pc98_61simm/simm.h", + MAME_DIR .. "src/devices/bus/pc98_61simm/slot.cpp", + MAME_DIR .. "src/devices/bus/pc98_61simm/slot.h", + } +end + + --------------------------------------------------- -- --@src/devices/bus/psi_kbd/psi_kbd.h,BUSES["PSI_KEYBOARD"] = true diff --git a/src/devices/bus/pc98_54simm/README.md b/src/devices/bus/pc98_54simm/README.md new file mode 100644 index 00000000000..196b408476a --- /dev/null +++ b/src/devices/bus/pc98_54simm/README.md @@ -0,0 +1,16 @@ +# PC-9801 SIMM + +## References +- https://projectmps.net/simm54.htm +- https://projectmps.net/simm61.htm +- https://web.archive.org/web/20190922055823/https://radioc.web.fc2.com/column/pc98bas/pc98extnecram_en.htm + +Proprietary NEC 54SIMM / 61SIMM sockets. + +-54 has a 16-bit data width and -61 has 32-bit + +For usability reasons we emulate these as a single mappable slot, also not everything is actually NEC but rather third party options exist (I/O Data and Melco / Buffalo) + +## TODO +- base/limit I/O registers for 98FELLOW / PC-9821; +- latencies; diff --git a/src/devices/bus/pc98_54simm/options.cpp b/src/devices/bus/pc98_54simm/options.cpp new file mode 100644 index 00000000000..2df773acec7 --- /dev/null +++ b/src/devices/bus/pc98_54simm/options.cpp @@ -0,0 +1,27 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#include "emu.h" +#include "options.h" +#include "simm.h" + +void pc9801ux_simm_options(device_slot_interface &device) +{ + device.option_add("2mb", PC9801_54_2MB); + device.option_add("4mb", PC9801_54_4MB); + device.option_add("7mb", PC9801_54_7MB); +} + +void pc9801vx_simm_options(device_slot_interface &device) +{ + pc9801ux_simm_options(device); + device.option_add("8mb", PC9801_54_8MB); +} + +void pc9801dx_simm_options(device_slot_interface &device) +{ + pc9801vx_simm_options(device); + device.option_add("9mb", PC9801_54_9MB); + device.option_add("15mb", PC9801_54_15MB); +} + diff --git a/src/devices/bus/pc98_54simm/options.h b/src/devices/bus/pc98_54simm/options.h new file mode 100644 index 00000000000..6209ac0416b --- /dev/null +++ b/src/devices/bus/pc98_54simm/options.h @@ -0,0 +1,13 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_54SIMM_OPTIONS_H +#define MAME_BUS_PC98_54SIMM_OPTIONS_H + +#pragma once + +void pc9801ux_simm_options(device_slot_interface &device); +void pc9801vx_simm_options(device_slot_interface &device); +void pc9801dx_simm_options(device_slot_interface &device); + +#endif // MAME_BUS_PC98_54SIMM_PC9801_54_OPTIONS_H diff --git a/src/devices/bus/pc98_54simm/simm.cpp b/src/devices/bus/pc98_54simm/simm.cpp new file mode 100644 index 00000000000..8995d7924b2 --- /dev/null +++ b/src/devices/bus/pc98_54simm/simm.cpp @@ -0,0 +1,90 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#include "emu.h" + +#include "simm.h" + +DEFINE_DEVICE_TYPE(PC9801_54_2MB, pc9801_54_2mb_device, "pc9801_54_2mb", "PC-9801-54 2MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_54_4MB, pc9801_54_4mb_device, "pc9801_54_4mb", "PC-9801-54 4MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_54_7MB, pc9801_54_7mb_device, "pc9801_54_7mb", "PC-9801-54 7MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_54_8MB, pc9801_54_8mb_device, "pc9801_54_8mb", "PC-9801-54 8MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_54_9MB, pc9801_54_9mb_device, "pc9801_54_9mb", "PC-9801-54 9MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_54_15MB, pc9801_54_15mb_device, "pc9801_54_15mb", "PC-9801-54 15MB SIMM") + +pc9801_54_2mb_device::pc9801_54_2mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_54_2MB, tag, owner, clock) + , device_pc9801_54_interface(mconfig, *this) +{ +} + +void pc9801_54_2mb_device::device_start() +{ + m_ram.resize(0x200000 / 2); + m_slot->install_ram(0x000000, 0x1fffff, &m_ram[0]); +} + +pc9801_54_4mb_device::pc9801_54_4mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_54_4MB, tag, owner, clock) + , device_pc9801_54_interface(mconfig, *this) +{ +} + +void pc9801_54_4mb_device::device_start() +{ + m_ram.resize(0x400000 / 2); + m_slot->install_ram(0x000000, 0x3fffff, &m_ram[0]); +} + + +pc9801_54_7mb_device::pc9801_54_7mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_54_7MB, tag, owner, clock) + , device_pc9801_54_interface(mconfig, *this) +{ +} + +void pc9801_54_7mb_device::device_start() +{ + m_ram.resize(0x700000 / 2); + m_slot->install_ram(0x000000, 0x6fffff, &m_ram[0]); +} + + +pc9801_54_8mb_device::pc9801_54_8mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_54_8MB, tag, owner, clock) + , device_pc9801_54_interface(mconfig, *this) +{ +} + +void pc9801_54_8mb_device::device_start() +{ + m_ram.resize(0x800000 / 2); + m_slot->install_ram(0x000000, 0x7fffff, &m_ram[0]); +} + + +pc9801_54_9mb_device::pc9801_54_9mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_54_9MB, tag, owner, clock) + , device_pc9801_54_interface(mconfig, *this) +{ +} + +void pc9801_54_9mb_device::device_start() +{ + m_ram.resize(0x900000 / 2); + m_slot->install_ram(0x000000, 0x8fffff, &m_ram[0]); +} + + +pc9801_54_15mb_device::pc9801_54_15mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_54_15MB, tag, owner, clock) + , device_pc9801_54_interface(mconfig, *this) +{ +} + +void pc9801_54_15mb_device::device_start() +{ + m_ram.resize(0xf00000 / 2); + m_slot->install_ram(0x000000, 0xefffff, &m_ram[0]); +} + diff --git a/src/devices/bus/pc98_54simm/simm.h b/src/devices/bus/pc98_54simm/simm.h new file mode 100644 index 00000000000..5b6d3128523 --- /dev/null +++ b/src/devices/bus/pc98_54simm/simm.h @@ -0,0 +1,80 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_54SIMM_SIMM_H +#define MAME_BUS_PC98_54SIMM_SIMM_H + +#pragma once + +#include "slot.h" + +class pc9801_54_2mb_device : public device_t + , public device_pc9801_54_interface +{ +public: + pc9801_54_2mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_54_4mb_device : public device_t + , public device_pc9801_54_interface +{ +public: + pc9801_54_4mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_54_7mb_device : public device_t + , public device_pc9801_54_interface +{ +public: + pc9801_54_7mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + + +class pc9801_54_8mb_device : public device_t + , public device_pc9801_54_interface +{ +public: + pc9801_54_8mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_54_9mb_device : public device_t + , public device_pc9801_54_interface +{ +public: + pc9801_54_9mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_54_15mb_device : public device_t + , public device_pc9801_54_interface +{ +public: + pc9801_54_15mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + + +DECLARE_DEVICE_TYPE(PC9801_54_2MB, pc9801_54_2mb_device) +DECLARE_DEVICE_TYPE(PC9801_54_4MB, pc9801_54_4mb_device) +DECLARE_DEVICE_TYPE(PC9801_54_7MB, pc9801_54_7mb_device) +DECLARE_DEVICE_TYPE(PC9801_54_8MB, pc9801_54_8mb_device) +DECLARE_DEVICE_TYPE(PC9801_54_9MB, pc9801_54_9mb_device) +DECLARE_DEVICE_TYPE(PC9801_54_15MB, pc9801_54_15mb_device) + +#endif // MAME_BUS_PC98_54SIMM_SIMM_H diff --git a/src/devices/bus/pc98_54simm/slot.cpp b/src/devices/bus/pc98_54simm/slot.cpp new file mode 100644 index 00000000000..68c1ad58eae --- /dev/null +++ b/src/devices/bus/pc98_54simm/slot.cpp @@ -0,0 +1,91 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#include "emu.h" +#include "slot.h" + +/* + * SLOT DEVICE + */ + +DEFINE_DEVICE_TYPE(PC9801_54_SIMM, pc9801_54_simm_device, "pc9801_54_simm", "PC-9801-54 54SIMM Slot") + +pc9801_54_simm_device::pc9801_54_simm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_54_SIMM, tag, owner, clock) + , device_memory_interface(mconfig, *this) + , device_single_card_slot_interface<device_pc9801_54_interface>(mconfig, *this) + , m_space_mem_config("space_mem", ENDIANNESS_LITTLE, 16, 24, 0, address_map_constructor()) +{ +} + +pc9801_54_simm_device::~pc9801_54_simm_device() +{ +} + +void pc9801_54_simm_device::device_start() +{ + m_bank = get_card_device(); + m_space_mem = &space(AS_PROGRAM); +} + + +device_memory_interface::space_config_vector pc9801_54_simm_device::memory_space_config() const +{ + return space_config_vector{ + std::make_pair(AS_PROGRAM, &m_space_mem_config) + }; +} + +// host methods +u16 pc9801_54_simm_device::read(offs_t offset, u16 mem_mask) +{ + return m_space_mem->read_word(offset << 1, mem_mask); +} + +void pc9801_54_simm_device::write(offs_t offset, u16 data, u16 mem_mask) +{ + m_space_mem->write_word(offset << 1, data, mem_mask); +} + +u16 pc9801_54_simm_device::read_ext(offs_t offset, u16 mem_mask) +{ + return m_space_mem->read_word((offset << 1) + 0x100000, mem_mask); +} + +void pc9801_54_simm_device::write_ext(offs_t offset, u16 data, u16 mem_mask) +{ + m_space_mem->write_word((offset << 1) + 0x100000, data, mem_mask); +} + +// bank -> slot +void pc9801_54_simm_device::install_ram(offs_t addrstart, offs_t addrend, void *baseptr) +{ + m_space_mem->install_ram(addrstart, addrend, baseptr); +} + + +/* + * INTERFACE + */ + + +device_pc9801_54_interface::device_pc9801_54_interface(const machine_config &mconfig, device_t &device) + : device_interface(device, "pc9801_54") +{ + m_slot = dynamic_cast<pc9801_54_simm_device *>(device.owner()); +} + +device_pc9801_54_interface::~device_pc9801_54_interface() +{ +} + +void device_pc9801_54_interface::interface_pre_start() +{ + if (!m_slot->started()) + throw device_missing_dependencies(); +} + +void device_pc9801_54_interface::interface_post_start() +{ +} + diff --git a/src/devices/bus/pc98_54simm/slot.h b/src/devices/bus/pc98_54simm/slot.h new file mode 100644 index 00000000000..70917dcddfd --- /dev/null +++ b/src/devices/bus/pc98_54simm/slot.h @@ -0,0 +1,67 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_54SIMM_SLOT_H +#define MAME_BUS_PC98_54SIMM_SLOT_H + +#pragma once + +class device_pc9801_54_interface; + +class pc9801_54_simm_device : public device_t, + public device_memory_interface, + public device_single_card_slot_interface<device_pc9801_54_interface> +{ + friend class device_pc9801_54_interface; +public: + // construction/destruction + template <typename T> + pc9801_54_simm_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) + : pc9801_54_simm_device(mconfig, tag, owner, (uint32_t)0) + { + option_reset(); + opts(*this); + set_default_option(dflt); + set_fixed(false); + } + pc9801_54_simm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + virtual ~pc9801_54_simm_device(); + + u16 read(offs_t offset, u16 mem_mask = ~0); + void write(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 read_ext(offs_t offset, u16 mem_mask = ~0); + void write_ext(offs_t offset, u16 data, u16 mem_mask = ~0); + + void install_ram(offs_t addrstart, offs_t addrend, void *baseptr); +protected: + virtual void device_start() override ATTR_COLD; + virtual space_config_vector memory_space_config() const override; + +private: + device_pc9801_54_interface *m_bank; + + address_space_config m_space_mem_config; + + address_space *m_space_mem; +}; + +class device_pc9801_54_interface : public device_interface +{ +public: + // construction/destruction + virtual ~device_pc9801_54_interface(); + +protected: + device_pc9801_54_interface(const machine_config &mconfig, device_t &device); + + virtual void interface_pre_start() override; + virtual void interface_post_start() override; + + pc9801_54_simm_device *m_slot; + + std::vector<u16> m_ram; +}; + +DECLARE_DEVICE_TYPE(PC9801_54_SIMM, pc9801_54_simm_device) + +#endif // MAME_BUS_PC98_54SIMM_SLOT_H diff --git a/src/devices/bus/pc98_61simm/options.cpp b/src/devices/bus/pc98_61simm/options.cpp new file mode 100644 index 00000000000..ee1b8a52faa --- /dev/null +++ b/src/devices/bus/pc98_61simm/options.cpp @@ -0,0 +1,28 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#include "emu.h" +#include "options.h" +#include "simm.h" + +void pc9821_simm_options(device_slot_interface &device) +{ + device.option_add("2mb", PC9801_61_2MB); + device.option_add("4mb", PC9801_61_4MB); + device.option_add("8mb", PC9801_61_8MB); + device.option_add("16mb", PC9801_61_16MB); +} + +void pc9801bx2_simm_options(device_slot_interface &device) +{ + pc9821_simm_options(device); + device.option_add("20mb", PC9801_61_20MB); +} + +void pc9821ap2_simm_options(device_slot_interface &device) +{ + pc9821_simm_options(device); + device.option_add("32mb", PC9801_61_32MB); + device.option_add("64mb", PC9801_61_64MB); +} + diff --git a/src/devices/bus/pc98_61simm/options.h b/src/devices/bus/pc98_61simm/options.h new file mode 100644 index 00000000000..e2ef65f5268 --- /dev/null +++ b/src/devices/bus/pc98_61simm/options.h @@ -0,0 +1,13 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_61SIMM_OPTIONS_H +#define MAME_BUS_PC98_61SIMM_OPTIONS_H + +#pragma once + +void pc9821_simm_options(device_slot_interface &device); +void pc9801bx2_simm_options(device_slot_interface &device); +void pc9821ap2_simm_options(device_slot_interface &device); + +#endif // MAME_BUS_PC98_61SIMM_OPTIONS_H diff --git a/src/devices/bus/pc98_61simm/simm.cpp b/src/devices/bus/pc98_61simm/simm.cpp new file mode 100644 index 00000000000..b6d49970f82 --- /dev/null +++ b/src/devices/bus/pc98_61simm/simm.cpp @@ -0,0 +1,99 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#include "emu.h" + +#include "simm.h" + +DEFINE_DEVICE_TYPE(PC9801_61_2MB, pc9801_61_2mb_device, "pc9801_61_2mb", "PC-9801-61 2MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_61_4MB, pc9801_61_4mb_device, "pc9801_61_4mb", "PC-9801-61 4MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_61_8MB, pc9801_61_8mb_device, "pc9801_61_8mb", "PC-9801-61 8MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_61_16MB, pc9801_61_16mb_device, "pc9801_61_16mb", "PC-9801-61 16MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_61_20MB, pc9801_61_20mb_device, "pc9801_61_20mb", "PC-9801-61 20MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_61_32MB, pc9801_61_32mb_device, "pc9801_61_32mb", "PC-9801-61 32MB SIMM") +DEFINE_DEVICE_TYPE(PC9801_61_64MB, pc9801_61_64mb_device, "pc9801_61_64mb", "PC-9801-61 64MB SIMM") + +pc9801_61_2mb_device::pc9801_61_2mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_2MB, tag, owner, clock) + , device_pc9801_61_interface(mconfig, *this) +{ +} + +void pc9801_61_2mb_device::device_start() +{ + m_ram.resize(0x200000 / 4); + m_slot->install_ram(0x000000, 0x1fffff, &m_ram[0]); +} + +pc9801_61_4mb_device::pc9801_61_4mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_4MB, tag, owner, clock) + , device_pc9801_61_interface(mconfig, *this) +{ +} + +void pc9801_61_4mb_device::device_start() +{ + m_ram.resize(0x400000 / 4); + m_slot->install_ram(0x000000, 0x3fffff, &m_ram[0]); +} + +pc9801_61_8mb_device::pc9801_61_8mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_8MB, tag, owner, clock) + , device_pc9801_61_interface(mconfig, *this) +{ +} + +void pc9801_61_8mb_device::device_start() +{ + m_ram.resize(0x800000 / 4); + m_slot->install_ram(0x000000, 0x7fffff, &m_ram[0]); +} + +pc9801_61_16mb_device::pc9801_61_16mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_16MB, tag, owner, clock) + , device_pc9801_61_interface(mconfig, *this) +{ +} + +void pc9801_61_16mb_device::device_start() +{ + m_ram.resize(0x1000000 / 4); + m_slot->install_ram(0x000000, 0xffffff, &m_ram[0]); +} + +pc9801_61_20mb_device::pc9801_61_20mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_20MB, tag, owner, clock) + , device_pc9801_61_interface(mconfig, *this) +{ +} + +void pc9801_61_20mb_device::device_start() +{ + m_ram.resize(0x1400000 / 4); + m_slot->install_ram(0x000000, 0x13fffff, &m_ram[0]); +} + +pc9801_61_32mb_device::pc9801_61_32mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_32MB, tag, owner, clock) + , device_pc9801_61_interface(mconfig, *this) +{ +} + +void pc9801_61_32mb_device::device_start() +{ + m_ram.resize(0x2000000 / 4); + m_slot->install_ram(0x000000, 0x1ffffff, &m_ram[0]); +} + +pc9801_61_64mb_device::pc9801_61_64mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_64MB, tag, owner, clock) + , device_pc9801_61_interface(mconfig, *this) +{ +} + +void pc9801_61_64mb_device::device_start() +{ + m_ram.resize(0x4000000 / 4); + m_slot->install_ram(0x000000, 0x3ffffff, &m_ram[0]); +} + diff --git a/src/devices/bus/pc98_61simm/simm.h b/src/devices/bus/pc98_61simm/simm.h new file mode 100644 index 00000000000..16ead04480a --- /dev/null +++ b/src/devices/bus/pc98_61simm/simm.h @@ -0,0 +1,90 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_61SIMM_SIMM_H +#define MAME_BUS_PC98_61SIMM_SIMM_H + +#pragma once + +#include "slot.h" + +class pc9801_61_2mb_device : public device_t + , public device_pc9801_61_interface +{ +public: + pc9801_61_2mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_61_4mb_device : public device_t + , public device_pc9801_61_interface +{ +public: + pc9801_61_4mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_61_8mb_device : public device_t + , public device_pc9801_61_interface +{ +public: + pc9801_61_8mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_61_16mb_device : public device_t + , public device_pc9801_61_interface +{ +public: + pc9801_61_16mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_61_20mb_device : public device_t + , public device_pc9801_61_interface +{ +public: + pc9801_61_20mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_61_32mb_device : public device_t + , public device_pc9801_61_interface +{ +public: + pc9801_61_32mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + +class pc9801_61_64mb_device : public device_t + , public device_pc9801_61_interface +{ +public: + pc9801_61_64mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; +}; + + +DECLARE_DEVICE_TYPE(PC9801_61_2MB, pc9801_61_2mb_device) +DECLARE_DEVICE_TYPE(PC9801_61_4MB, pc9801_61_4mb_device) +DECLARE_DEVICE_TYPE(PC9801_61_8MB, pc9801_61_8mb_device) +DECLARE_DEVICE_TYPE(PC9801_61_16MB, pc9801_61_16mb_device) +DECLARE_DEVICE_TYPE(PC9801_61_20MB, pc9801_61_20mb_device) +DECLARE_DEVICE_TYPE(PC9801_61_32MB, pc9801_61_32mb_device) +DECLARE_DEVICE_TYPE(PC9801_61_64MB, pc9801_61_64mb_device) + +#endif // MAME_BUS_PC98_61SIMM_SIMM_H diff --git a/src/devices/bus/pc98_61simm/slot.cpp b/src/devices/bus/pc98_61simm/slot.cpp new file mode 100644 index 00000000000..331e92c7235 --- /dev/null +++ b/src/devices/bus/pc98_61simm/slot.cpp @@ -0,0 +1,113 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#include "emu.h" +#include "slot.h" + +/* + * SLOT DEVICE + */ + + +DEFINE_DEVICE_TYPE(PC9801_61_SIMM, pc9801_61_simm_device, "pc9801_61_simm", "PC-9801-61 61SIMM Slot") + +pc9801_61_simm_device::pc9801_61_simm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_61_SIMM, tag, owner, clock) + , device_memory_interface(mconfig, *this) + , device_single_card_slot_interface<device_pc9801_61_interface>(mconfig, *this) + , m_space_mem_config("space_mem", ENDIANNESS_LITTLE, 32, 32, 0, address_map_constructor()) +{ +} + +pc9801_61_simm_device::~pc9801_61_simm_device() +{ +} + +void pc9801_61_simm_device::device_start() +{ + m_bank = get_card_device(); + m_space_mem = &space(AS_PROGRAM); +} + + +device_memory_interface::space_config_vector pc9801_61_simm_device::memory_space_config() const +{ + return space_config_vector{ + std::make_pair(AS_PROGRAM, &m_space_mem_config) + }; +} + + +// host methods +u32 pc9801_61_simm_device::read(offs_t offset, u32 mem_mask) +{ + return m_space_mem->read_dword((offset << 2), mem_mask); +} + +void pc9801_61_simm_device::write(offs_t offset, u32 data, u32 mem_mask) +{ + m_space_mem->write_dword((offset << 2), data, mem_mask); +} + +u32 pc9801_61_simm_device::read_ext(offs_t offset, u32 mem_mask) +{ + return m_space_mem->read_dword((offset << 2) + 0x0010'0000, mem_mask); +} + +void pc9801_61_simm_device::write_ext(offs_t offset, u32 data, u32 mem_mask) +{ + m_space_mem->write_dword((offset << 2) + 0x0010'0000, data, mem_mask); +} + +u32 pc9801_61_simm_device::read_15m_ext(offs_t offset, u32 mem_mask) +{ + return m_space_mem->read_dword((offset << 2) + 0x00f0'0000, mem_mask); +} + +void pc9801_61_simm_device::write_15m_ext(offs_t offset, u32 data, u32 mem_mask) +{ + m_space_mem->write_dword((offset << 2) + 0x00f0'0000, data, mem_mask); +} + +u32 pc9801_61_simm_device::read_16m_ext(offs_t offset, u32 mem_mask) +{ + return m_space_mem->read_dword((offset << 2) + 0x0100'0000, mem_mask); +} + +void pc9801_61_simm_device::write_16m_ext(offs_t offset, u32 data, u32 mem_mask) +{ + m_space_mem->write_dword((offset << 2) + 0x0100'0000, data, mem_mask); +} + + +// bank -> slot +void pc9801_61_simm_device::install_ram(offs_t addrstart, offs_t addrend, void *baseptr) +{ + m_space_mem->install_ram(addrstart, addrend, baseptr); +} + + +/* + * INTERFACE + */ + + +device_pc9801_61_interface::device_pc9801_61_interface(const machine_config &mconfig, device_t &device) + : device_interface(device, "pc9801_61") +{ + m_slot = dynamic_cast<pc9801_61_simm_device *>(device.owner()); +} + +device_pc9801_61_interface::~device_pc9801_61_interface() +{ +} + +void device_pc9801_61_interface::interface_pre_start() +{ + if (!m_slot->started()) + throw device_missing_dependencies(); +} + +void device_pc9801_61_interface::interface_post_start() +{ +} diff --git a/src/devices/bus/pc98_61simm/slot.h b/src/devices/bus/pc98_61simm/slot.h new file mode 100644 index 00000000000..9620abc7f89 --- /dev/null +++ b/src/devices/bus/pc98_61simm/slot.h @@ -0,0 +1,72 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_61SIMM_SLOT_H +#define MAME_BUS_PC98_61SIMM_SLOT_H + +#pragma once + + +class device_pc9801_61_interface; + +class pc9801_61_simm_device : public device_t, + public device_memory_interface, + public device_single_card_slot_interface<device_pc9801_61_interface> +{ + friend class device_pc9801_61_interface; +public: + // construction/destruction + template <typename T> + pc9801_61_simm_device(machine_config const &mconfig, char const *tag, device_t *owner, T &&opts, char const *dflt) + : pc9801_61_simm_device(mconfig, tag, owner, (uint32_t)0) + { + option_reset(); + opts(*this); + set_default_option(dflt); + set_fixed(false); + } + pc9801_61_simm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + virtual ~pc9801_61_simm_device(); + + u32 read(offs_t offset, u32 mem_mask = ~0); + void write(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 read_ext(offs_t offset, u32 mem_mask = ~0); + void write_ext(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 read_15m_ext(offs_t offset, u32 mem_mask = ~0); + void write_15m_ext(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 read_16m_ext(offs_t offset, u32 mem_mask = ~0); + void write_16m_ext(offs_t offset, u32 data, u32 mem_mask = ~0); + + void install_ram(offs_t addrstart, offs_t addrend, void *baseptr); +protected: + virtual void device_start() override ATTR_COLD; + virtual space_config_vector memory_space_config() const override; + +private: + device_pc9801_61_interface *m_bank; + + address_space_config m_space_mem_config; + + address_space *m_space_mem; +}; + +class device_pc9801_61_interface : public device_interface +{ +public: + // construction/destruction + virtual ~device_pc9801_61_interface(); + +protected: + device_pc9801_61_interface(const machine_config &mconfig, device_t &device); + + virtual void interface_pre_start() override; + virtual void interface_post_start() override; + + pc9801_61_simm_device *m_slot; + + std::vector<u32> m_ram; +}; + +DECLARE_DEVICE_TYPE(PC9801_61_SIMM, pc9801_61_simm_device) + +#endif // MAME_BUS_PC98_61SIMM_SLOT_H diff --git a/src/devices/bus/pc98_cbus/options.cpp b/src/devices/bus/pc98_cbus/options.cpp index 76286b1a60e..789148bbdb1 100644 --- a/src/devices/bus/pc98_cbus/options.cpp +++ b/src/devices/bus/pc98_cbus/options.cpp @@ -6,6 +6,7 @@ #include "amd98.h" #include "fdd_2d.h" +#include "pc9801_02.h" #include "pc9801_14.h" #include "pc9801_26.h" #include "pc9801_55.h" @@ -49,6 +50,15 @@ void pc98_cbus_devices(device_slot_interface &device) device.option_add_internal("sound_pc9821cx3", SOUND_PC9821CX3); } +void pc98_cbus_ram_devices(device_slot_interface &device) +{ + device.option_add("128kb", PC9801_02_128KB); + device.option_add("256kb", PC9801_02_256KB); + device.option_add("384kb", PC9801_02_384KB); + device.option_add("512kb", PC9801_02_512KB); + device.option_add("640kb", PC9801_02_640KB); +} + // TODO: add just a subset for now, all needs to be verified if compatible with C-Bus. void pc88va_cbus_devices(device_slot_interface &device) { @@ -58,3 +68,5 @@ void pc88va_cbus_devices(device_slot_interface &device) device.option_add("mpu_pc98", MPU_PC98); } + + diff --git a/src/devices/bus/pc98_cbus/options.h b/src/devices/bus/pc98_cbus/options.h index e6e3125847e..35f527a7979 100644 --- a/src/devices/bus/pc98_cbus/options.h +++ b/src/devices/bus/pc98_cbus/options.h @@ -8,5 +8,6 @@ void pc88va_cbus_devices(device_slot_interface &device); void pc98_cbus_devices(device_slot_interface &device); +void pc98_cbus_ram_devices(device_slot_interface &device); #endif // MAME_BUS_PC98_CBUS_OPTIONS_H diff --git a/src/devices/bus/pc98_cbus/pc9801_02.cpp b/src/devices/bus/pc98_cbus/pc9801_02.cpp new file mode 100644 index 00000000000..ce435d1032e --- /dev/null +++ b/src/devices/bus/pc98_cbus/pc9801_02.cpp @@ -0,0 +1,102 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese +/************************************************************************************************** + +Conventional memory for vanilla PC-9801 + +**************************************************************************************************/ + +#include "emu.h" + +#include "pc9801_02.h" + +DEFINE_DEVICE_TYPE(PC9801_02_128KB, pc9801_02_128kb_device, "pc9801_02_128kb", "NEC PC-9801-02 conventional RAM") + +pc9801_02_128kb_device::pc9801_02_128kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_02_128KB, tag, owner, clock) + , m_bus(*this, DEVICE_SELF_OWNER) +{ +} + +void pc9801_02_128kb_device::device_start() +{ + m_ram.resize((128*1024) / 2); +} + +void pc9801_02_128kb_device::device_reset() +{ + m_bus->program_space().install_ram(0x000000, 0x01ffff, &m_ram[0]); +} + +DEFINE_DEVICE_TYPE(PC9801_02_256KB, pc9801_02_256kb_device, "pc9801_02_256kb", "NEC PC-9801-41 conventional RAM") + +pc9801_02_256kb_device::pc9801_02_256kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_02_256KB, tag, owner, clock) + , m_bus(*this, DEVICE_SELF_OWNER) +{ +} + +void pc9801_02_256kb_device::device_start() +{ + m_ram.resize((256*1024) / 2); +} + +void pc9801_02_256kb_device::device_reset() +{ + m_bus->program_space().install_ram(0x000000, 0x03ffff, &m_ram[0]); +} + +DEFINE_DEVICE_TYPE(PC9801_02_384KB, pc9801_02_384kb_device, "pc9801_02_384kb", "NEC PC-9801-02 x 1 + PC-9801-41 x 1 conventional RAMs") + +pc9801_02_384kb_device::pc9801_02_384kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_02_384KB, tag, owner, clock) + , m_bus(*this, DEVICE_SELF_OWNER) +{ +} + +void pc9801_02_384kb_device::device_start() +{ + m_ram.resize((384*1024) / 2); +} + +void pc9801_02_384kb_device::device_reset() +{ + m_bus->program_space().install_ram(0x000000, 0x05ffff, &m_ram[0]); +} + +DEFINE_DEVICE_TYPE(PC9801_02_512KB, pc9801_02_512kb_device, "pc9801_02_512kb", "NEC PC-9801-41 x 2 conventional RAMs") + +pc9801_02_512kb_device::pc9801_02_512kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_02_512KB, tag, owner, clock) + , m_bus(*this, DEVICE_SELF_OWNER) +{ +} + +void pc9801_02_512kb_device::device_start() +{ + m_ram.resize((512*1024) / 2); +} + +void pc9801_02_512kb_device::device_reset() +{ + m_bus->program_space().install_ram(0x000000, 0x07ffff, &m_ram[0]); +} + +DEFINE_DEVICE_TYPE(PC9801_02_640KB, pc9801_02_640kb_device, "pc9801_02_640kb", "NEC PC-9801-41 x 2 + PC-9801-02 x 1 conventional RAMs") + +pc9801_02_640kb_device::pc9801_02_640kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : device_t(mconfig, PC9801_02_640KB, tag, owner, clock) + , m_bus(*this, DEVICE_SELF_OWNER) +{ +} + +void pc9801_02_640kb_device::device_start() +{ + m_ram.resize((640*1024) / 2); +} + +void pc9801_02_640kb_device::device_reset() +{ + m_bus->program_space().install_ram(0x000000, 0x09ffff, &m_ram[0]); +} + diff --git a/src/devices/bus/pc98_cbus/pc9801_02.h b/src/devices/bus/pc98_cbus/pc9801_02.h new file mode 100644 index 00000000000..66330527efd --- /dev/null +++ b/src/devices/bus/pc98_cbus/pc9801_02.h @@ -0,0 +1,95 @@ +// license:BSD-3-Clause +// copyright-holders:Angelo Salese + +#ifndef MAME_BUS_PC98_CBUS_PC9801_02_H +#define MAME_BUS_PC98_CBUS_PC9801_02_H + +#pragma once + +#include "slot.h" + +class pc9801_02_128kb_device : public device_t +{ +public: + pc9801_02_128kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + +private: + required_device<pc98_cbus_slot_device> m_bus; + + std::vector<u16> m_ram; +}; + +class pc9801_02_256kb_device : public device_t +{ +public: + pc9801_02_256kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + +private: + required_device<pc98_cbus_slot_device> m_bus; + + std::vector<u16> m_ram; +}; + +class pc9801_02_384kb_device : public device_t +{ +public: + pc9801_02_384kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + +private: + required_device<pc98_cbus_slot_device> m_bus; + + std::vector<u16> m_ram; +}; + +class pc9801_02_512kb_device : public device_t +{ +public: + pc9801_02_512kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + +private: + required_device<pc98_cbus_slot_device> m_bus; + + std::vector<u16> m_ram; +}; + +class pc9801_02_640kb_device : public device_t +{ +public: + pc9801_02_640kb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + +private: + required_device<pc98_cbus_slot_device> m_bus; + + std::vector<u16> m_ram; +}; + + +// device type definition +DECLARE_DEVICE_TYPE(PC9801_02_128KB, pc9801_02_128kb_device) +DECLARE_DEVICE_TYPE(PC9801_02_256KB, pc9801_02_256kb_device) +DECLARE_DEVICE_TYPE(PC9801_02_384KB, pc9801_02_384kb_device) +DECLARE_DEVICE_TYPE(PC9801_02_512KB, pc9801_02_512kb_device) +DECLARE_DEVICE_TYPE(PC9801_02_640KB, pc9801_02_640kb_device) + + +#endif // MAME_BUS_PC98_CBUS_PC9801_02_H diff --git a/src/devices/bus/pc98_cbus/pc9801_14.cpp b/src/devices/bus/pc98_cbus/pc9801_14.cpp index ccb788a3a78..528787fd260 100644 --- a/src/devices/bus/pc98_cbus/pc9801_14.cpp +++ b/src/devices/bus/pc98_cbus/pc9801_14.cpp @@ -26,7 +26,6 @@ TODO: #include "emu.h" #include "pc9801_14.h" - #include "speaker.h" diff --git a/src/devices/bus/pc98_cbus/pc9801_26.cpp b/src/devices/bus/pc98_cbus/pc9801_26.cpp index f126158fbf9..2407bf3ffa7 100644 --- a/src/devices/bus/pc98_cbus/pc9801_26.cpp +++ b/src/devices/bus/pc98_cbus/pc9801_26.cpp @@ -2,14 +2,19 @@ // copyright-holders:Angelo Salese /************************************************************************************************** -NEC PC-9801-26 sound card +NEC PC-9801-26(K) sound card Legacy sound card for PC-98xx family, composed by a single YM2203 +NOTES: +- The only known difference between -26 and -26K is that former draws its clock from C-Bus root. + This makes the card to misbehave with 286+ machines. + TODO: - DE-9 output writes (cfr. page 419 of PC-9801 Bible, needs software testing the functionality) - understand if dips can be read by SW; - configurable irq level needs a binding flush in C-bus handling; +- Eventually emulate -26 clock style, currently hardwired as -26K; **************************************************************************************************/ diff --git a/src/devices/bus/pc98_cbus/slot.cpp b/src/devices/bus/pc98_cbus/slot.cpp index 0b98e4bf51f..e61c4dac99d 100644 --- a/src/devices/bus/pc98_cbus/slot.cpp +++ b/src/devices/bus/pc98_cbus/slot.cpp @@ -28,12 +28,37 @@ TODO: #include "slot.h" +DEFINE_DEVICE_TYPE(PC98_CBUS_ROOT, pc98_cbus_root_device, "pc98_cbus_root", "PC-98 C-Bus root") +DEFINE_DEVICE_TYPE(PC98_CBUS_SLOT, pc98_cbus_slot_device, "pc98_cbus_slot", "PC-98 C-Bus slot") + //************************************************************************** -// GLOBAL VARIABLES +// DEVICE PC9801 ROOT INTERFACE //************************************************************************** -DEFINE_DEVICE_TYPE(PC98_CBUS_SLOT, pc98_cbus_slot_device, "pc98_cbus_slot", "PC-98 C-Bus slot") +pc98_cbus_root_device::pc98_cbus_root_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : device_t(mconfig, PC98_CBUS_ROOT, tag, owner, clock) + , device_memory_interface(mconfig, *this) + , m_space_mem_config("mem_space", ENDIANNESS_LITTLE, 16, 24, 0, address_map_constructor()) + , m_space_io_config("io_space", ENDIANNESS_LITTLE, 16, 16, 0, address_map_constructor()) +{ +} + +device_memory_interface::space_config_vector pc98_cbus_root_device::memory_space_config() const +{ + return space_config_vector{ + std::make_pair(AS_PROGRAM, &m_space_mem_config), + std::make_pair(AS_IO, &m_space_io_config) + }; +} + +void pc98_cbus_root_device::device_start() +{ +} +void pc98_cbus_root_device::device_config_complete() +{ + // ... +} //************************************************************************** @@ -75,9 +100,9 @@ pc98_cbus_slot_device::pc98_cbus_slot_device(const machine_config &mconfig, cons , m_memspace(*this, finder_base::DUMMY_TAG, -1) , m_iospace(*this, finder_base::DUMMY_TAG, -1) , m_int_cb(*this) -// , m_drq_cb(*this) -// , m_dma_in_cb(*this, 0) -// , m_dma_out_cb(*this) +// , m_drq_cb(*this) +// , m_dma_in_cb(*this, 0) +// , m_dma_out_cb(*this) { } @@ -103,27 +128,3 @@ void pc98_cbus_slot_device::device_start() // m_card = dynamic_cast<device_pc9801_slot_card_interface *>(get_card_device()); } -template<typename R, typename W> void pc98_cbus_slot_device::install_io(offs_t start, offs_t end, R rhandler, W whandler) -{ - int buswidth = m_iospace->data_width(); - switch(buswidth) - { - case 8: - m_iospace->install_readwrite_handler(start, end, rhandler, whandler, 0); - break; - case 16: - m_iospace->install_readwrite_handler(start, end, rhandler, whandler, 0xffff); - break; - case 32: - m_iospace->install_readwrite_handler(start, end, rhandler, whandler, 0xffffffff); - break; - default: - fatalerror("PC-9801 C-bus: Bus width %d not supported\n", buswidth); - } -} - -template void pc98_cbus_slot_device::install_io<read8_delegate, write8_delegate >(offs_t start, offs_t end, read8_delegate rhandler, write8_delegate whandler); -template void pc98_cbus_slot_device::install_io<read8s_delegate, write8s_delegate >(offs_t start, offs_t end, read8s_delegate rhandler, write8s_delegate whandler); -template void pc98_cbus_slot_device::install_io<read8sm_delegate, write8sm_delegate >(offs_t start, offs_t end, read8sm_delegate rhandler, write8sm_delegate whandler); -template void pc98_cbus_slot_device::install_io<read8smo_delegate, write8smo_delegate>(offs_t start, offs_t end, read8smo_delegate rhandler, write8smo_delegate whandler); - diff --git a/src/devices/bus/pc98_cbus/slot.h b/src/devices/bus/pc98_cbus/slot.h index 5a5f375fa18..f64da607756 100644 --- a/src/devices/bus/pc98_cbus/slot.h +++ b/src/devices/bus/pc98_cbus/slot.h @@ -69,7 +69,21 @@ //************************************************************************** +class pc98_cbus_root_device : public device_t, + public device_memory_interface +{ +public: + pc98_cbus_root_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + +protected: + virtual space_config_vector memory_space_config() const override; + virtual void device_start() override ATTR_COLD; + virtual void device_config_complete() override ATTR_COLD; +private: + address_space_config m_space_mem_config; + address_space_config m_space_io_config; +}; //class pc98_cbus_slot_device; @@ -107,16 +121,15 @@ public: // configuration access template<std::size_t Line> auto int_cb() { return m_int_cb[Line].bind(); } -// template<std::size_t Line> auto drq_cb() { return m_drq_cb[Line].bind(); } -// template<std::size_t Line> auto dma_r() { return m_dma_in_cb[Line].bind(); } -// template<std::size_t Line> auto dma_w() { return m_dma_out_cb[Line].bind(); } +// template<std::size_t Line> auto drq_cb() { return m_drq_cb[Line].bind(); } +// template<std::size_t Line> auto dma_r() { return m_dma_in_cb[Line].bind(); } +// template<std::size_t Line> auto dma_w() { return m_dma_out_cb[Line].bind(); } address_space &program_space() const { return *m_memspace; } address_space &io_space() const { return *m_iospace; } template<int I> void int_w(int state) { m_int_cb[I](state); } -// template<int I> void drq_w(int state) { m_drq_cb[I](state); } +// template<int I> void drq_w(int state) { m_drq_cb[I](state); } - template<typename R, typename W> void install_io(offs_t start, offs_t end, R rhandler, W whandler); template<typename T> void install_device(offs_t addrstart, offs_t addrend, T &device, void (T::*map)(class address_map &map), uint64_t unitmask = ~u64(0)) { m_iospace->install_device(addrstart, addrend, device, map, unitmask); @@ -132,11 +145,11 @@ private: required_address_space m_memspace; required_address_space m_iospace; devcb_write_line::array<7> m_int_cb; -// devcb_write_line::array<4> m_drq_cb; +// devcb_write_line::array<4> m_drq_cb; }; -// device type definition +DECLARE_DEVICE_TYPE(PC98_CBUS_ROOT, pc98_cbus_root_device) DECLARE_DEVICE_TYPE(PC98_CBUS_SLOT, pc98_cbus_slot_device) #endif // MAME_BUS_PC98_CBUS_SLOT_H diff --git a/src/devices/machine/ram.h b/src/devices/machine/ram.h index da6127d904d..0d778ae0a45 100644 --- a/src/devices/machine/ram.h +++ b/src/devices/machine/ram.h @@ -50,9 +50,6 @@ public: u8 read(offs_t offset) { return m_pointer[offset % m_size]; } void write(offs_t offset, u8 data) { m_pointer[offset % m_size] = data; } - u8 read_no_mirror(offs_t offset) { if (offset < m_size) {return m_pointer[offset]; } return 0xff; } - void write_no_mirror(offs_t offset, u8 data) { if (offset < m_size) { m_pointer[offset] = data; } } - // inline configuration helpers ram_device &set_default_size(char const *default_size) { m_default_size = default_size; return *this; } ram_device &set_extra_options(char const *extra_options) diff --git a/src/mame/nec/pc9801.cpp b/src/mame/nec/pc9801.cpp index c10861ede0d..664ee0c57df 100644 --- a/src/mame/nec/pc9801.cpp +++ b/src/mame/nec/pc9801.cpp @@ -57,6 +57,11 @@ TODO (pc9801ux): #include "emu.h" #include "pc9801.h" +#include "bus/pc98_54simm/options.h" +#include "bus/pc98_54simm/slot.h" +#include "bus/pc98_61simm/options.h" +#include "bus/pc98_61simm/slot.h" + #include "bus/pc98_cbus/amd98.h" #include "bus/pc98_cbus/options.h" #include "machine/input_merger.h" @@ -316,7 +321,7 @@ void pc9801_state::sasi_ctrl_w(uint8_t data) void pc9801_state::pc9801_map(address_map &map) { - map(0x00000, 0x9ffff).rw(m_ram, FUNC(ram_device::read_no_mirror), FUNC(ram_device::write_no_mirror)); +// map(0x00000, 0x9ffff).rw("cbus_ram", FUNC(ram_device::read_no_mirror), FUNC(ram_device::write_no_mirror)); map(0xa0000, 0xa3fff).rw(FUNC(pc9801_state::tvram_r), FUNC(pc9801_state::tvram_w)); //TVRAM map(0xa8000, 0xbffff).rw(FUNC(pc9801_state::gvram_r), FUNC(pc9801_state::gvram_w)); //bitmap VRAM // map(0xcc000, 0xcffff).rom().region("sound_bios", 0); //sound BIOS @@ -866,7 +871,7 @@ void pc9801_state::ipl_bank(address_map &map) void pc9801vm_state::pc9801vm_map(address_map &map) { - map(0x000000, 0x09ffff).rw(m_ram, FUNC(ram_device::read_no_mirror), FUNC(ram_device::write_no_mirror)); +// map(0x000000, 0x09ffff).rw(m_ram, FUNC(ram_device::read_no_mirror), FUNC(ram_device::write_no_mirror)); map(0x0a0000, 0x0a3fff).rw(FUNC(pc9801vm_state::tvram_r), FUNC(pc9801vm_state::tvram_w)); map(0x0a4000, 0x0a4fff).rw(FUNC(pc9801vm_state::pc9801rs_knjram_r), FUNC(pc9801vm_state::pc9801rs_knjram_w)); @@ -904,27 +909,33 @@ void pc9801vm_state::pc9801vm_io(address_map &map) void pc9801vm_state::pc9801ux_map(address_map &map) { pc9801vm_map(map); - map(0x100000, 0x7fffff).rw(FUNC(pc9801vm_state::ram_ext_r), FUNC(pc9801vm_state::ram_ext_w)); + map(0x000000, 0x09ffff).rw("simm", FUNC(pc9801_54_simm_device::read), FUNC(pc9801_54_simm_device::write)); + map(0x100000, 0x7fffff).rw("simm", FUNC(pc9801_54_simm_device::read_ext), FUNC(pc9801_54_simm_device::write_ext)); +// map(0xee8000, 0xefffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); +// map(0xfe8000, 0xffffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); } void pc9801vm_state::pc9801vx_map(address_map &map) { pc9801vm_map(map); - map(0x100000, 0x8fffff).rw(FUNC(pc9801vm_state::ram_ext_r), FUNC(pc9801vm_state::ram_ext_w)); + map(0x000000, 0x09ffff).rw("simm", FUNC(pc9801_54_simm_device::read), FUNC(pc9801_54_simm_device::write)); + map(0x100000, 0x8fffff).rw("simm", FUNC(pc9801_54_simm_device::read_ext), FUNC(pc9801_54_simm_device::write_ext)); } void pc9801vm_state::pc9801dx_map(address_map &map) { pc9801vm_map(map); - map(0x100000, 0xefffff).rw(FUNC(pc9801vm_state::ram_ext_r), FUNC(pc9801vm_state::ram_ext_w)); + map(0x000000, 0x09ffff).rw("simm", FUNC(pc9801_54_simm_device::read), FUNC(pc9801_54_simm_device::write)); + map(0x100000, 0xefffff).rw("simm", FUNC(pc9801_54_simm_device::read_ext), FUNC(pc9801_54_simm_device::write_ext)); } void pc9801vm_state::pc9801rs_map(address_map &map) { pc9801vm_map(map); + map(0x000000, 0x09ffff).rw("simm", FUNC(pc9801_54_simm_device::read), FUNC(pc9801_54_simm_device::write)); // map(0x0d8000, 0x0d9fff).rom().region("ide",0); map(0x0da000, 0x0dbfff).ram(); // ide ram - map(0x100000, 0xefffff).rw(FUNC(pc9801vm_state::ram_ext_r), FUNC(pc9801vm_state::ram_ext_w)); + map(0x100000, 0xefffff).rw("simm", FUNC(pc9801_54_simm_device::read_ext), FUNC(pc9801_54_simm_device::write_ext)); map(0xee8000, 0xefffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); map(0xfe8000, 0xffffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); } @@ -967,7 +978,11 @@ void pc9801us_state::pc9801us_io(address_map &map) void pc9801bx_state::pc9801bx2_map(address_map &map) { - pc9801rs_map(map); + pc9801vm_map(map); + map(0x000000, 0x09ffff).rw("simm", FUNC(pc9801_61_simm_device::read), FUNC(pc9801_61_simm_device::write)); + + map(0x0da000, 0x0dbfff).ram(); // ide ram + // map(0x000a0000, 0x000a3fff).rw(FUNC(pc9801_state::tvram_r), FUNC(pc9801_state::tvram_w)); // map(0x000a4000, 0x000a4fff).rw(FUNC(pc9801_state::pc9801rs_knjram_r), FUNC(pc9801_state::pc9801rs_knjram_w)); // map(0x000a8000, 0x000bffff).rw(FUNC(pc9821_state::pc9821_grcg_gvram_r), FUNC(pc9821_state::pc9821_grcg_gvram_w)); @@ -976,13 +991,14 @@ void pc9801bx_state::pc9801bx2_map(address_map &map) // map(0x000da000, 0x000dbfff).ram(); // ide ram (declared in RS) // map(0x000e0000, 0x000e7fff).rw(FUNC(pc9821_state::pc9821_grcg_gvram0_r), FUNC(pc9821_state::pc9821_grcg_gvram0_w)); map(0x000e8000, 0x000fffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); - map(0x00100000, 0x00efffff).rw(FUNC(pc9801bx_state::ram_ext_r), FUNC(pc9801bx_state::ram_ext_w)); - map(0x01000000, 0x013fffff).rw(FUNC(pc9801bx_state::ram_ext_16m_r), FUNC(pc9801bx_state::ram_ext_16m_w)); + map(0x00100000, 0x00efffff).rw("simm", FUNC(pc9801_61_simm_device::read_ext), FUNC(pc9801_61_simm_device::write_ext)); + map(0x00f00000, 0x00ffffff).view(m_hole_15M_view); + m_hole_15M_view[0](0x00f00000, 0x00ffffff).rw("simm", FUNC(pc9801_61_simm_device::read_15m_ext), FUNC(pc9801_61_simm_device::write_15m_ext)); + + map(0x01000000, 0x013fffff).rw("simm", FUNC(pc9801_61_simm_device::read_16m_ext), FUNC(pc9801_61_simm_device::write_16m_ext)); map(0xffee8000, 0xffefffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); map(0xfffe8000, 0xffffffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); - map(0x00f00000, 0x00ffffff).view(m_hole_15M_view); - m_hole_15M_view[0](0x00f00000, 0x00ffffff).rw(FUNC(pc9801bx_state::ram_ext_15m_r), FUNC(pc9801bx_state::ram_ext_15m_w)); } u8 pc9801bx_state::i486_cpu_mode_r(offs_t offset) @@ -1802,7 +1818,7 @@ MACHINE_START_MEMBER(pc9801vm_state,pc9801rs) save_item(NAME(m_egc.mask)); save_item(STRUCT_MEMBER(m_grcg, mode)); - // save_pointer(STRUCT_MEMBER(m_grcg, tile), 4); + // save_pointer(STRUCT_MEMBER(m_grcg, tile), 4); save_item(STRUCT_MEMBER(m_grcg, tile_index)); save_item(NAME(m_vram_bank)); @@ -2007,7 +2023,7 @@ void pc9801_state::pc9801_mouse(machine_config &config) void pc9801_state::pc9801_cbus(machine_config &config) { -// PC98_CBUS_ROOT(config, "cbus", 0); +// PC98_CBUS_ROOT(config, "cbus", 0); PC98_CBUS_SLOT(config, m_cbus[0], pc98_cbus_devices, "pc9801_26"); m_cbus[0]->set_memspace(m_maincpu, AS_PROGRAM); @@ -2019,9 +2035,9 @@ void pc9801_state::pc9801_cbus(machine_config &config) m_cbus[0]->int_cb<4>().set("pic8259_slave", FUNC(pic8259_device::ir2_w)); m_cbus[0]->int_cb<5>().set("ir12", FUNC(input_merger_device::in_w<0>)); m_cbus[0]->int_cb<6>().set("ir13", FUNC(input_merger_device::in_w<0>)); -// m_cbus[0]->drq_cb<0>().set(m_dmac, FUNC(am9517a_device::dreq0_w)).invert(); -// m_dmac->in_ior_callback<0>().set([] () { printf("read\n"); return 0xff; }); -// m_dmac->out_iow_callback<0>().set([] (u8 data) { printf("write %02x\n", data); }); +// m_cbus[0]->drq_cb<0>().set(m_dmac, FUNC(am9517a_device::dreq0_w)).invert(); +// m_dmac->in_ior_callback<0>().set([] () { printf("read\n"); return 0xff; }); +// m_dmac->out_iow_callback<0>().set([] (u8 data) { printf("write %02x\n", data); }); PC98_CBUS_SLOT(config, m_cbus[1], pc98_cbus_devices, nullptr); m_cbus[1]->set_memspace(m_maincpu, AS_PROGRAM); @@ -2202,7 +2218,10 @@ void pc9801_state::pc9801(machine_config &config) MCFG_MACHINE_RESET_OVERRIDE(pc9801_state, pc9801f) // RAM 128KB (vanilla/F1/F2) ~ 256KB (F3/M2/M3) ~ 640KB (max) - RAM(config, m_ram).set_default_size("640K").set_extra_options("128K,256K,384K,512K"); + pc98_cbus_slot_device &ram_slot(PC98_CBUS_SLOT(config, "cbus_ram", pc98_cbus_ram_devices, "640kb")); + ram_slot.set_memspace(m_maincpu, AS_PROGRAM); + ram_slot.set_iospace(m_maincpu, AS_IO); +// RAM(config, m_ram).set_default_size("640K").set_extra_options("128K,256K,384K,512K"); UPD765A(config, m_fdc_2dd, 8'000'000, false, true); m_fdc_2dd->intrq_wr_callback().set(FUNC(pc9801_state::fdc_2dd_irq)); @@ -2238,7 +2257,10 @@ void pc9801vm_state::pc9801vm(machine_config &config) ADDRESS_MAP_BANK(config, m_ipl).set_map(&pc9801vm_state::ipl_bank).set_options(ENDIANNESS_LITTLE, 16, 18, 0x18000); // RAM 384KB (VM0/VM2/VM4) ~ 640KB (VM21/VM11) - RAM(config, m_ram).set_default_size("640K").set_extra_options("384K"); + pc98_cbus_slot_device &ram_slot(PC98_CBUS_SLOT(config, "cbus_ram", pc98_cbus_ram_devices, "640kb")); + ram_slot.set_memspace(m_maincpu, AS_PROGRAM); + ram_slot.set_iospace(m_maincpu, AS_IO); +// RAM(config, m_ram).set_default_size("640K").set_extra_options("384K"); MCFG_MACHINE_START_OVERRIDE(pc9801vm_state, pc9801rs) MCFG_MACHINE_RESET_OVERRIDE(pc9801vm_state, pc9801_common) @@ -2270,7 +2292,7 @@ void pc9801vm_state::pc9801uv(machine_config &config) config_floppy_35hd(config); // RAM 384KB (UV2) ~ 640KB (UV21/ UV11) - m_ram->set_default_size("640K").set_extra_options("384K"); +// m_ram->set_default_size("640K").set_extra_options("384K"); } void pc9801vm_state::pc9801ux(machine_config &config) @@ -2285,57 +2307,64 @@ void pc9801vm_state::pc9801ux(machine_config &config) config_floppy_35hd(config); // AM9157A(config, "i8237", 10000000); // unknown clock + MCFG_MACHINE_START_OVERRIDE(pc9801vm_state, pc9801rs) + MCFG_MACHINE_RESET_OVERRIDE(pc9801vm_state, pc9801rs) + // RAM 640 KB ~ 6.6MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,7M"); + config.device_remove("cbus_ram"); + PC9801_54_SIMM(config, "simm", pc9801ux_simm_options, "2mb"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("640K,4M,7M"); // 20MB SASI HDD (UV41 only) } -void pc9801vm_state::pc9801dx(machine_config &config) +void pc9801vm_state::pc9801vx(machine_config &config) { pc9801vm(config); - i80286_cpu_device &maincpu(I80286(config.replace(), m_maincpu, 12000000)); - maincpu.set_addrmap(AS_PROGRAM, &pc9801vm_state::pc9801dx_map); + i80286_cpu_device &maincpu(I80286(config.replace(), m_maincpu, 10000000)); + maincpu.set_addrmap(AS_PROGRAM, &pc9801vm_state::pc9801vx_map); maincpu.set_addrmap(AS_IO, &pc9801vm_state::pc9801vm_io); maincpu.set_a20_callback(FUNC(pc9801vm_state::a20_286)); maincpu.set_irq_acknowledge_callback("pic8259_master", FUNC(pic8259_device::inta_cb)); config_floppy_525hd(config); -// AM9157A(config, "i8237", 10000000); // unknown clock + // TODO: EGC initial buggy revision + // Reportedly has a bug with a RMW op, details TBD + // ... MCFG_MACHINE_START_OVERRIDE(pc9801vm_state, pc9801rs) MCFG_MACHINE_RESET_OVERRIDE(pc9801vm_state, pc9801rs) - // RAM 640KB ~ 14.6MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,8M,14M,15M"); + // RAM 640 KB ~ 8.6MB + config.device_remove("cbus_ram"); + PC9801_54_SIMM(config, "simm", pc9801vx_simm_options, "2mb"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("640K,4M,7M,8M,9M"); + + // GDC & EGC, DAC1BIT built-in + // Either 2x 5.25 or 2x 3.5 internal floppy drives + // 4x C-Bus slots (3x plus 1x dedicated RAM?) } -void pc9801vm_state::pc9801vx(machine_config &config) +void pc9801vm_state::pc9801dx(machine_config &config) { pc9801vm(config); - i80286_cpu_device &maincpu(I80286(config.replace(), m_maincpu, 10000000)); - maincpu.set_addrmap(AS_PROGRAM, &pc9801vm_state::pc9801vx_map); + i80286_cpu_device &maincpu(I80286(config.replace(), m_maincpu, 12000000)); + maincpu.set_addrmap(AS_PROGRAM, &pc9801vm_state::pc9801dx_map); maincpu.set_addrmap(AS_IO, &pc9801vm_state::pc9801vm_io); maincpu.set_a20_callback(FUNC(pc9801vm_state::a20_286)); maincpu.set_irq_acknowledge_callback("pic8259_master", FUNC(pic8259_device::inta_cb)); config_floppy_525hd(config); +// AM9157A(config, "i8237", 10000000); // unknown clock - // TODO: EGC initial buggy revision - // Reportedly has a bug with a RMW op, details TBD - // ... MCFG_MACHINE_START_OVERRIDE(pc9801vm_state, pc9801rs) MCFG_MACHINE_RESET_OVERRIDE(pc9801vm_state, pc9801rs) - // RAM 640 KB ~ 8.6MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,7M,8M,9M"); - - // GDC & EGC, DAC1BIT built-in - // Either 2x 5.25 or 2x 3.5 internal floppy drives - // 4x C-Bus slots (3x plus 1x dedicated RAM?) + // RAM 640KB ~ 14.6MB + config.device_remove("cbus_ram"); + PC9801_54_SIMM(config, "simm", pc9801dx_simm_options, "2mb"); } void pc9801vm_state::pc9801rs(machine_config &config) @@ -2352,8 +2381,9 @@ void pc9801vm_state::pc9801rs(machine_config &config) pc9801_ide(config); // RAM 640KB ~ 14.6MB (with dedicated memory slot) - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,8M,14M,15M"); + config.device_remove("cbus_ram"); + PC9801_54_SIMM(config, "simm", pc9801dx_simm_options, "2mb"); +// RAM(config, m_ram).set_default_size("2M").set_extra_options("640K,4M,8M,14M,15M"); } void pc9801us_state::pc9801us(machine_config &config) @@ -2375,8 +2405,8 @@ void pc9801us_state::pc9801us(machine_config &config) PC98_SDIP(config, "sdip", 0); // RAM 640KB ~ 14.6MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,8M,14M,15M"); + // m_ram->set_default_size("2M"); + // m_ram->set_extra_options("640K,4M,8M,14M,15M"); } void pc9801us_state::pc9801fs(machine_config &config) @@ -2401,8 +2431,8 @@ void pc9801us_state::pc9801fs(machine_config &config) PC98_SDIP(config, "sdip", 0); // RAM 640KB ~ 14.6MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,8M,14M,15M"); + // m_ram->set_default_size("2M"); + // m_ram->set_extra_options("640K,4M,8M,14M,15M"); } void pc9801bx_state::pc9801bx2(machine_config &config) @@ -2422,8 +2452,10 @@ void pc9801bx_state::pc9801bx2(machine_config &config) PC98_SDIP(config, "sdip", 0); // RAM 1.8 MB (U2/M2) / 3.6 MB (U7) ~ 19.6 MB (from EMS?) - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,7M,8M,14M,20M"); + config.device_remove("simm"); + PC9801_61_SIMM(config, "simm", pc9801bx2_simm_options, "2mb"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("640K,4M,7M,8M,14M,20M"); // GDC & EGC, DAC1BIT built-in // 2x 3.5/5.25 internal floppy drives or 1x 3.5 and 120MB IDE HDD diff --git a/src/mame/nec/pc9801.h b/src/mame/nec/pc9801.h index 00259a94820..0700f422f15 100644 --- a/src/mame/nec/pc9801.h +++ b/src/mame/nec/pc9801.h @@ -27,7 +27,6 @@ #include "machine/output_latch.h" #include "machine/pic8259.h" #include "machine/pit8253.h" -#include "machine/ram.h" #include "machine/timer.h" #include "machine/upd1990a.h" #include "machine/upd4991a.h" @@ -143,7 +142,6 @@ public: , m_ppi_mouse(*this, "ppi_mouse") , m_fdc_2hd(*this, "fdc_2hd") , m_fdc_2dd(*this, "fdc_2dd") - , m_ram(*this, RAM_TAG) , m_hgdc(*this, "hgdc%d", 1) , m_video_ram(*this, "video_ram_%d", 1) , m_cbus(*this, "cbus%d", 0) @@ -174,7 +172,6 @@ protected: // (I/O $90-$93 is a "simplified" version) required_device<upd765a_device> m_fdc_2hd; optional_device<upd765a_device> m_fdc_2dd; - optional_device<ram_device> m_ram; required_device_array<upd7220_device, 2> m_hgdc; required_shared_ptr_array<uint16_t, 2> m_video_ram; required_device_array<pc98_cbus_slot_device, 2> m_cbus; @@ -395,9 +392,6 @@ public: protected: TIMER_CALLBACK_MEMBER(fdc_trigger); - u8 ram_ext_r(offs_t offset) { return m_ram->read_no_mirror(offset + 0x100000); } - void ram_ext_w(offs_t offset, u8 data) { return m_ram->write_no_mirror(offset + 0x100000, data); } - void pc9801vm_map(address_map &map) ATTR_COLD; void pc9801vm_io(address_map &map) ATTR_COLD; @@ -582,11 +576,6 @@ protected: DECLARE_MACHINE_START(pc9801bx2); DECLARE_MACHINE_RESET(pc9801bx2); - u8 ram_ext_15m_r(offs_t offset) { return m_ram->read_no_mirror(offset + 0xf00000); } - void ram_ext_15m_w(offs_t offset, u8 data) { return m_ram->write_no_mirror(offset + 0xf00000, data); } - u8 ram_ext_16m_r(offs_t offset) { return m_ram->read_no_mirror(offset + 0x1000000); } - void ram_ext_16m_w(offs_t offset, u8 data) { return m_ram->write_no_mirror(offset + 0x1000000, data); } - virtual void hole_15m_control_w(offs_t offset, u8 data); u8 hole_15m_control_r(offs_t offset); diff --git a/src/mame/nec/pc9801_epson.cpp b/src/mame/nec/pc9801_epson.cpp index 87549fdb17b..dcf511555ec 100644 --- a/src/mame/nec/pc9801_epson.cpp +++ b/src/mame/nec/pc9801_epson.cpp @@ -48,6 +48,11 @@ Notes: #include "emu.h" #include "pc9801_epson.h" +#include "bus/pc98_54simm/options.h" +#include "bus/pc98_54simm/slot.h" +#include "bus/pc98_61simm/options.h" +#include "bus/pc98_61simm/slot.h" + template <unsigned which> void pc98_epson_state::shadow_ipl_w(offs_t offset, u16 data, u16 mem_mask) { // TODO: shadow register 0x6a may actually be write deprotect @@ -143,9 +148,9 @@ void pc98_epson_state::pc286vs_map(address_map &map) { pc9801ux_map(map); map(0x0e8000, 0x0fffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); - map(0x100000, 0xefffff).rw(FUNC(pc98_epson_state::ram_ext_r), FUNC(pc98_epson_state::ram_ext_w)); +// map(0x100000, 0xefffff).rw(FUNC(pc98_epson_state::ram_ext_r), FUNC(pc98_epson_state::ram_ext_w)); // would hang the machine with following and 15M -// map(0xee8000, 0xefffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); +// map(0xee8000, 0xefffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); map(0xfe8000, 0xffffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); } @@ -355,8 +360,8 @@ void pc98_epson_state::pc286vs(machine_config &config) config_base_epson(config); // RAM 640KB ~ 14.6MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,8M,14M,15M"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("640K,4M,8M,14M,15M"); // TODO: DMA type & clock } @@ -371,9 +376,9 @@ void pc98_epson_state::pc286u(machine_config &config) m_maincpu->set_irq_acknowledge_callback("pic8259_master", FUNC(pic8259_device::inta_cb)); // RAM 640KB ~ 8.6MB - m_ram->set_default_size("640K"); +// m_ram->set_default_size("640K"); // TODO: how? - m_ram->set_extra_options("4M,8M,9M"); +// m_ram->set_extra_options("4M,8M,9M"); // TODO: DMA type & clock } @@ -390,8 +395,8 @@ void pc98_epson_state::pc386m(machine_config &config) config_base_epson(config); // RAM: 640KB ~ 14.6MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("640K,4M,8M,14M,15M"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("640K,4M,8M,14M,15M"); // 2 3.5 floppy drives // ... @@ -409,8 +414,8 @@ void pc98_epson_state::pc486se(machine_config &config) pit_clock_config(config, xtal/8); // unknown, passes "ERR:TM" test // RAM 1.6 MB ~ 17.6 MB - m_ram->set_default_size("2M"); - m_ram->set_extra_options("4M,8M,14M,16M,18M"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("4M,8M,14M,16M,18M"); // "dedicated internal memory slot x 1" // "dedicated video board" slot @@ -428,8 +433,8 @@ void pc98_epson_state::pc486mu(machine_config &config) pit_clock_config(config, xtal/8); // unknown, passes "ERR:TM" test // RAM: 5.6 MB ~ 61.6 MB - m_ram->set_default_size("6M"); - m_ram->set_extra_options("8M,14M,16M,32M,48M,62M"); +// m_ram->set_default_size("6M"); +// m_ram->set_extra_options("8M,14M,16M,32M,48M,62M"); // CL-GD5428 diff --git a/src/mame/nec/pc9821.cpp b/src/mame/nec/pc9821.cpp index be27c20ecba..b96b08c8a96 100644 --- a/src/mame/nec/pc9821.cpp +++ b/src/mame/nec/pc9821.cpp @@ -67,6 +67,8 @@ TODO: (pc9821nr15/pc9821nr166/pc9821nw150) #include "emu.h" #include "pc9821.h" +#include "bus/pc98_61simm/options.h" +#include "bus/pc98_61simm/slot.h" #include "machine/pci.h" // TODO: remove me, cfr. pc9801.cpp; verify that 9801 clocks are correct for 9821 series as well @@ -375,17 +377,17 @@ void pc9821_state::pegc_mmio_map(address_map &map) logerror("$e0100 packed mode %02x\n", data); }) ); - map(0x102, 0x102).lw8( - NAME([this] (u8 data) { - logerror("$e0102 upper VRAM %s (%02x)\n", BIT(data, 0) ? "enable" : "disable", data); - if (BIT(data, 0)) - { - m_pegc_vram_view.select(0); - } - else - m_pegc_vram_view.disable(); - }) - ); + map(0x102, 0x102).lw8( + NAME([this] (u8 data) { + logerror("$e0102 upper VRAM %s (%02x)\n", BIT(data, 0) ? "enable" : "disable", data); + if (BIT(data, 0)) + { + m_pegc_vram_view.select(0); + } + else + m_pegc_vram_view.disable(); + }) + ); // $4a0 alias map(0x104, 0x104).lw8( NAME([this] (u8 data) { @@ -455,14 +457,18 @@ TIMER_CALLBACK_MEMBER(pc9821_state::pit_delay) void pc9821_state::pc9821_map(address_map &map) { - pc9801rs_map(map); + pc9801vm_map(map); + map(0x00000000, 0x0009ffff).rw("simm", FUNC(pc9801_61_simm_device::read), FUNC(pc9801_61_simm_device::write)); + + map(0x000da000, 0x000dbfff).ram(); // ide ram + map(0x000a8000, 0x000bffff).rw(FUNC(pc9821_state::pc9821_grcg_gvram_r), FUNC(pc9821_state::pc9821_grcg_gvram_w)); map(0x000e0000, 0x000e7fff).rw(FUNC(pc9821_state::grcg_gvram0_r), FUNC(pc9821_state::grcg_gvram0_w)); map(0x000e0000, 0x000e7fff).view(m_pegc_mmio_view); m_pegc_mmio_view[0](0x000e0000, 0x000e7fff).m(*this, FUNC(pc9821_state::pegc_mmio_map)); map(0x000e8000, 0x000fffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); - map(0x00100000, 0x00efffff).rw(FUNC(pc9821_state::ram_ext_r), FUNC(pc9821_state::ram_ext_w)); + map(0x00100000, 0x00efffff).rw("simm", FUNC(pc9801_61_simm_device::read_ext), FUNC(pc9801_61_simm_device::write_ext)); map(0x00f00000, 0xffffffff).view(m_pegc_vram_view); m_pegc_vram_view[0](0x00f00000, 0x00f7ffff).ram().share("ext_gvram"); m_pegc_vram_view[0](0xfff00000, 0xfff7ffff).ram().share("ext_gvram"); @@ -470,7 +476,7 @@ void pc9821_state::pc9821_map(address_map &map) map(0xffee8000, 0xffefffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); map(0xfffe8000, 0xffffffff).m(m_ipl, FUNC(address_map_bank_device::amap16)); map(0x00f00000, 0x00ffffff).view(m_hole_15M_view); - m_hole_15M_view[0](0x00f00000, 0x00ffffff).rw(FUNC(pc9821_state::ram_ext_15m_r), FUNC(pc9821_state::ram_ext_15m_w)); + m_hole_15M_view[0](0x00f00000, 0x00ffffff).rw("simm", FUNC(pc9801_61_simm_device::read_15m_ext), FUNC(pc9801_61_simm_device::write_15m_ext)); } void pc9821_state::pc9821_io(address_map &map) @@ -648,7 +654,7 @@ void pc9821_mate_a_state::pc9821as_io(address_map &map) void pc9821_mate_a_state::pc9821ap2_map(address_map &map) { pc9821as_map(map); - map(0x01000000, 0x04ffffff).rw(FUNC(pc9821_mate_a_state::ram_ext_16m_r), FUNC(pc9821_mate_a_state::ram_ext_16m_w)); + map(0x01000000, 0x04ffffff).rw("simm", FUNC(pc9801_61_simm_device::read_16m_ext), FUNC(pc9801_61_simm_device::write_16m_ext)); } @@ -706,9 +712,8 @@ void pc9821_canbe_state::pc9821ce_map(address_map &map) map(0x000f8000, 0x000fffff).view(m_bios_view); m_bios_view[6](0x000f8000, 0x000fffff).rom().region("biosrom", 0x18000); - m_hole_15M_view[1](0x00f00000, 0x00ffffff).rw(FUNC(pc9821_canbe_state::ram_ext_15m_r), FUNC(pc9821_canbe_state::ram_ext_15m_w)); + m_hole_15M_view[1](0x00f00000, 0x00ffffff).rw("simm", FUNC(pc9801_61_simm_device::read_15m_ext), FUNC(pc9801_61_simm_device::write_15m_ext)); m_hole_15M_view[1](0x00f00000, 0x00f7ffff).ram().share("ext_gvram"); - } void pc9821_canbe_state::pc9821ce_io(address_map &map) @@ -926,8 +931,10 @@ void pc9821_state::pc9821(machine_config &config) PC98_SDIP(config, "sdip", 0); // RAM 1.6MB (S1) / 3.6 (S2) ~ 15M (with dedicated 10MB module) - m_ram->set_default_size("2M"); - m_ram->set_extra_options("4M,8M,14M,15M"); + config.device_remove("simm"); + PC9801_61_SIMM(config, "simm", pc9821_simm_options, "2mb"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("4M,8M,14M,15M"); } void pc9821_mate_a_state::pc9821as(machine_config &config) @@ -945,8 +952,10 @@ void pc9821_mate_a_state::pc9821as(machine_config &config) MCFG_MACHINE_START_OVERRIDE(pc9821_mate_a_state, pc9821ap2) MCFG_MACHINE_RESET_OVERRIDE(pc9821_mate_a_state, pc9821ap2) - m_ram->set_default_size("4M"); - m_ram->set_extra_options("8M,14M,15M"); + // RAM 3.6 MB ~ 14.6 MB + PC9801_61_SIMM(config.replace(), "simm", pc9821_simm_options, "4mb"); +// m_ram->set_default_size("4M"); +// m_ram->set_extra_options("8M,14M,15M"); } void pc9821_mate_a_state::pc9821ap2(machine_config &config) @@ -967,8 +976,9 @@ void pc9821_mate_a_state::pc9821ap2(machine_config &config) // DOS 5.0, Windows 3.1 // minimum RAM 3.6MB (U2) / 7.6MB (C9T) // maximum RAM 71.6MB / 73.6MB (U8W / C9W) - m_ram->set_default_size("4M"); - m_ram->set_extra_options("8M,14M,32M,64M,72M,74M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "4mb"); +// m_ram->set_default_size("4M"); +// m_ram->set_extra_options("8M,14M,32M,64M,72M,74M"); // 340MB HD // Expansion slot C-BUS4 (4) @@ -986,8 +996,9 @@ void pc9821_canbe_state::pc9821ce(machine_config &config) // 1.6MB ~ 14.6MB model S1 // 5.6MB ~ 14.6MB model S2 - m_ram->set_default_size("2M"); - m_ram->set_extra_options("6M,8M,14M,15M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821_simm_options, "2mb"); +// m_ram->set_default_size("2M"); +// m_ram->set_extra_options("6M,8M,14M,15M"); // pc9801-86 (built-in) m_cbus[0]->set_default_option("sound_pc9821ce"); @@ -1025,7 +1036,9 @@ void pc9821_canbe_state::pc9821cx3(machine_config &config) MCFG_MACHINE_RESET_OVERRIDE(pc9821_canbe_state, pc9821_canbe); // RAM 16MB ~ 128MB - RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); + // TODO: really regular SIMM over PCI + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "16mb"); +// RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); // VLSI Supercore594 (Wildcat) PCI 2.0 // GD5440 @@ -1060,7 +1073,8 @@ void pc9821_mate_x_state::pc9821xa16(machine_config &config) // Xa16/R specs // 16MB ~ 128MB F.P.DRAM - RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "16mb"); +// RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); // VLSI Supercore594 (PCI rev 2.0) // S3 manufactured Trident TGUI9680XGi with 2MB VRAM (on board PCI) @@ -1090,9 +1104,9 @@ void pc9821_mate_x_state::pc9821xv13(machine_config &config) m_maincpu->set_addrmap(AS_IO, &pc9821_mate_x_state::pc9821_io); m_maincpu->set_irq_acknowledge_callback("pic8259_master", FUNC(pic8259_device::inta_cb)); - // minimum RAM 16MB - // maximum RAM 128MB - RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); + // RAM 16MB ~ 128MB + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "16mb"); +// RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); // Xv13/R identical to Xa16/R specs with an extra C-Bus slot @@ -1111,7 +1125,8 @@ void pc9821_mate_r_state::pc9821ra20(machine_config &config) m_maincpu->set_irq_acknowledge_callback("pic8259_master", FUNC(pic8259_device::inta_cb)); // 16MB ~ 128MB F.P.DRAM for /N12 or 32MB ~ 256MB ECC compatible EDO DRAM for /N30 - RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "16mb"); +// RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); // Intel 440FX PCI_ROOT(config, "pci", 0); @@ -1134,7 +1149,8 @@ void pc9821_mate_r_state::pc9821ra266(machine_config &config) // 512KB CPU cache RAM // 32MB, max 256 MB (ECC EDO RAM) - RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M,128M,192M,256M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "32mb"); +// RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M,128M,192M,256M"); // Intel 440FX PCI_ROOT(config, "pci", 0); @@ -1163,7 +1179,8 @@ void pc9821_mate_r_state::pc9821ra333(machine_config &config) // 128KB CPU cache RAM // ECC EDO RAM 32MB ~ 256 MB - RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M,128M,192M,256M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "64mb"); +// RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M,128M,192M,256M"); // Trident TGUI9682XGi + integrated 98 gfx card // 3x cbus + 2x PCI slots @@ -1189,7 +1206,8 @@ void pc9821_note_lavie_state::pc9821nr15(machine_config &config) // 256KB CPU cache RAM // EDO RAM 16MB ~ 256MB - RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "16mb"); +// RAM(config.replace(), m_ram).set_default_size("16M").set_extra_options("32M,64M,128M"); // TFT 12.1 screen with 800x600 max resolution // Trident Cyber9385 Flat Panel Controller (SVGA, PCI?) @@ -1212,7 +1230,8 @@ void pc9821_note_lavie_state::pc9821nr166(machine_config &config) m_maincpu->set_irq_acknowledge_callback("pic8259_master", FUNC(pic8259_device::inta_cb)); // EDO RAM 32MB ~ 256MB - RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M,128M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "32mb"); +// RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M,128M"); // TFT 13.3 screen with 1024x768 resolution // Trident Cyber9385 Flat Panel Controller (SVGA, PCI?) @@ -1233,7 +1252,8 @@ void pc9821_note_lavie_state::pc9821nw150(machine_config &config) // 256KB CPU cache RAM // EDO RAM 32MB ~ 64M - RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M"); + PC9801_61_SIMM(config.replace(), "simm", pc9821ap2_simm_options, "32mb"); +// RAM(config.replace(), m_ram).set_default_size("32M").set_extra_options("64M"); // TFT 12.1 screen with 800x600 resolution & true color // Trident Cyber9385-1 Flat Panel Controller (SVGA, PCI?) diff --git a/src/mame/nec/pc_h98.cpp b/src/mame/nec/pc_h98.cpp index 60426837903..ca4391a4c62 100644 --- a/src/mame/nec/pc_h98.cpp +++ b/src/mame/nec/pc_h98.cpp @@ -174,8 +174,8 @@ void pc_hyper98_state::pc_h98s(machine_config &config) MCFG_MACHINE_RESET_OVERRIDE(pc_hyper98_state, pc_h98) // RAM 1.6 MB ~ 45.6 MB - m_ram->set_default_size("14M"); - m_ram->set_extra_options("2M,4M,8M,16M,32M,46M"); +// m_ram->set_default_size("14M"); +// m_ram->set_extra_options("2M,4M,8M,16M,32M,46M"); } // Stolen from pc9821 |
