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author David Haywood <mamehaze@gmail.com>2018-10-26 15:15:28 +0100
committer R. Belmont <rb6502@users.noreply.github.com>2018-10-26 10:15:28 -0400
commit9e016b9510902cfac6662fbdc2321c251c2ebdd9 (patch)
tree6fe19f799dc96b6811ffb6d903eeaab79398f4b2
parentb500eb582e406899f1b87bd76218c7c925edb8d3 (diff)
XaviX - revert some previous changes that didn't have desired effect and caused an issue (#4197)
* partial revert of previous changes that were problematic (nw) * improve handling of some SuperXaviX opcodes (nw)
-rw-r--r--src/devices/cpu/m6502/oxavix2000.lst40
-rw-r--r--src/devices/cpu/m6502/xavix.cpp131
-rw-r--r--src/devices/cpu/m6502/xavix.h18
-rw-r--r--src/mame/drivers/xavix.cpp91
-rw-r--r--src/mame/includes/xavix.h8
-rw-r--r--src/mame/machine/xavix.cpp2
-rw-r--r--src/mame/video/xavix.cpp12
7 files changed, 162 insertions, 140 deletions
diff --git a/src/devices/cpu/m6502/oxavix2000.lst b/src/devices/cpu/m6502/oxavix2000.lst
index ae679bdc28e..3171c62c915 100644
--- a/src/devices/cpu/m6502/oxavix2000.lst
+++ b/src/devices/cpu/m6502/oxavix2000.lst
@@ -322,24 +322,15 @@ eorpa_imp
prefetch();
adcpa_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pa & 0xff0000)>>16;
- do_adc(read((m_pa&0xffff)+Y));
- m_databank = TMP;
+ do_adc(read_full_data_sp(m_pa+Y));
prefetch();
stapa_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pa & 0xff0000)>>16;
- write((m_pa&0xffff)+Y, A);
- m_databank = TMP;
+ write_full_data_sp(m_pa+Y, A);
prefetch();
ldapa_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pa & 0xff0000)>>16;
- A = read((m_pa&0xffff)+Y);
- m_databank = TMP;
+ A = read_full_data_sp(m_pa+Y);
prefetch();
cmppa_imp
@@ -348,10 +339,7 @@ cmppa_imp
prefetch();
sbcpa_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pa & 0xff0000)>>16;
- do_sbc(read((m_pa&0xffff)+Y));
- m_databank = TMP;
+ do_sbc(read_full_data_sp(m_pa+Y));
prefetch();
orapb_imp
@@ -370,24 +358,15 @@ eorpb_imp
prefetch();
adcpb_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pb & 0xff0000)>>16;
- do_adc(read((m_pb&0xffff)+Y));
- m_databank = TMP;
+ do_adc(read_full_data_sp(m_pb+Y));
prefetch();
stapb_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pb & 0xff0000)>>16;
- write((m_pb&0xffff)+Y, A);
- m_databank = TMP;
+ write_full_data_sp(m_pb+Y, A);
prefetch();
ldapb_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pb & 0xff0000)>>16;
- A = read((m_pb&0xffff)+Y);
- m_databank = TMP;
+ A = read_full_data_sp(m_pb+Y);
prefetch();
cmppb_imp
@@ -396,10 +375,7 @@ cmppb_imp
prefetch();
sbcpb_imp
- TMP = m_databank; // TODO: Flags, how does bank boundary crossing get handled?
- m_databank = (m_pb & 0xff0000)>>16;
- do_sbc(read((m_pb&0xffff)+Y));
- m_databank = TMP;
+ do_sbc(read_full_data_sp(m_pb+Y));
prefetch();
stx_aby
diff --git a/src/devices/cpu/m6502/xavix.cpp b/src/devices/cpu/m6502/xavix.cpp
index 206c07bece5..70c60972512 100644
--- a/src/devices/cpu/m6502/xavix.cpp
+++ b/src/devices/cpu/m6502/xavix.cpp
@@ -33,28 +33,36 @@ DEFINE_DEVICE_TYPE(XAVIX, xavix_device, "xavix", "XaviX (SSD 97 / SSD 98)")
xavix_device::xavix_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, XAVIX, tag, owner, clock),
XPC(0),
- m_lowbus_config("lowbus", ENDIANNESS_LITTLE, 8, 15)
+ m_lowbus_config("lowbus", ENDIANNESS_LITTLE, 8, 15),
+ m_extbus_config("extbus", ENDIANNESS_LITTLE, 8, 24)
{
program_config.m_addr_width = 24;
program_config.m_logaddr_width = 24;
sprogram_config.m_addr_width = 24;
sprogram_config.m_logaddr_width = 24;
+ // XaviX specific spaces
m_lowbus_config.m_addr_width = 15;
m_lowbus_config.m_logaddr_width = 15;
+ m_extbus_config.m_addr_width = 24;
+ m_extbus_config.m_logaddr_width = 24;
}
xavix_device::xavix_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, type, tag, owner, clock),
XPC(0),
- m_lowbus_config("lowbus", ENDIANNESS_LITTLE, 8, 15)
+ m_lowbus_config("lowbus", ENDIANNESS_LITTLE, 8, 15),
+ m_extbus_config("extbus", ENDIANNESS_LITTLE, 8, 24)
{
program_config.m_addr_width = 24;
program_config.m_logaddr_width = 24;
sprogram_config.m_addr_width = 24;
sprogram_config.m_logaddr_width = 24;
+ // XaviX specific spaces
m_lowbus_config.m_addr_width = 15;
m_lowbus_config.m_logaddr_width = 15;
+ m_extbus_config.m_addr_width = 24;
+ m_extbus_config.m_logaddr_width = 24;
}
@@ -83,6 +91,7 @@ void xavix_device::device_start()
init();
m_lowbus_space = &space(5);
+ m_extbus_space = &space(6);
state_add(XAVIX_DATABANK, "DATBNK", m_databank).callimport().formatstr("%2s");;
state_add(XAVIX_CODEBANK, "CODBNK", m_codebank).callimport().formatstr("%2s");
@@ -95,24 +104,29 @@ void xavix_device::device_reset()
m6502_device::device_reset();
}
-// used by the xalda_idy ( lda ($**), y )opcodes
-uint8_t xavix_device::read_special(uint16_t adr)
+// used by the xalda_idy ( lda ($**), y )opcodes where databank value is used for high address bits
+inline uint8_t xavix_device::read_special(uint16_t adr)
{
return read_full_data_sp(m_databank, adr);
}
-uint8_t xavix_device::read_full_special(uint32_t adr)
+// used by DMA and video operations (and custom new opcodes) where full address is specified
+uint8_t xavix_device::read_full_data_sp(uint32_t adr)
{
return read_full_data_sp((adr&0xff0000)>>16, adr&0xffff);
}
+void xavix_device::write_full_data_sp(uint32_t adr, uint8_t val)
+{
+ write_full_data_sp((adr&0xff0000)>>16, adr&0xffff, val);
+}
xavix_device::mi_xavix_normal::mi_xavix_normal(xavix_device *_base)
{
base = _base;
}
-uint8_t xavix_device::read_full_data(uint32_t addr)
+inline uint8_t xavix_device::read_full_data(uint32_t addr)
{
return read_full_data((addr & 0xff0000)>>16, addr & 0xffff);
}
@@ -132,7 +146,7 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr)
}
else
{
- return mintf->program->read_byte((databank << 16) | adr);
+ return m_extbus_space->read_byte((databank << 16) | adr);
}
}
else
@@ -146,7 +160,7 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr)
if ((adr & 0x7fff) >= 0x200)
{
- return mintf->program->read_byte((databank << 16) | adr);
+ return m_extbus_space->read_byte((databank << 16) | adr);
}
else
{
@@ -155,12 +169,12 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr)
}
else
{
- return mintf->program->read_byte((databank << 16) | adr);
+ return m_extbus_space->read_byte((databank << 16) | adr);
}
}
}
-uint8_t xavix_device::read_full_data_sp(uint8_t databank, uint16_t adr)
+inline uint8_t xavix_device::read_full_data_sp(uint8_t databank, uint16_t adr)
{
if (databank < 0x80)
{
@@ -175,79 +189,33 @@ uint8_t xavix_device::read_full_data_sp(uint8_t databank, uint16_t adr)
}
else
{
- return mintf->program->read_byte((databank << 16) | adr);
+ return m_extbus_space->read_byte((databank << 16) | adr);
}
}
else
{
- return mintf->program->read_byte((databank << 16) | adr);
+ return m_extbus_space->read_byte((databank << 16) | adr);
}
}
// data reads
-uint8_t xavix_device::mi_xavix_normal::read(uint16_t adr)
+inline uint8_t xavix_device::mi_xavix_normal::read(uint16_t adr)
{
uint8_t databank = base->get_databank();
return base->read_full_data(databank, adr);
}
-uint8_t xavix_device::read_full_code(uint32_t addr)
-{
- return read_full_code(mintf->cache, (addr & 0xff0000)>>16, addr & 0xffff);
-}
-
-
-uint8_t xavix_device::read_full_code(memory_access_cache<0, 0, ENDIANNESS_LITTLE> * space, uint8_t codebank, uint16_t adr)
-{
- if (codebank < 0x80)
- {
- if (adr < 0x8000)
- {
- return m_lowbus_space->read_byte(adr);
- }
- else
- {
- return space->read_byte(codebank << 16 | adr);
- }
- }
- else
- {
- return space->read_byte(codebank << 16 | adr);
- }
-}
-
-uint8_t xavix_device::read_full_code(address_space* space, uint8_t codebank, uint16_t adr)
-{
- if (codebank < 0x80)
- {
- if (adr < 0x8000)
- {
- return m_lowbus_space->read_byte(adr);
- }
- else
- {
- return space->read_byte(codebank << 16 | adr);
- }
- }
- else
- {
- return space->read_byte(codebank << 16 | adr);
- }
-}
-
-
// opcode reads
uint8_t xavix_device::mi_xavix_normal::read_sync(uint16_t adr)
{
- uint8_t codebank = base->get_codebank();
- return base->read_full_code(scache, codebank, adr);
+ return scache->read_byte(base->adr_with_codebank(adr));
}
+// oprand reads
uint8_t xavix_device::mi_xavix_normal::read_arg(uint16_t adr)
{
- uint8_t codebank = base->get_codebank();
- return base->read_full_code(cache, codebank, adr);
+ return cache->read_byte(base->adr_with_codebank(adr));
}
// data writes
@@ -256,9 +224,8 @@ void xavix_device::write_full_data(uint32_t addr, uint8_t val)
write_full_data((addr & 0xff0000)>>16, addr & 0xffff, val);
}
-
// data writes
-void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_t val)
+inline void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_t val)
{
if (databank < 0x80)
{
@@ -279,7 +246,7 @@ void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_t val)
}
else
{
- mintf->program->write_byte((databank << 16) | adr, val);
+ m_extbus_space->write_byte((databank << 16) | adr, val);
}
}
else
@@ -299,7 +266,7 @@ void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_t val)
if ((adr & 0x7fff) >= 0x200)
{
- mintf->program->write_byte((databank << 16) | adr, val);
+ m_extbus_space->write_byte((databank << 16) | adr, val);
}
else
{
@@ -308,11 +275,29 @@ void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_t val)
}
else
{
- mintf->program->write_byte((databank << 16) | adr, val);
+ m_extbus_space->write_byte((databank << 16) | adr, val);
}
}
}
+inline void xavix_device::write_full_data_sp(uint8_t databank, uint16_t adr, uint8_t val)
+{
+ if (databank < 0x80)
+ {
+ if (adr < 0x8000)
+ {
+ m_lowbus_space->write_byte(adr, val);
+ }
+ else
+ {
+ m_extbus_space->write_byte((databank << 16) | adr, val);
+ }
+ }
+ else
+ {
+ m_extbus_space->write_byte((databank << 16) | adr, val);
+ }
+}
void xavix_device::mi_xavix_normal::write(uint16_t adr, uint8_t val)
{
@@ -326,14 +311,12 @@ xavix_device::mi_xavix_nd::mi_xavix_nd(xavix_device *_base) : mi_xavix_normal(_b
uint8_t xavix_device::mi_xavix_nd::read_sync(uint16_t adr)
{
- uint8_t codebank = base->get_codebank();
- return base->read_full_code(sprogram, codebank, adr);
+ return sprogram->read_byte(base->adr_with_codebank(adr));
}
uint8_t xavix_device::mi_xavix_nd::read_arg(uint16_t adr)
{
- uint8_t codebank = base->get_codebank();
- return base->read_full_code(program, codebank, adr);
+ return program->read_byte(base->adr_with_codebank(adr));
}
void xavix_device::set_codebank(uint8_t bank)
@@ -366,12 +349,14 @@ device_memory_interface::space_config_vector xavix_device::memory_space_config()
return space_config_vector {
std::make_pair(AS_PROGRAM, &program_config),
std::make_pair(AS_OPCODES, &sprogram_config),
- std::make_pair(5, &m_lowbus_config)
+ std::make_pair(5, &m_lowbus_config),
+ std::make_pair(6, &m_extbus_config)
};
else
return space_config_vector {
std::make_pair(AS_PROGRAM, &program_config),
- std::make_pair(5, &m_lowbus_config)
+ std::make_pair(5, &m_lowbus_config),
+ std::make_pair(6, &m_extbus_config)
};
}
diff --git a/src/devices/cpu/m6502/xavix.h b/src/devices/cpu/m6502/xavix.h
index 190d216ba40..ce71d77cb7e 100644
--- a/src/devices/cpu/m6502/xavix.h
+++ b/src/devices/cpu/m6502/xavix.h
@@ -41,20 +41,18 @@ public:
#undef O
- void write_full_data(uint8_t databank, uint16_t adr, uint8_t val);
- uint8_t read_full_code(address_space* space, uint8_t codebank, uint16_t adr);
- uint8_t read_full_code(memory_access_cache<0, 0, ENDIANNESS_LITTLE> * space, uint8_t codebank, uint16_t adr);
-
- uint8_t read_full_code(uint32_t addr);
uint8_t read_full_data(uint8_t databank, uint16_t addr);
- uint8_t read_full_data_sp(uint8_t databank, uint16_t adr);
- uint8_t read_full_special(uint32_t adr);
-
uint8_t read_full_data(uint32_t addr);
-
+ void write_full_data(uint8_t databank, uint16_t adr, uint8_t val);
void write_full_data(uint32_t addr, uint8_t val);
+ // used for opcodes etc. that can't see certain things in banks > 0x80
+ uint8_t read_full_data_sp(uint8_t databank, uint16_t adr);
+ uint8_t read_full_data_sp(uint32_t adr);
+ void write_full_data_sp(uint8_t databank, uint16_t adr, uint8_t val);
+ void write_full_data_sp(uint32_t adr, uint8_t val);
+
protected:
class mi_xavix_normal : public memory_interface {
public:
@@ -96,7 +94,9 @@ protected:
address_space_config m_special_data_config;
address_space *m_special_data_space;
address_space_config m_lowbus_config;
+ address_space_config m_extbus_config;
address_space *m_lowbus_space;
+ address_space *m_extbus_space;
uint8_t read_special(uint16_t adr);
diff --git a/src/mame/drivers/xavix.cpp b/src/mame/drivers/xavix.cpp
index cb163f9d633..f66468e464a 100644
--- a/src/mame/drivers/xavix.cpp
+++ b/src/mame/drivers/xavix.cpp
@@ -206,17 +206,31 @@
#include "emu.h"
#include "includes/xavix.h"
-// not confirmed for all games
+// NTSC clock for regular XaviX?
#define MAIN_CLOCK XTAL(21'477'272)
READ8_MEMBER(xavix_state::main_r)
{
- return m_rgn[(offset) & (m_rgnlen - 1)];
+ if (offset & 0x8000)
+ {
+ return m_rgn[(offset) & (m_rgnlen - 1)];
+ }
+ else
+ {
+ return m_lowbus->read8(space, offset & 0x7fff);
+ }
}
WRITE8_MEMBER(xavix_state::main_w)
{
- logerror("write to ROM area?\n");
+ if (offset & 0x8000)
+ {
+ logerror("write to ROM area?\n");
+ }
+ else
+ {
+ m_lowbus->write8(space, offset & 0x7fff, data);
+ }
}
/* rad_madf has callf #$8f3f21 in various places, and expects to jump to code in ROM, it is unclear how things map in this case, as presumably
@@ -233,7 +247,7 @@ WRITE8_MEMBER(xavix_state::main_w)
this can't be correct, it breaks monster truck which expects ROM at 8000 even in the >0x800000 region, maybe code + data mappings need
to be kept separate, with >0x800000 showing both ROM banks for code, but still having the zero page area etc. for data?
- The code at 00EA84 in Ping Pong stores 8e to the data bank, reads 16 bit pointer from from 0000 + y (expecting it to come from zero page ram - value 3081)
+ The code at 00EA84 in Ping Pong stores 8e to the data bank, reads 16 bit pointer from from 0000 + y (expecting it to come from zero page ram - value 3081)
then reads data from 3081, pushes it to stack (which is expected to work) then sets data bank back to 00 (writes to ff, expecting it to work) then pulls
the value written and puts it in RAM. Is stack actually still memory mapped at this point, or do stack operations always go to stack regardless?
Do reads return databank/codebank/stack, or only zero page? is zero page visibility maybe even conditional on how it gets used?
@@ -245,15 +259,52 @@ WRITE8_MEMBER(xavix_state::main_w)
*/
+READ8_MEMBER(xavix_state::main2_r)
+{
+ if (offset & 0x8000)
+ {
+ return m_rgn[(offset) & (m_rgnlen - 1)];
+ }
+ else
+ {
+ if ((offset & 0xffff) >= 0x200)
+ {
+ return m_rgn[(offset) & (m_rgnlen - 1)];
+ }
+ else
+ return m_lowbus->read8(space, offset & 0x7fff);
+ }
+}
-// DATA reads from 0x8000-0xffff are banked by byte 0xff of 'ram' (this is handled in the CPU core)
+WRITE8_MEMBER(xavix_state::main2_w)
+{
+ if (offset & 0x8000)
+ {
+ logerror("write to ROM area?\n");
+ }
+ else
+ {
+ if ((offset & 0xffff) >= 0x200)
+ logerror("write to ROM area?\n");
+ else
+ m_lowbus->write8(space, offset & 0x7fff, data);
+ }
+}
-// access to external bus / ROM
+// this is only used for opcode / oprand reads, data memory addressing is handled in core, doing the opcode / oprand addressing in core causes disassembly issues when running from lowbus space (ram, interrupts on most games)
void xavix_state::xavix_map(address_map &map)
{
- map(0x000000, 0xffffff).rw(FUNC(xavix_state::main_r), FUNC(xavix_state::main_w));
+ map(0x000000, 0x7fffff).rw(FUNC(xavix_state::main_r), FUNC(xavix_state::main_w));
+ map(0x800000, 0xffffff).rw(FUNC(xavix_state::main2_r), FUNC(xavix_state::main2_w));
+}
+
+// this is used by data reads / writes after some processing in the core to decide if data reads can see lowbus, zeropage, stack, bank registers etc. and only falls through to here on a true external bus access
+void xavix_state::xavix_extbus_map(address_map &map)
+{
+ map(0x000000, 0xffffff).rw(FUNC(xavix_state::extbus_r), FUNC(xavix_state::extbus_w));
}
+
void xavix_state::xavix_lowbus_map(address_map &map)
{
map(0x0000, 0x3fff).ram().share("mainram");
@@ -276,7 +327,7 @@ void xavix_state::xavix_lowbus_map(address_map &map)
// Tilemap 2 Registers
map(0x6fd0, 0x6fd7).rw(FUNC(xavix_state::tmap2_regs_r), FUNC(xavix_state::tmap2_regs_w));
-
+
// Sprite Registers
map(0x6fd8, 0x6fd8).w(FUNC(xavix_state::spriteregs_w));
@@ -344,10 +395,10 @@ void xavix_state::xavix_lowbus_map(address_map &map)
map(0x7986, 0x7987).ram().w(FUNC(xavix_state::rom_dmalen_w)).share("rom_dma_len");
// IO Ports
- map(0x7a00, 0x7a00).rw(FUNC(xavix_state::io0_data_r),FUNC(xavix_state::io0_data_w));
- map(0x7a01, 0x7a01).rw(FUNC(xavix_state::io1_data_r),FUNC(xavix_state::io1_data_w));
- map(0x7a02, 0x7a02).rw(FUNC(xavix_state::io0_direction_r),FUNC(xavix_state::io0_direction_w));
- map(0x7a03, 0x7a03).rw(FUNC(xavix_state::io1_direction_r),FUNC(xavix_state::io1_direction_w));
+ map(0x7a00, 0x7a00).rw(FUNC(xavix_state::io0_data_r), FUNC(xavix_state::io0_data_w));
+ map(0x7a01, 0x7a01).rw(FUNC(xavix_state::io1_data_r), FUNC(xavix_state::io1_data_w));
+ map(0x7a02, 0x7a02).rw(FUNC(xavix_state::io0_direction_r), FUNC(xavix_state::io0_direction_w));
+ map(0x7a03, 0x7a03).rw(FUNC(xavix_state::io1_direction_r), FUNC(xavix_state::io1_direction_w));
// Interrupt control registers
map(0x7a80, 0x7a80).w(FUNC(xavix_state::xavix_7a80_w)); // still IO? ADC related?
@@ -357,7 +408,7 @@ void xavix_state::xavix_lowbus_map(address_map &map)
// Lightgun / pen 2 control
//map(0x7b18, 0x7b1b)
-
+
// ADC registers
map(0x7b80, 0x7b80).rw(FUNC(xavix_state::adc_7b80_r), FUNC(xavix_state::adc_7b80_w)); // rad_snow (not often)
map(0x7b81, 0x7b81).rw(FUNC(xavix_state::adc_7b81_r), FUNC(xavix_state::adc_7b81_w)); // written (often, m_trck, analog related?)
@@ -398,6 +449,7 @@ void xavix_state::superxavix_lowbus_map(address_map &map)
map(0x6fb0, 0x6fc7).ram().share("bmp_base");
}
+
static INPUT_PORTS_START( xavix )
PORT_START("IN0")
PORT_DIPNAME( 0x01, 0x00, "IN0" )
@@ -665,7 +717,7 @@ static const gfx_layout char16layout =
RGN_FRAC(1,1),
4,
{ STEP4(0,1) },
- { 1*4,0*4,3*4,2*4,5*4,4*4,7*4,6*4, 9*4,8*4,11*4,10*4,13*4,12*4,15*4,14*4 },
+ { 1*4,0*4,3*4,2*4,5*4,4*4,7*4,6*4, 9*4,8*4,11*4,10*4,13*4,12*4,15*4,14*4 },
{ STEP16(0,4*16) },
16*16*4
};
@@ -693,7 +745,7 @@ static const gfx_layout char16layout8bpp =
};
static GFXDECODE_START( gfx_xavix )
- GFXDECODE_ENTRY( "bios", 0, charlayout, 0, 16 )
+ GFXDECODE_ENTRY( "bios", 0, charlayout, 0, 16 )
GFXDECODE_ENTRY( "bios", 0, char16layout, 0, 16 )
GFXDECODE_ENTRY( "bios", 0, charlayout8bpp, 0, 1 )
GFXDECODE_ENTRY( "bios", 0, char16layout8bpp, 0, 1 )
@@ -706,13 +758,15 @@ MACHINE_CONFIG_START(xavix_state::xavix)
MCFG_DEVICE_ADD("maincpu",XAVIX,MAIN_CLOCK)
MCFG_DEVICE_PROGRAM_MAP(xavix_map)
MCFG_DEVICE_ADDRESS_MAP(5, xavix_lowbus_map)
-
+ MCFG_DEVICE_ADDRESS_MAP(6, xavix_extbus_map)
MCFG_M6502_DISABLE_CACHE()
- MCFG_DEVICE_VBLANK_INT_DRIVER("screen", xavix_state, interrupt)
+ MCFG_DEVICE_VBLANK_INT_DRIVER("screen", xavix_state, interrupt)
MCFG_XAVIX_VECTOR_CALLBACK(xavix_state, get_vectors)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", xavix_state, scanline_cb, "screen", 0, 1)
+ ADDRESS_MAP_BANK(config, "lowbus").set_map(&xavix_state::xavix_lowbus_map).set_options(ENDIANNESS_LITTLE, 8, 24, 0x8000);
+
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
@@ -753,8 +807,9 @@ MACHINE_CONFIG_START(xavix_state::xavix2000)
MCFG_DEVICE_ADD("maincpu",XAVIX2000,MAIN_CLOCK)
MCFG_DEVICE_PROGRAM_MAP(xavix_map)
MCFG_DEVICE_ADDRESS_MAP(5, superxavix_lowbus_map)
+ MCFG_DEVICE_ADDRESS_MAP(6, xavix_extbus_map)
MCFG_M6502_DISABLE_CACHE()
- MCFG_DEVICE_VBLANK_INT_DRIVER("screen", xavix_state, interrupt)
+ MCFG_DEVICE_VBLANK_INT_DRIVER("screen", xavix_state, interrupt)
MCFG_XAVIX_VECTOR_CALLBACK(xavix_state, get_vectors)
MCFG_DEVICE_REMOVE("palette")
diff --git a/src/mame/includes/xavix.h b/src/mame/includes/xavix.h
index 6749bc0f10b..d38c0f04de6 100644
--- a/src/mame/includes/xavix.h
+++ b/src/mame/includes/xavix.h
@@ -41,6 +41,7 @@ public:
m_in1(*this, "IN1"),
m_region(*this, "REGION"),
m_gfxdecode(*this, "gfxdecode"),
+ m_lowbus(*this, "lowbus"),
m_i2cmem(*this, "i2cmem")
{ }
@@ -62,7 +63,8 @@ private:
void xavix_map(address_map &map);
void xavix_lowbus_map(address_map &map);
- void superxavix_lowbus_map(address_map &map);
+ void xavix_extbus_map(address_map &map);
+void superxavix_lowbus_map(address_map &map);
INTERRUPT_GEN_MEMBER(interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(scanline_cb);
@@ -80,6 +82,9 @@ private:
DECLARE_READ8_MEMBER(main3_r);
DECLARE_WRITE8_MEMBER(main3_w);
+ DECLARE_READ8_MEMBER(extbus_r) { return m_rgn[(offset) & (m_rgnlen - 1)]; }
+ DECLARE_WRITE8_MEMBER(extbus_w) { logerror("write to external bus %06x %02x\n", offset, data); }
+
DECLARE_WRITE8_MEMBER(extintrf_7900_w);
DECLARE_WRITE8_MEMBER(extintrf_7901_w);
DECLARE_WRITE8_MEMBER(extintrf_7902_w);
@@ -292,6 +297,7 @@ private:
uint8_t get_next_byte();
int get_current_address_byte();
+ required_device<address_map_bank_device> m_lowbus;
optional_device<i2cmem_device> m_i2cmem;
};
diff --git a/src/mame/machine/xavix.cpp b/src/mame/machine/xavix.cpp
index 698ae5c7e62..ae4acf6a9f3 100644
--- a/src/mame/machine/xavix.cpp
+++ b/src/mame/machine/xavix.cpp
@@ -27,7 +27,7 @@ WRITE8_MEMBER(xavix_state::rom_dmatrg_w)
// many games explicitly want to access with the high bank bit set, so probably the same logic as when grabbing tile data
// we have to be careful here or we get the zero page memory read, hence not just using read8 on the whole space
// this again probably indicates there is 'data space' where those don't appear
- uint8_t dat = m_maincpu->read_full_special(m_tmpaddress);
+ uint8_t dat = m_maincpu->read_full_data_sp(m_tmpaddress);
m_maincpu->write_full_data(dest+i, dat);
}
}
diff --git a/src/mame/video/xavix.cpp b/src/mame/video/xavix.cpp
index dd66a532eca..860c68b2457 100644
--- a/src/mame/video/xavix.cpp
+++ b/src/mame/video/xavix.cpp
@@ -18,7 +18,7 @@ inline uint8_t xavix_state::get_next_bit()
// going through memory is slow, try not to do it too often!
if (m_tmp_databit == 0)
{
- m_bit = m_maincpu->read_full_special(m_tmp_dataaddress);
+ m_bit = m_maincpu->read_full_data_sp(m_tmp_dataaddress);
}
uint8_t ret = m_bit >> m_tmp_databit;
@@ -220,15 +220,15 @@ void xavix_state::draw_tilemap_line(screen_device &screen, bitmap_ind16 &bitmap,
int tile = 0;
// the register being 0 probably isn't the condition here
- if (tileregs[0x0] != 0x00) tile |= m_maincpu->read_full_special((tileregs[0x0] << 8) + count);
+ if (tileregs[0x0] != 0x00) tile |= m_maincpu->read_full_data_sp((tileregs[0x0] << 8) + count);
// only read the next byte if we're not in an 8-bit mode
if (((tileregs[0x7] & 0x7f) != 0x00) && ((tileregs[0x7] & 0x7f) != 0x08))
- tile |= m_maincpu->read_full_special((tileregs[0x1] << 8) + count) << 8;
+ tile |= m_maincpu->read_full_data_sp((tileregs[0x1] << 8) + count) << 8;
// 24 bit modes can use reg 0x2, otherwise it gets used as extra attribute in other modes
if (alt_tileaddressing2 == 2)
- tile |= m_maincpu->read_full_special((tileregs[0x2] << 8) + count) << 16;
+ tile |= m_maincpu->read_full_data_sp((tileregs[0x2] << 8) + count) << 16;
int bpp = (tileregs[0x3] & 0x0e) >> 1;
@@ -284,7 +284,7 @@ void xavix_state::draw_tilemap_line(screen_device &screen, bitmap_ind16 &bitmap,
// Tilemap specific mode extension with an 8-bit per tile attribute, works in all modes except 24-bit (no room for attribute) and header (not needed?)
if (tileregs[0x7] & 0x08)
{
- uint8_t extraattr = m_maincpu->read_full_special((tileregs[0x2] << 8) + count);
+ uint8_t extraattr = m_maincpu->read_full_data_sp((tileregs[0x2] << 8) + count);
// make use of the extraattr stuff?
pal = (extraattr & 0xf0) >> 4;
zval = (extraattr & 0x0f) >> 0;
@@ -802,7 +802,7 @@ WRITE8_MEMBER(xavix_state::spritefragment_dma_trg_w)
{
for (int i = 0; i < len; i++)
{
- uint8_t dat = m_maincpu->read_full_special(src + i);
+ uint8_t dat = m_maincpu->read_full_data_sp(src + i);
m_fragment_sprite[(dst + i) & 0x7ff] = dat;
}
}