summaryrefslogtreecommitdiffstatshomepage
diff options
context:
space:
mode:
author angelosa <lordkale4@gmail.com>2025-04-18 23:54:43 +0200
committer angelosa <lordkale4@gmail.com>2025-04-18 23:54:43 +0200
commit9b622297c5c295c2b4f2e39588fb2da00161ad29 (patch)
tree35c5692d56edda2015f721f69b0a503abdabdd56
parentb3d6ccfdcd7ad6e93d63b7f54642f7a679489319 (diff)
nec/pc9821.cpp: hack GDC clock setting for now
-rw-r--r--src/mame/nec/pc9821.cpp11
1 files changed, 5 insertions, 6 deletions
diff --git a/src/mame/nec/pc9821.cpp b/src/mame/nec/pc9821.cpp
index 58f36d2ee26..76d3e902c8d 100644
--- a/src/mame/nec/pc9821.cpp
+++ b/src/mame/nec/pc9821.cpp
@@ -691,16 +691,15 @@ void pc9821_canbe_state::pc9821cx3_io(address_map &map)
}
static INPUT_PORTS_START( pc9821 )
- // TODO: verify how many "switches" are really present on pc9821
- // I suspect there are none: if you flip some of these then BIOS keeps throwing
- // "set the sdip" warning until it matches parity odd.
- // They may actually be hardwired defaults that should return constant values depending
- // on machine type.
PORT_START("DSW1")
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_DEVICE_MEMBER("sdip", FUNC(pc98_sdip_device::dsw1_r))
PORT_START("DSW2")
- PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_DEVICE_MEMBER("sdip", FUNC(pc98_sdip_device::dsw2_r))
+ PORT_BIT( 0x7f, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_DEVICE_MEMBER("sdip", FUNC(pc98_sdip_device::dsw2_r))
+ // HACK: PC-9821 defaults to 5 MHz, which isn't ideal in several cases without -debug
+ PORT_DIPNAME( 0x80, 0x80, "GDC clock" )
+ PORT_DIPSETTING( 0x80, "2.5 MHz" )
+ PORT_DIPSETTING( 0x00, "5 MHz" )
PORT_START("DSW3")
PORT_BIT( 0x23, IP_ACTIVE_LOW, IPT_CUSTOM ) //PORT_CUSTOM_DEVICE_MEMBER("sdip", FUNC(pc98_sdip_device::dsw3_r))