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author | Michael Zapf <Michael.Zapf@mizapf.de> | 2019-04-18 18:07:59 +0200 |
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committer | Michael Zapf <Michael.Zapf@mizapf.de> | 2019-04-18 18:07:59 +0200 |
commit | 990e11598a14bdfc52a84d77d3e07d743e1d387b (patch) | |
tree | 3d22bf10643c73a03f611085e81bbca1d30d4555 | |
parent | dfbde43dda51a3107b16f3df29f3c8c048f14aa9 (diff) |
tms99xx: Fix some comments. (nw)
-rw-r--r-- | src/devices/cpu/tms9900/tms99com.h | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/src/devices/cpu/tms9900/tms99com.h b/src/devices/cpu/tms9900/tms99com.h index 6495ada9133..02cc729263d 100644 --- a/src/devices/cpu/tms9900/tms99com.h +++ b/src/devices/cpu/tms9900/tms99com.h @@ -13,11 +13,14 @@ TI990/12 Multi-chip implementation, faster than 990/10. Huge instruction set TMS9900 Mono-chip implementation, 1976. Used in the TI-99/4(A) computer. + No mapper, no privileged mode. TMS9940 Microcontroller with 2kb ROM, 128b RAM, decrementer, CRU bus, 1979 - TMS9980 8-bit variant of tms9900. Two distinct chips actually : tms9980a - and tms9981 with an extra clock and simplified power supply + TMS9980 like TMS9900, but with integrated 16/8 databus multiplexer, + smaller address/cru space, and simplified interrupt input. + Two distinct chips actually: tms9980a, and tms9981 with an + extra clock and simplified power supply TMS9985 9940 with 8kb ROM, 256b RAM, and a 8-bit external bus, c. 1978 (never released) @@ -25,8 +28,9 @@ SBP68689 Improved 9989, built as an ASIC as 9989 was running scarce - TMS9995 TMS9985-like, with many improvements (but no ROM). Used in the - TI-99/8 prototype and the Geneve computer. + TMS9995 TMS9985-like, with many improvements (but no ROM). Used in + some arcade systems, in the TI-99/2 and TI-99/8 prototype, + and in the Geneve computer. TMS99000 Improved mono-chip implementation, meant to replace 990/10, 1981 TMS99105 This chip is available in several variants which are similar @@ -65,9 +69,10 @@ enum }; /* - We are using setaddress this way: The address is the object to be - written; as address we use the values of the DBIN and IAQ lines. That - means we do not need separate dbin and iaq setting methods. + These values represent line states for bus control lines. In a setaddress + operation, the current state of the address bus lines is represented + by the address where these values are written to. The callee should check + the values to find out whether a read or write operation will follow. */ enum { |