diff options
author | AJR <ajrhacker@users.noreply.github.com> | 2021-02-09 23:28:11 -0500 |
---|---|---|
committer | AJR <ajrhacker@users.noreply.github.com> | 2021-02-09 23:28:19 -0500 |
commit | 8e2824882649e97f6bc342af73ce0bb6c66d5361 (patch) | |
tree | 3dfb0a13223802c28bed941f5919dab078300822 | |
parent | d6f1f444569fa91e238d1502903c0a67abf02bab (diff) |
m6809: Fix regression in RTI timing
-rw-r--r-- | src/devices/cpu/m6809/base6x09.ops | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/devices/cpu/m6809/base6x09.ops b/src/devices/cpu/m6809/base6x09.ops index a987b5a1594..e6ba8c22f10 100644 --- a/src/devices/cpu/m6809/base6x09.ops +++ b/src/devices/cpu/m6809/base6x09.ops @@ -50,8 +50,8 @@ IRQ: INTERRUPT_VECTOR: @dummy_vma(1); - @m_pc.b.h = read_operand(0); // Not sure if this is cycle exact - @m_pc.b.l = read_operand(1); // Not sure if this is cycle exact + @m_pc.b.h = read_operand(0); + @m_pc.b.l = read_operand(1); @dummy_vma(1); return; @@ -426,6 +426,7 @@ SYNC: // unmassage... m_pc.w++; } + @eat(1); return; DAA: @@ -540,8 +541,7 @@ MUL: RTI: @dummy_read_opcode_arg(0); set_regop16(m_s); - m_temp.w = 0x01; // PULS CC - %PULL_REGISTERS; + @m_cc = read_memory(regop16().w++); // PULS CC m_temp.w = ((m_cc & CC_E) ? entire_state_registers() : partial_state_registers()) & ~0x01; goto PULL_REGISTERS; |