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authorGravatarGravatar Nigel Barnes <Pernod70@users.noreply.github.com>2020-12-04 11:50:16 +0000
committerGravatarGravatar Nigel Barnes <Pernod70@users.noreply.github.com>2020-12-04 12:23:11 +0000
commit84264c5efb9a2e642436dd7db53364b87d7ac560 (patch)
treed5e28fc4ef22050ecf3d4c85acee669d7cea4085
parent6a339a4f41fa8b4cacdf7b1561428214a6dffe9f (diff)
bbc_tube_rc6502: Fixed shared ram sizes.
-rw-r--r--src/devices/bus/bbc/tube/tube_rc6502.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/devices/bus/bbc/tube/tube_rc6502.cpp b/src/devices/bus/bbc/tube/tube_rc6502.cpp
index 666c5fbece7..1c05d6c3b89 100644
--- a/src/devices/bus/bbc/tube/tube_rc6502.cpp
+++ b/src/devices/bus/bbc/tube/tube_rc6502.cpp
@@ -61,13 +61,13 @@ ioport_constructor bbc_tube_rc6502_device::device_input_ports() const
void bbc_tube_rc6502_device::tube_rc6502_bank(address_map &map)
{
// Bank 0: ROM disabled with banked RAM (65C02)
- map(0x000000, 0x00ffff).ram().share("ram");
+ map(0x000000, 0x07ffff).ram().share("ram");
map(0x004000, 0x007fff).bankrw(m_bank1);
map(0x008000, 0x00bfff).bankrw(m_bank2);
// Bank 1: ROM disabled with linear RAM (65C816)
map(0x100000, 0x17ffff).ram().share("ram");
// Bank 2: ROM enabled with banked RAM (65C02)
- map(0x200000, 0x20ffff).ram().share("ram");
+ map(0x200000, 0x27ffff).ram().share("ram");
map(0x204000, 0x207fff).bankrw(m_bank1);
map(0x208000, 0x20bfff).bankrw(m_bank2);
map(0x208000, 0x20ffff).rom().region("maincpu", 0);