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author hap <happppp@users.noreply.github.com>2025-08-29 10:32:19 +0200
committer hap <happppp@users.noreply.github.com>2025-08-29 10:32:30 +0200
commit83f9fd1a1bca88741eb24e7ee9e4a65ac467f0be (patch)
tree3a6e0db8b4caab5496d807cc2a9f79bb1ea99127
parentc65b7dbae009b28487a834ba5b5d76024346f654 (diff)
sn76496: add btanb note
-rw-r--r--src/devices/sound/sn76496.cpp12
-rw-r--r--src/mame/sanritsu/bankp.cpp5
2 files changed, 12 insertions, 5 deletions
diff --git a/src/devices/sound/sn76496.cpp b/src/devices/sound/sn76496.cpp
index a9bd81fcff0..24c4d45c250 100644
--- a/src/devices/sound/sn76496.cpp
+++ b/src/devices/sound/sn76496.cpp
@@ -99,8 +99,10 @@
the others, as in real life.
15/02/2010: Lord Nightmare & Michael Zapf (additional testing by PlgDavid)
- Fix noise period when set to mirror channel 3 and channel 3 period is set to 0 (tested on hardware for noise, wave needs tests) - MZ
- Fix phase of noise on sn94624 and sn76489; all chips use a standard XOR, the only inversion is the output itself - LN, Plgdavid
+ Fix noise period when set to mirror channel 3 and channel 3 period is set to 0
+ (tested on hardware for noise, wave needs tests) - MZ
+ Fix phase of noise on sn94624 and sn76489; all chips use a standard XOR, the only
+ inversion is the output itself - LN, Plgdavid
Thanks to PlgDavid and Michael Zapf for providing samples which helped immensely here.
23/02/2011: Lord Nightmare & Enik
@@ -138,6 +140,10 @@
other variants, the NCR-derived variants are implied to ignore writes to
regs 1,3,5,6,7 if 0x80 is not set. This needs to be verified on real hardware.
+ BTANB:
+ * Unless the registers are quickly initialized by software, non-Sega chips
+ output a low-pitch beep at cold boot, eg. bbcm, bankp, exedexes, docastle.
+
***************************************************************************/
#include "emu.h"
@@ -239,8 +245,8 @@ void sn76496_base_device::device_start()
for (int i = 0; i < 4; i++)
{
m_output[i] = 0;
+ m_count[i] = 0;
m_period[i] = (m_sega_style_psg || i == 3) ? 0 : 0x400;
- m_count[i] = (m_sega_style_psg || i == 3) ? 0 : 0x400;
}
m_RNG = m_feedback_mask;
diff --git a/src/mame/sanritsu/bankp.cpp b/src/mame/sanritsu/bankp.cpp
index 5498c9eac93..4bb45b21309 100644
--- a/src/mame/sanritsu/bankp.cpp
+++ b/src/mame/sanritsu/bankp.cpp
@@ -557,6 +557,7 @@ void bankp_state::bankp(machine_config &config)
// sound hardware
SPEAKER(config, "mono").front_center();
+ // 1.0 is ok, sound does not overflow other than the boot-up beep
SN76489A(config, "sn1", 15.46848_MHz_XTAL / 6).add_route(ALL_OUTPUTS, "mono", 1.0);
SN76489A(config, "sn2", 15.46848_MHz_XTAL / 6).add_route(ALL_OUTPUTS, "mono", 1.0);
SN76489A(config, "sn3", 15.46848_MHz_XTAL / 6).add_route(ALL_OUTPUTS, "mono", 1.0);
@@ -595,7 +596,7 @@ ROM_START( bankp )
ROM_REGION( 0x025c, "user1", 0 )
ROM_LOAD( "315-5074.2c.bin", 0x0000, 0x025b, CRC(2e57bbba) SHA1(c3e45e8a972342779442e50872a2f5f2d61e9c0a) )
- ROM_LOAD( "315-5073.pal16l4", 0x0000, 0x0001, NO_DUMP ) // read protected
+ ROM_LOAD( "315-5073.pal16l4", 0x025b, 0x0001, NO_DUMP ) // read protected
ROM_END
ROM_START( bankpt )
@@ -653,7 +654,7 @@ ROM_START( combh )
ROM_REGION( 0x025c, "user1", 0 )
ROM_LOAD( "315-5074.2c.bin", 0x0000, 0x025b, CRC(2e57bbba) SHA1(c3e45e8a972342779442e50872a2f5f2d61e9c0a) )
- ROM_LOAD( "315-5073.pal16l4", 0x0000, 0x0001, NO_DUMP ) // read protected
+ ROM_LOAD( "315-5073.pal16l4", 0x025b, 0x0001, NO_DUMP ) // read protected
ROM_END
} // anonymous namespace