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author Ivan Vangelista <mesgnet@yahoo.it>2020-06-16 19:39:52 +0200
committer Ivan Vangelista <mesgnet@yahoo.it>2020-06-16 19:39:52 +0200
commit82de76205a136cdd60bdebb7a31a6c63c5cdc563 (patch)
tree989be68bc6b36994eda33393a9490daf343692f8
parentda639365600fab4edad4b4ede11333cfd5da218a (diff)
finished removing read* and write* macros from the mame part of the tree. the devices tree will be next (nw)
-rw-r--r--src/devices/bus/gio64/gio64.h3
-rw-r--r--src/devices/bus/gio64/newport.cpp4
-rw-r--r--src/devices/bus/gio64/newport.h4
-rw-r--r--src/devices/cpu/mips/ps2vif1.cpp4
-rw-r--r--src/devices/cpu/mips/ps2vif1.h4
-rw-r--r--src/devices/cpu/mips/ps2vu.cpp8
-rw-r--r--src/devices/cpu/mips/ps2vu.h4
-rw-r--r--src/devices/cpu/sh/sh4.h12
-rw-r--r--src/devices/cpu/sh/sh4comn.cpp12
-rw-r--r--src/devices/cpu/sharc/sharc.cpp8
-rw-r--r--src/devices/cpu/sharc/sharc.h8
-rw-r--r--src/devices/machine/netlist.h24
-rw-r--r--src/emu/drivers/testcpu.cpp4
-rw-r--r--src/mame/audio/xavix.cpp46
-rw-r--r--src/mame/includes/xavix.h232
-rw-r--r--src/mame/machine/xavix.cpp112
-rw-r--r--src/mame/video/xavix.cpp36
17 files changed, 261 insertions, 264 deletions
diff --git a/src/devices/bus/gio64/gio64.h b/src/devices/bus/gio64/gio64.h
index 65f75684ec7..df99dc70dd9 100644
--- a/src/devices/bus/gio64/gio64.h
+++ b/src/devices/bus/gio64/gio64.h
@@ -45,9 +45,6 @@ protected:
// configuration
required_device<gio64_device> m_gio64;
slot_type_t const m_slot_type;
-
- DECLARE_READ32_MEMBER(timeout_r);
- DECLARE_WRITE32_MEMBER(timeout_w);
};
DECLARE_DEVICE_TYPE(GIO64_SLOT, gio64_slot_device)
diff --git a/src/devices/bus/gio64/newport.cpp b/src/devices/bus/gio64/newport.cpp
index c26758d67c3..fdf69a5e240 100644
--- a/src/devices/bus/gio64/newport.cpp
+++ b/src/devices/bus/gio64/newport.cpp
@@ -1729,7 +1729,7 @@ WRITE_LINE_MEMBER(newport_base_device::update_screen_size)
m_screen->set_visarea_full();
}
-READ64_MEMBER(newport_base_device::rex3_r)
+uint64_t newport_base_device::rex3_r(offs_t offset, uint64_t mem_mask)
{
uint64_t ret = 0;
switch (offset & ~(0x800/8))
@@ -3557,7 +3557,7 @@ void newport_base_device::write_y_end(int32_t val)
m_rex3.m_xy_end_i = (m_rex3.m_xy_end_i & 0xffff0000) | (uint16_t)m_rex3.m_y_end_i;
}
-WRITE64_MEMBER(newport_base_device::rex3_w)
+void newport_base_device::rex3_w(offs_t offset, uint64_t data, uint64_t mem_mask)
{
#if ENABLE_NEWVIEW_LOG
if (m_newview_log != nullptr)
diff --git a/src/devices/bus/gio64/newport.h b/src/devices/bus/gio64/newport.h
index 44b0d01ac45..2bca4c1d8b9 100644
--- a/src/devices/bus/gio64/newport.h
+++ b/src/devices/bus/gio64/newport.h
@@ -292,8 +292,8 @@ class newport_base_device : public device_t
public:
newport_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_READ64_MEMBER(rex3_r);
- DECLARE_WRITE64_MEMBER(rex3_w);
+ uint64_t rex3_r(offs_t offset, uint64_t mem_mask = ~0);
+ void rex3_w(offs_t offset, uint64_t data, uint64_t mem_mask = ~0);
uint32_t screen_update(screen_device &device, bitmap_rgb32 &bitmap, const rectangle &cliprect);
diff --git a/src/devices/cpu/mips/ps2vif1.cpp b/src/devices/cpu/mips/ps2vif1.cpp
index 30f7aadc0bc..12b8185fe49 100644
--- a/src/devices/cpu/mips/ps2vif1.cpp
+++ b/src/devices/cpu/mips/ps2vif1.cpp
@@ -240,7 +240,7 @@ WRITE32_MEMBER(ps2_vif1_device::regs_w)
logerror("%s: Write: Unknown %08x = %08x\n", machine().describe_context(), 0x10003c00 + (offset << 2), data);
}
-READ64_MEMBER(ps2_vif1_device::mmio_r)
+uint64_t ps2_vif1_device::mmio_r(offs_t offset)
{
uint64_t ret = 0ULL;
if (offset)
@@ -254,7 +254,7 @@ READ64_MEMBER(ps2_vif1_device::mmio_r)
return ret;
}
-WRITE64_MEMBER(ps2_vif1_device::mmio_w)
+void ps2_vif1_device::mmio_w(offs_t offset, uint64_t data)
{
if (offset)
{
diff --git a/src/devices/cpu/mips/ps2vif1.h b/src/devices/cpu/mips/ps2vif1.h
index 90ec1417ded..1c5ca79547b 100644
--- a/src/devices/cpu/mips/ps2vif1.h
+++ b/src/devices/cpu/mips/ps2vif1.h
@@ -33,8 +33,8 @@ public:
ps2_vif1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~ps2_vif1_device() override;
- DECLARE_READ64_MEMBER(mmio_r);
- DECLARE_WRITE64_MEMBER(mmio_w);
+ uint64_t mmio_r(offs_t offset);
+ void mmio_w(offs_t offset, uint64_t data);
DECLARE_READ32_MEMBER(regs_r);
DECLARE_WRITE32_MEMBER(regs_w);
diff --git a/src/devices/cpu/mips/ps2vu.cpp b/src/devices/cpu/mips/ps2vu.cpp
index 1587c92dd3a..1f7e579e0e9 100644
--- a/src/devices/cpu/mips/ps2vu.cpp
+++ b/src/devices/cpu/mips/ps2vu.cpp
@@ -78,14 +78,14 @@ ps2_vif1_device* sonyvu1_device::interface()
return m_vif.target();
}
-READ64_MEMBER(sonyvu1_device::vif_r)
+uint64_t sonyvu1_device::vif_r(offs_t offset)
{
- return m_vif->mmio_r(space, offset, mem_mask);
+ return m_vif->mmio_r(offset);
}
-WRITE64_MEMBER(sonyvu1_device::vif_w)
+void sonyvu1_device::vif_w(offs_t offset, uint64_t data)
{
- m_vif->mmio_w(space, offset, data, mem_mask);
+ m_vif->mmio_w(offset, data);
}
void sonyvu_device::device_start()
diff --git a/src/devices/cpu/mips/ps2vu.h b/src/devices/cpu/mips/ps2vu.h
index 8d0fb2e513b..c8d7c7b97e6 100644
--- a/src/devices/cpu/mips/ps2vu.h
+++ b/src/devices/cpu/mips/ps2vu.h
@@ -188,8 +188,8 @@ public:
ps2_vif1_device* interface();
- DECLARE_READ64_MEMBER(vif_r);
- DECLARE_WRITE64_MEMBER(vif_w);
+ uint64_t vif_r(offs_t offset);
+ void vif_w(offs_t offset, uint64_t data);
protected:
virtual void device_start() override;
diff --git a/src/devices/cpu/sh/sh4.h b/src/devices/cpu/sh/sh4.h
index 0cb639c23d9..6af65a31b34 100644
--- a/src/devices/cpu/sh/sh4.h
+++ b/src/devices/cpu/sh/sh4.h
@@ -703,12 +703,12 @@ public:
DECLARE_WRITE32_MEMBER( sh4_internal_w );
DECLARE_READ32_MEMBER( sh4_internal_r );
- DECLARE_READ64_MEMBER( sh4_utlb_address_array_r );
- DECLARE_WRITE64_MEMBER( sh4_utlb_address_array_w );
- DECLARE_READ64_MEMBER( sh4_utlb_data_array1_r );
- DECLARE_WRITE64_MEMBER( sh4_utlb_data_array1_w );
- DECLARE_READ64_MEMBER( sh4_utlb_data_array2_r );
- DECLARE_WRITE64_MEMBER( sh4_utlb_data_array2_w );
+ uint64_t sh4_utlb_address_array_r(offs_t offset);
+ void sh4_utlb_address_array_w(offs_t offset, uint64_t data);
+ uint64_t sh4_utlb_data_array1_r(offs_t offset);
+ void sh4_utlb_data_array1_w(offs_t offset, uint64_t data);
+ uint64_t sh4_utlb_data_array2_r(offs_t offset);
+ void sh4_utlb_data_array2_w(offs_t offset, uint64_t data);
virtual void LDTLB(const uint16_t opcode) override;
diff --git a/src/devices/cpu/sh/sh4comn.cpp b/src/devices/cpu/sh/sh4comn.cpp
index 4eaa267c31e..f7678767e68 100644
--- a/src/devices/cpu/sh/sh4comn.cpp
+++ b/src/devices/cpu/sh/sh4comn.cpp
@@ -1324,7 +1324,7 @@ uint32_t sh4_base_device::sh4_getsqremap(uint32_t address)
}
-WRITE64_MEMBER( sh4_base_device::sh4_utlb_address_array_w )
+void sh4_base_device::sh4_utlb_address_array_w(offs_t offset, uint64_t data)
{
/* uses bits 13:8 of address to select which UTLB entry we're addressing
bit 7 of the address enables 'associative' mode, causing a search
@@ -1360,7 +1360,7 @@ WRITE64_MEMBER( sh4_base_device::sh4_utlb_address_array_w )
}
}
-READ64_MEMBER( sh4_base_device::sh4_utlb_address_array_r )
+uint64_t sh4_base_device::sh4_utlb_address_array_r(offs_t offset)
{
// associative bit is ignored for reads
int offs = offset*8;
@@ -1378,7 +1378,7 @@ READ64_MEMBER( sh4_base_device::sh4_utlb_address_array_r )
}
-WRITE64_MEMBER( sh4_base_device::sh4_utlb_data_array1_w )
+void sh4_base_device::sh4_utlb_data_array1_w(offs_t offset, uint64_t data)
{
/* uses bits 13:8 of address to select which UTLB entry we're addressing
@@ -1411,7 +1411,7 @@ WRITE64_MEMBER( sh4_base_device::sh4_utlb_data_array1_w )
}
-READ64_MEMBER(sh4_base_device::sh4_utlb_data_array1_r)
+uint64_t sh4_base_device::sh4_utlb_data_array1_r(offs_t offset)
{
uint32_t ret = 0;
int offs = offset*8;
@@ -1433,7 +1433,7 @@ READ64_MEMBER(sh4_base_device::sh4_utlb_data_array1_r)
-WRITE64_MEMBER( sh4_base_device::sh4_utlb_data_array2_w )
+void sh4_base_device::sh4_utlb_data_array2_w(offs_t offset, uint64_t data)
{
/* uses bits 13:8 of address to select which UTLB entry we're addressing
@@ -1455,7 +1455,7 @@ WRITE64_MEMBER( sh4_base_device::sh4_utlb_data_array2_w )
}
-READ64_MEMBER(sh4_base_device::sh4_utlb_data_array2_r)
+uint64_t sh4_base_device::sh4_utlb_data_array2_r(offs_t offset)
{
uint32_t ret = 0;
int offs = offset*8;
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp
index 7d0aca9b8b3..a2e6d9f7b82 100644
--- a/src/devices/cpu/sharc/sharc.cpp
+++ b/src/devices/cpu/sharc/sharc.cpp
@@ -194,7 +194,7 @@ void adsp21062_device::sharc_iop_delayed_w(uint32_t reg, uint32_t data, int cycl
// 3 ab9 5h 5l 4l
// 4 cde 6h 6l 7h
-READ64_MEMBER( adsp21062_device::pm0_r)
+uint64_t adsp21062_device::pm0_r(offs_t offset)
{
offs_t slot = offset >> 12;
offs_t base = (offset & 0xfff) + (slot >> 1) * (3<<12);
@@ -204,7 +204,7 @@ READ64_MEMBER( adsp21062_device::pm0_r)
return (uint64_t(m_block0[base ]) << 16) | (m_block0[base + 0x1000] >> 16);
}
-WRITE64_MEMBER(adsp21062_device::pm0_w)
+void adsp21062_device::pm0_w(offs_t offset, uint64_t data, uint64_t mem_mask)
{
offs_t slot = offset >> 12;
offs_t base = (offset & 0xfff) + (slot >> 1) * (3<<12);
@@ -219,7 +219,7 @@ WRITE64_MEMBER(adsp21062_device::pm0_w)
}
}
-READ64_MEMBER( adsp21062_device::pm1_r)
+uint64_t adsp21062_device::pm1_r(offs_t offset)
{
offs_t slot = offset >> 12;
offs_t base = (offset & 0xfff) + (slot >> 1) * (3<<12);
@@ -229,7 +229,7 @@ READ64_MEMBER( adsp21062_device::pm1_r)
return (uint64_t(m_block1[base ]) << 16) | (m_block1[base + 0x1000] >> 16);
}
-WRITE64_MEMBER(adsp21062_device::pm1_w)
+void adsp21062_device::pm1_w(offs_t offset, uint64_t data, uint64_t mem_mask)
{
offs_t slot = offset >> 12;
offs_t base = (offset & 0xfff) + (slot >> 1) * (3<<12);
diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h
index 91d9d09497d..9cd61fe89a6 100644
--- a/src/devices/cpu/sharc/sharc.h
+++ b/src/devices/cpu/sharc/sharc.h
@@ -119,10 +119,10 @@ public:
void enable_recompiler();
- DECLARE_READ64_MEMBER( pm0_r);
- DECLARE_WRITE64_MEMBER(pm0_w);
- DECLARE_READ64_MEMBER( pm1_r);
- DECLARE_WRITE64_MEMBER(pm1_w);
+ uint64_t pm0_r(offs_t offset);
+ void pm0_w(offs_t offset, uint64_t data, uint64_t mem_mask = ~0);
+ uint64_t pm1_r(offs_t offset);
+ void pm1_w(offs_t offset, uint64_t data, uint64_t mem_mask = ~0);
DECLARE_READ32_MEMBER( dmw0_r);
DECLARE_WRITE32_MEMBER(dmw0_w);
DECLARE_READ32_MEMBER( dmw1_r);
diff --git a/src/devices/machine/netlist.h b/src/devices/machine/netlist.h
index c5111e5c80e..207f168dee8 100644
--- a/src/devices/machine/netlist.h
+++ b/src/devices/machine/netlist.h
@@ -332,10 +332,10 @@ public:
write(newval);
}
inline DECLARE_WRITE_LINE_MEMBER(write_line) { write(state); }
- inline DECLARE_WRITE8_MEMBER(write8) { write(data); }
- inline DECLARE_WRITE16_MEMBER(write16) { write(data); }
- inline DECLARE_WRITE32_MEMBER(write32) { write(data); }
- inline DECLARE_WRITE64_MEMBER(write64) { write(data); }
+ inline void write8(uint8_t data) { write(data); }
+ inline void write16(uint16_t data) { write(data); }
+ inline void write32(uint32_t data) { write(data); }
+ inline void write64(uint64_t data) { write(data); }
virtual void validity_helper(validity_checker &valid,
netlist::netlist_state_t &nlstate) const override;
@@ -432,10 +432,10 @@ public:
inline DECLARE_INPUT_CHANGED_MEMBER(input_changed) { write(newval); }
DECLARE_WRITE_LINE_MEMBER(write_line) { write(state); }
- DECLARE_WRITE8_MEMBER(write8) { write(data); }
- DECLARE_WRITE16_MEMBER(write16) { write(data); }
- DECLARE_WRITE32_MEMBER(write32) { write(data); }
- DECLARE_WRITE64_MEMBER(write64) { write(data); }
+ void write8(uint8_t data) { write(data); }
+ void write16(uint16_t data) { write(data); }
+ void write32(uint32_t data) { write(data); }
+ void write64(uint64_t data) { write(data); }
virtual void validity_helper(validity_checker &valid, netlist::netlist_state_t &nlstate) const override;
@@ -473,10 +473,10 @@ public:
inline DECLARE_INPUT_CHANGED_MEMBER(input_changed) { write(newval); }
DECLARE_WRITE_LINE_MEMBER(write_line) { write(state); }
- DECLARE_WRITE8_MEMBER(write8) { write(data); }
- DECLARE_WRITE16_MEMBER(write16) { write(data); }
- DECLARE_WRITE32_MEMBER(write32) { write(data); }
- DECLARE_WRITE64_MEMBER(write64) { write(data); }
+ void write8(uint8_t data) { write(data); }
+ void write16(uint16_t data) { write(data); }
+ void write32(uint32_t data) { write(data); }
+ void write64(uint64_t data) { write(data); }
virtual void validity_helper(validity_checker &valid, netlist::netlist_state_t &nlstate) const override;
diff --git a/src/emu/drivers/testcpu.cpp b/src/emu/drivers/testcpu.cpp
index cee5fbbe070..c0b4e86dfe2 100644
--- a/src/emu/drivers/testcpu.cpp
+++ b/src/emu/drivers/testcpu.cpp
@@ -148,7 +148,7 @@ public:
}
// report reads from anywhere
- READ64_MEMBER( general_r )
+ u64 general_r(offs_t offset, u64 mem_mask = ~0)
{
u64 fulloffs = offset;
u64 result = fulloffs + (fulloffs << 8) + (fulloffs << 16) + (fulloffs << 24) + (fulloffs << 32);
@@ -157,7 +157,7 @@ public:
}
// report writes to anywhere
- WRITE64_MEMBER( general_w )
+ void general_w(offs_t offset, u64 data, u64 mem_mask = ~0)
{
printf("Write to %08X & %08X%08X = %08X%08X\n", offset * 8, (int)((mem_mask&0xffffffff00000000LL) >> 32) , (int)(mem_mask&0xffffffff), (int)((data&0xffffffff00000000LL) >> 32), (int)(data&0xffffffff));
}
diff --git a/src/mame/audio/xavix.cpp b/src/mame/audio/xavix.cpp
index 9c07f2b9f71..3d01d8812fd 100644
--- a/src/mame/audio/xavix.cpp
+++ b/src/mame/audio/xavix.cpp
@@ -231,13 +231,13 @@ uint8_t xavix_state::sound_regram_read_cb(offs_t offset)
/* 75f0, 75f1 - 2x8 bits (16 voices?) */
-READ8_MEMBER(xavix_state::sound_startstop_r)
+uint8_t xavix_state::sound_startstop_r(offs_t offset)
{
LOG("%s: sound_startstop_r %02x\n", machine().describe_context(), offset);
return m_soundreg16_0[offset];
}
-WRITE8_MEMBER(xavix_state::sound_startstop_w)
+void xavix_state::sound_startstop_w(offs_t offset, uint8_t data)
{
/* looks like the sound triggers
@@ -290,13 +290,13 @@ WRITE8_MEMBER(xavix_state::sound_startstop_w)
}
/* 75f0, 75f1 - 2x8 bits (16 voices?) */
-READ8_MEMBER(xavix_state::sound_updateenv_r)
+uint8_t xavix_state::sound_updateenv_r(offs_t offset)
{
LOG("%s: sound_updateenv_r %02x\n", machine().describe_context(), offset);
return m_soundreg16_1[offset];
}
-WRITE8_MEMBER(xavix_state::sound_updateenv_w)
+void xavix_state::sound_updateenv_w(offs_t offset, uint8_t data)
{
if (offset == 0)
LOG("%s: sound_updateenv_w %02x, %02x (%d %d %d %d %d %d %d %d - - - - - - - -)\n", machine().describe_context(), offset, data, (data & 0x01) ? 1 : 0, (data & 0x02) ? 1 : 0, (data & 0x04) ? 1 : 0, (data & 0x08) ? 1 : 0, (data & 0x10) ? 1 : 0, (data & 0x20) ? 1 : 0, (data & 0x40) ? 1 : 0, (data & 0x80) ? 1 : 0);
@@ -328,7 +328,7 @@ WRITE8_MEMBER(xavix_state::sound_updateenv_w)
/* 75f4, 75f5 - 2x8 bits (16 voices?) status? */
-READ8_MEMBER(xavix_state::sound_sta16_r)
+uint8_t xavix_state::sound_sta16_r(offs_t offset)
{
uint8_t ret = 0x00;
@@ -343,13 +343,13 @@ READ8_MEMBER(xavix_state::sound_sta16_r)
}
/* 75f6 - master volume control? */
-READ8_MEMBER(xavix_state::sound_volume_r)
+uint8_t xavix_state::sound_volume_r()
{
LOG("%s: sound_volume_r\n", machine().describe_context());
return m_mastervol;
}
-WRITE8_MEMBER(xavix_state::sound_volume_w)
+void xavix_state::sound_volume_w(uint8_t data)
{
m_mastervol = data;
LOG("%s: sound_volume_w %02x\n", machine().describe_context(), data);
@@ -357,7 +357,7 @@ WRITE8_MEMBER(xavix_state::sound_volume_w)
/* 75f7 - main register base*/
-WRITE8_MEMBER(xavix_state::sound_regbase_w)
+void xavix_state::sound_regbase_w(uint8_t data)
{
// this is the upper 6 bits of the RAM address where the actual sound register sets are
// (16x16 regs, so complete 0x100 bytes of RAM eg 0x3b means the complete 0x3b00 - 0x3bff range with 0x3b00 - 0x3b0f being voice 1 etc)
@@ -367,25 +367,25 @@ WRITE8_MEMBER(xavix_state::sound_regbase_w)
/* 75f8, 75f9 - misc unknown sound regs*/
-READ8_MEMBER(xavix_state::sound_75f8_r)
+uint8_t xavix_state::sound_75f8_r()
{
LOG("%s: sound_75f8_r\n", machine().describe_context());
return m_unk_snd75f8;
}
-WRITE8_MEMBER(xavix_state::sound_75f8_w)
+void xavix_state::sound_75f8_w(uint8_t data)
{
m_unk_snd75f8 = data;
LOG("%s: sound_75f8_w %02x\n", machine().describe_context(), data);
}
-READ8_MEMBER(xavix_state::sound_75f9_r)
+uint8_t xavix_state::sound_75f9_r()
{
LOG("%s: sound_75f9_r\n", machine().describe_context());
return m_unk_snd75f9;
}
-WRITE8_MEMBER(xavix_state::sound_75f9_w)
+void xavix_state::sound_75f9_w(uint8_t data)
{
m_unk_snd75f9 = data;
LOG("%s: sound_75f9_w %02x\n", machine().describe_context().c_str(), data);
@@ -393,49 +393,49 @@ WRITE8_MEMBER(xavix_state::sound_75f9_w)
/* 75fa, 75fb, 75fc, 75fd - timers?? generate interrupts?? */
-READ8_MEMBER(xavix_state::sound_timer0_r)
+uint8_t xavix_state::sound_timer0_r()
{
LOG("%s: sound_timer0_r\n", machine().describe_context());
return m_sndtimer[0];
}
-WRITE8_MEMBER(xavix_state::sound_timer0_w)
+void xavix_state::sound_timer0_w(uint8_t data)
{
m_sndtimer[0] = data;
LOG("%s: sound_timer0_w %02x\n", machine().describe_context(), data);
}
-READ8_MEMBER(xavix_state::sound_timer1_r)
+uint8_t xavix_state::sound_timer1_r()
{
LOG("%s: sound_timer1_r\n", machine().describe_context());
return m_sndtimer[1];
}
-WRITE8_MEMBER(xavix_state::sound_timer1_w)
+void xavix_state::sound_timer1_w(uint8_t data)
{
m_sndtimer[1] = data;
LOG("%s: sound_timer1_w %02x\n", machine().describe_context(), data);
}
-READ8_MEMBER(xavix_state::sound_timer2_r)
+uint8_t xavix_state::sound_timer2_r()
{
LOG("%s: sound_timer2_r\n", machine().describe_context());
return m_sndtimer[2];
}
-WRITE8_MEMBER(xavix_state::sound_timer2_w)
+void xavix_state::sound_timer2_w(uint8_t data)
{
m_sndtimer[2] = data;
LOG("%s: sound_timer2_w %02x\n", machine().describe_context(), data);
}
-READ8_MEMBER(xavix_state::sound_timer3_r)
+uint8_t xavix_state::sound_timer3_r()
{
LOG("%s: sound_timer3_r\n", machine().describe_context());
return m_sndtimer[3];
}
-WRITE8_MEMBER(xavix_state::sound_timer3_w) // this one is used by ekara (uk carts) , enabled with 08 in 75fe
+void xavix_state::sound_timer3_w(uint8_t data) // this one is used by ekara (uk carts) , enabled with 08 in 75fe
{
m_sndtimer[3] = data;
LOG("%s: sound_timer3_w %02x\n", machine().describe_context(), data);
@@ -443,7 +443,7 @@ WRITE8_MEMBER(xavix_state::sound_timer3_w) // this one is used by ekara (uk cart
/* 75fe - some kind of IRQ status / Timer Status? */
-READ8_MEMBER(xavix_state::sound_irqstatus_r)
+uint8_t xavix_state::sound_irqstatus_r()
{
// rad_rh checks this after doing something that looks like an irq ack
// the UK ekara sets check the upper bit to see if the interrupt is from the sound timer (rather than checking interrupt source register)
@@ -451,7 +451,7 @@ READ8_MEMBER(xavix_state::sound_irqstatus_r)
return m_sound_irqstatus;
}
-WRITE8_MEMBER(xavix_state::sound_irqstatus_w)
+void xavix_state::sound_irqstatus_w(uint8_t data)
{
// these look like irq ack bits, 4 sources?
// related to sound_timer0_w , sound_timer1_w, sound_timer2_w, sound_timer3_w ?
@@ -514,7 +514,7 @@ WRITE8_MEMBER(xavix_state::sound_irqstatus_w)
-WRITE8_MEMBER(xavix_state::sound_75ff_w)
+void xavix_state::sound_75ff_w(uint8_t data)
{
m_unk_snd75ff = data;
LOG("%s: sound_75ff_w %02x\n", machine().describe_context(), data);
diff --git a/src/mame/includes/xavix.h b/src/mame/includes/xavix.h
index 9a81c267a50..e6b869dc537 100644
--- a/src/mame/includes/xavix.h
+++ b/src/mame/includes/xavix.h
@@ -216,7 +216,7 @@ private:
virtual void video_start() override;
- DECLARE_WRITE8_MEMBER(debug_mem_w)
+ void debug_mem_w(offs_t offset, uint8_t data)
{
m_mainram[offset] = data;
};
@@ -273,104 +273,104 @@ private:
}
- DECLARE_READ8_MEMBER(ioevent_enable_r);
- DECLARE_WRITE8_MEMBER(ioevent_enable_w);
- DECLARE_READ8_MEMBER(ioevent_irqstate_r);
- DECLARE_WRITE8_MEMBER(ioevent_irqack_w);
+ uint8_t ioevent_enable_r();
+ void ioevent_enable_w(uint8_t data);
+ uint8_t ioevent_irqstate_r();
+ void ioevent_irqack_w(uint8_t data);
uint8_t m_ioevent_enable;
uint8_t m_ioevent_active;
void process_ioevent(uint8_t bits);
- DECLARE_WRITE8_MEMBER(slotreg_7810_w);
+ void slotreg_7810_w(uint8_t data);
- DECLARE_WRITE8_MEMBER(rom_dmatrg_w);
+ void rom_dmatrg_w(uint8_t data);
- DECLARE_WRITE8_MEMBER(rom_dmasrc_w);
+ void rom_dmasrc_w(offs_t offset, uint8_t data);
- DECLARE_WRITE8_MEMBER(rom_dmadst_w);
- DECLARE_WRITE8_MEMBER(rom_dmalen_w);
- DECLARE_READ8_MEMBER(rom_dmastat_r);
+ void rom_dmadst_w(offs_t offset, uint8_t data);
+ void rom_dmalen_w(offs_t offset, uint8_t data);
+ uint8_t rom_dmastat_r();
- DECLARE_WRITE8_MEMBER(spritefragment_dma_params_1_w);
- DECLARE_WRITE8_MEMBER(spritefragment_dma_params_2_w);
- DECLARE_WRITE8_MEMBER(spritefragment_dma_trg_w);
- DECLARE_READ8_MEMBER(spritefragment_dma_status_r);
+ void spritefragment_dma_params_1_w(offs_t offset, uint8_t data);
+ void spritefragment_dma_params_2_w(offs_t offset, uint8_t data);
+ void spritefragment_dma_trg_w(uint8_t data);
+ uint8_t spritefragment_dma_status_r();
- DECLARE_READ8_MEMBER(io0_data_r);
- DECLARE_READ8_MEMBER(io1_data_r);
- DECLARE_WRITE8_MEMBER(io0_data_w);
- DECLARE_WRITE8_MEMBER(io1_data_w);
+ uint8_t io0_data_r();
+ uint8_t io1_data_r();
+ void io0_data_w(uint8_t data);
+ void io1_data_w(uint8_t data);
- DECLARE_READ8_MEMBER(io0_direction_r);
- DECLARE_READ8_MEMBER(io1_direction_r);
- DECLARE_WRITE8_MEMBER(io0_direction_w);
- DECLARE_WRITE8_MEMBER(io1_direction_w);
+ uint8_t io0_direction_r();
+ uint8_t io1_direction_r();
+ void io0_direction_w(uint8_t data);
+ void io1_direction_w(uint8_t data);
uint8_t m_io0_data;
uint8_t m_io1_data;
uint8_t m_io0_direction;
uint8_t m_io1_direction;
- DECLARE_READ8_MEMBER(nmi_vector_lo_r);
- DECLARE_READ8_MEMBER(nmi_vector_hi_r);
- DECLARE_READ8_MEMBER(irq_vector_lo_r);
- DECLARE_READ8_MEMBER(irq_vector_hi_r);
-
- DECLARE_WRITE8_MEMBER(vector_enable_w);
- DECLARE_WRITE8_MEMBER(nmi_vector_lo_w);
- DECLARE_WRITE8_MEMBER(nmi_vector_hi_w);
- DECLARE_WRITE8_MEMBER(irq_vector_lo_w);
- DECLARE_WRITE8_MEMBER(irq_vector_hi_w);
-
- DECLARE_READ8_MEMBER(irq_source_r);
- DECLARE_WRITE8_MEMBER(irq_source_w);
-
- DECLARE_READ8_MEMBER(arena_start_r);
- DECLARE_WRITE8_MEMBER(arena_start_w);
- DECLARE_READ8_MEMBER(arena_end_r);
- DECLARE_WRITE8_MEMBER(arena_end_w);
- DECLARE_READ8_MEMBER(arena_control_r);
- DECLARE_WRITE8_MEMBER(arena_control_w);
-
- DECLARE_READ8_MEMBER(colmix_6ff0_r);
- DECLARE_WRITE8_MEMBER(colmix_6ff0_w);
-
- DECLARE_WRITE8_MEMBER(colmix_6ff1_w);
- DECLARE_WRITE8_MEMBER(colmix_6ff2_w);
-
- DECLARE_READ8_MEMBER(dispctrl_6ff8_r);
- DECLARE_WRITE8_MEMBER(dispctrl_6ff8_w);
-
- DECLARE_READ8_MEMBER(sound_startstop_r);
- DECLARE_WRITE8_MEMBER(sound_startstop_w);
- DECLARE_READ8_MEMBER(sound_updateenv_r);
- DECLARE_WRITE8_MEMBER(sound_updateenv_w);
-
- DECLARE_READ8_MEMBER(sound_sta16_r);
- DECLARE_READ8_MEMBER(sound_75f5_r);
- DECLARE_READ8_MEMBER(sound_volume_r);
- DECLARE_WRITE8_MEMBER(sound_volume_w);
-
- DECLARE_WRITE8_MEMBER(sound_regbase_w);
-
- DECLARE_READ8_MEMBER(sound_75f8_r);
- DECLARE_WRITE8_MEMBER(sound_75f8_w);
-
- DECLARE_READ8_MEMBER(sound_75f9_r);
- DECLARE_WRITE8_MEMBER(sound_75f9_w);
-
- DECLARE_READ8_MEMBER(sound_timer0_r);
- DECLARE_WRITE8_MEMBER(sound_timer0_w);
- DECLARE_READ8_MEMBER(sound_timer1_r);
- DECLARE_WRITE8_MEMBER(sound_timer1_w);
- DECLARE_READ8_MEMBER(sound_timer2_r);
- DECLARE_WRITE8_MEMBER(sound_timer2_w);
- DECLARE_READ8_MEMBER(sound_timer3_r);
- DECLARE_WRITE8_MEMBER(sound_timer3_w);
-
- DECLARE_READ8_MEMBER(sound_irqstatus_r);
- DECLARE_WRITE8_MEMBER(sound_irqstatus_w);
- DECLARE_WRITE8_MEMBER(sound_75ff_w);
+ uint8_t nmi_vector_lo_r();
+ uint8_t nmi_vector_hi_r();
+ uint8_t irq_vector_lo_r();
+ uint8_t irq_vector_hi_r();
+
+ void vector_enable_w(uint8_t data);
+ void nmi_vector_lo_w(uint8_t data);
+ void nmi_vector_hi_w(uint8_t data);
+ void irq_vector_lo_w(uint8_t data);
+ void irq_vector_hi_w(uint8_t data);
+
+ uint8_t irq_source_r();
+ void irq_source_w(uint8_t data);
+
+ uint8_t arena_start_r();
+ void arena_start_w(uint8_t data);
+ uint8_t arena_end_r();
+ void arena_end_w(uint8_t data);
+ uint8_t arena_control_r();
+ void arena_control_w(uint8_t data);
+
+ uint8_t colmix_6ff0_r();
+ void colmix_6ff0_w(uint8_t data);
+
+ void colmix_6ff1_w(uint8_t data);
+ void colmix_6ff2_w(uint8_t data);
+
+ uint8_t dispctrl_6ff8_r();
+ void dispctrl_6ff8_w(uint8_t data);
+
+ uint8_t sound_startstop_r(offs_t offset);
+ void sound_startstop_w(offs_t offset, uint8_t data);
+ uint8_t sound_updateenv_r(offs_t offset);
+ void sound_updateenv_w(offs_t offset, uint8_t data);
+
+ uint8_t sound_sta16_r(offs_t offset);
+ uint8_t sound_75f5_r();
+ uint8_t sound_volume_r();
+ void sound_volume_w(uint8_t data);
+
+ void sound_regbase_w(uint8_t data);
+
+ uint8_t sound_75f8_r();
+ void sound_75f8_w(uint8_t data);
+
+ uint8_t sound_75f9_r();
+ void sound_75f9_w(uint8_t data);
+
+ uint8_t sound_timer0_r();
+ void sound_timer0_w(uint8_t data);
+ uint8_t sound_timer1_r();
+ void sound_timer1_w(uint8_t data);
+ uint8_t sound_timer2_r();
+ void sound_timer2_w(uint8_t data);
+ uint8_t sound_timer3_r();
+ void sound_timer3_w(uint8_t data);
+
+ uint8_t sound_irqstatus_r();
+ void sound_irqstatus_w(uint8_t data);
+ void sound_75ff_w(uint8_t data);
uint8_t m_sound_irqstatus;
uint8_t m_soundreg16_0[2];
uint8_t m_soundreg16_1[2];
@@ -380,38 +380,38 @@ private:
emu_timer *m_sound_timer[4];
- DECLARE_READ8_MEMBER(timer_status_r);
- DECLARE_WRITE8_MEMBER(timer_control_w);
- DECLARE_READ8_MEMBER(timer_baseval_r);
- DECLARE_WRITE8_MEMBER(timer_baseval_w);
- DECLARE_READ8_MEMBER(timer_freq_r);
- DECLARE_WRITE8_MEMBER(timer_freq_w);
- DECLARE_READ8_MEMBER(timer_curval_r);
+ uint8_t timer_status_r();
+ void timer_control_w(uint8_t data);
+ uint8_t timer_baseval_r();
+ void timer_baseval_w(uint8_t data);
+ uint8_t timer_freq_r();
+ void timer_freq_w(uint8_t data);
+ uint8_t timer_curval_r();
uint8_t m_timer_control;
uint8_t m_timer_freq;
TIMER_CALLBACK_MEMBER(freq_timer_done);
emu_timer *m_freq_timer;
- DECLARE_WRITE8_MEMBER(palram_sh_w);
- DECLARE_WRITE8_MEMBER(palram_l_w);
- DECLARE_WRITE8_MEMBER(colmix_sh_w);
- DECLARE_WRITE8_MEMBER(colmix_l_w);
- DECLARE_WRITE8_MEMBER(bmp_palram_sh_w);
- DECLARE_WRITE8_MEMBER(bmp_palram_l_w);
- DECLARE_WRITE8_MEMBER(spriteram_w);
+ void palram_sh_w(offs_t offset, uint8_t data);
+ void palram_l_w(offs_t offset, uint8_t data);
+ void colmix_sh_w(offs_t offset, uint8_t data);
+ void colmix_l_w(offs_t offset, uint8_t data);
+ void bmp_palram_sh_w(offs_t offset, uint8_t data);
+ void bmp_palram_l_w(offs_t offset, uint8_t data);
+ void spriteram_w(offs_t offset, uint8_t data);
bool m_sprite_xhigh_ignore_hack;
- DECLARE_WRITE8_MEMBER(tmap1_regs_w);
- DECLARE_WRITE8_MEMBER(tmap2_regs_w);
- DECLARE_READ8_MEMBER(tmap1_regs_r);
- DECLARE_READ8_MEMBER(tmap2_regs_r);
+ void tmap1_regs_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
+ void tmap2_regs_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
+ uint8_t tmap1_regs_r(offs_t offset);
+ uint8_t tmap2_regs_r(offs_t offset);
- DECLARE_WRITE8_MEMBER(spriteregs_w);
+ void spriteregs_w(uint8_t data);
- DECLARE_READ8_MEMBER(pal_ntsc_r);
+ uint8_t pal_ntsc_r();
- DECLARE_READ8_MEMBER(xavix_memoryemu_txarray_r);
- DECLARE_WRITE8_MEMBER(xavix_memoryemu_txarray_w);
+ uint8_t xavix_memoryemu_txarray_r(offs_t offset);
+ void xavix_memoryemu_txarray_w(offs_t offset, uint8_t data);
uint8_t m_txarray[3];
inline uint8_t txarray_r(uint16_t offset)
@@ -502,8 +502,8 @@ private:
// raster IRQ
TIMER_CALLBACK_MEMBER(interrupt_gen);
emu_timer *m_interrupt_timer;
- DECLARE_WRITE8_MEMBER(dispctrl_posirq_x_w);
- DECLARE_WRITE8_MEMBER(dispctrl_posirq_y_w);
+ void dispctrl_posirq_x_w(uint8_t data);
+ void dispctrl_posirq_y_w(uint8_t data);
required_shared_ptr<uint8_t> m_mainram;
required_shared_ptr<uint8_t> m_fragment_sprite;
@@ -569,15 +569,15 @@ protected:
uint8_t m_extbusctrl[3];
- virtual DECLARE_READ8_MEMBER(extintrf_790x_r);
- virtual DECLARE_WRITE8_MEMBER(extintrf_790x_w);
+ virtual uint8_t extintrf_790x_r(offs_t offset);
+ virtual void extintrf_790x_w(offs_t offset, uint8_t data);
// additional SuperXaviX / XaviX2002 stuff
uint8_t m_sx_extended_extbus[3];
- DECLARE_WRITE8_MEMBER(extended_extbus_reg0_w);
- DECLARE_WRITE8_MEMBER(extended_extbus_reg1_w);
- DECLARE_WRITE8_MEMBER(extended_extbus_reg2_w);
+ void extended_extbus_reg0_w(uint8_t data);
+ void extended_extbus_reg1_w(uint8_t data);
+ void extended_extbus_reg2_w(uint8_t data);
};
class xavix_guru_state : public xavix_state
@@ -815,14 +815,14 @@ protected:
}
// TODO, use callbacks?
- virtual DECLARE_READ8_MEMBER(extintrf_790x_r) override
+ virtual uint8_t extintrf_790x_r(offs_t offset) override
{
- return xavix_state::extintrf_790x_r(space,offset,mem_mask);
+ return xavix_state::extintrf_790x_r(offset);
}
- virtual DECLARE_WRITE8_MEMBER(extintrf_790x_w) override
+ virtual void extintrf_790x_w(offs_t offset, uint8_t data) override
{
- xavix_state::extintrf_790x_w(space,offset,data, mem_mask);
+ xavix_state::extintrf_790x_w(offset,data);
if (offset < 3)
{
diff --git a/src/mame/machine/xavix.cpp b/src/mame/machine/xavix.cpp
index b20ff4f04b9..b6b97e40866 100644
--- a/src/mame/machine/xavix.cpp
+++ b/src/mame/machine/xavix.cpp
@@ -8,7 +8,7 @@
#include "logmacro.h"
// general DMA to/from entire main map (not dedicated sprite DMA)
-WRITE8_MEMBER(xavix_state::rom_dmatrg_w)
+void xavix_state::rom_dmatrg_w(uint8_t data)
{
// 0x80 is set in the IRQ routine, presumably to ack it
if (data & 0x80)
@@ -60,27 +60,27 @@ WRITE8_MEMBER(xavix_state::rom_dmatrg_w)
}
-WRITE8_MEMBER(xavix_state::rom_dmasrc_w)
+void xavix_state::rom_dmasrc_w(offs_t offset, uint8_t data)
{
// has_wamg expects to be able to read back the source to modify it (need to check if it expects it to change after an operation)
LOG("%s: rom_dmasrc_w (%02x) %02x\n", machine().describe_context(), offset, data);
m_rom_dma_src[offset] = data;
}
-WRITE8_MEMBER(xavix_state::rom_dmadst_w)
+void xavix_state::rom_dmadst_w(offs_t offset, uint8_t data)
{
LOG("%s: rom_dmadst_w (%02x) %02x\n", machine().describe_context(), offset, data);
m_rom_dma_dst[offset] = data;
}
-WRITE8_MEMBER(xavix_state::rom_dmalen_w)
+void xavix_state::rom_dmalen_w(offs_t offset, uint8_t data)
{
LOG("%s: rom_dmalen_w (%02x) %02x\n", machine().describe_context(), offset, data);
m_rom_dma_len[offset] = data;
}
-READ8_MEMBER(xavix_state::rom_dmastat_r)
+uint8_t xavix_state::rom_dmastat_r()
{
LOG("%s: rom_dmastat_r (operation status?)\n", machine().describe_context());
return 0x00;
@@ -88,53 +88,53 @@ READ8_MEMBER(xavix_state::rom_dmastat_r)
-WRITE8_MEMBER(xavix_state::vector_enable_w)
+void xavix_state::vector_enable_w(uint8_t data)
{
LOG("%s: vector_enable_w %02x\n", machine().describe_context(), data);
m_vectorenable = data;
}
-READ8_MEMBER(xavix_state::nmi_vector_lo_r)
+uint8_t xavix_state::nmi_vector_lo_r()
{
return m_nmi_vector_lo_data;
}
-WRITE8_MEMBER(xavix_state::nmi_vector_lo_w)
+void xavix_state::nmi_vector_lo_w(uint8_t data)
{
LOG("%s: nmi_vector_lo_w %02x\n", machine().describe_context(), data);
m_nmi_vector_lo_data = data;
}
-READ8_MEMBER(xavix_state::nmi_vector_hi_r)
+uint8_t xavix_state::nmi_vector_hi_r()
{
return m_nmi_vector_hi_data;
}
-WRITE8_MEMBER(xavix_state::nmi_vector_hi_w)
+void xavix_state::nmi_vector_hi_w(uint8_t data)
{
LOG("%s: nmi_vector_hi_w %02x\n", machine().describe_context(), data);
m_nmi_vector_hi_data = data;
}
-WRITE8_MEMBER(xavix_state::irq_vector_lo_w)
+void xavix_state::irq_vector_lo_w(uint8_t data)
{
LOG("%s: irq_vector_lo_w %02x\n", machine().describe_context(), data);
m_irq_vector_lo_data = data;
}
-WRITE8_MEMBER(xavix_state::irq_vector_hi_w)
+void xavix_state::irq_vector_hi_w(uint8_t data)
{
LOG("%s: irq_vector_hi_w %02x\n", machine().describe_context(), data);
m_irq_vector_hi_data = data;
}
-READ8_MEMBER(xavix_state::irq_vector_lo_r)
+uint8_t xavix_state::irq_vector_lo_r()
{
LOG("%s: irq_vector_lo_r\n", machine().describe_context());
return m_irq_vector_lo_data;
}
-READ8_MEMBER(xavix_state::irq_vector_hi_r)
+uint8_t xavix_state::irq_vector_hi_r()
{
LOG("%s: irq_vector_hi_r\n", machine().describe_context());
return m_irq_vector_hi_data;
@@ -143,13 +143,13 @@ READ8_MEMBER(xavix_state::irq_vector_hi_r)
// this is external bus control (access to ROM etc.)
-READ8_MEMBER(xavix_state::extintrf_790x_r)
+uint8_t xavix_state::extintrf_790x_r(offs_t offset)
{
LOG("%s: extintrf_790x_r %02x\n", machine().describe_context(), offset);
return m_extbusctrl[offset];
}
-WRITE8_MEMBER(xavix_state::extintrf_790x_w)
+void xavix_state::extintrf_790x_w(offs_t offset, uint8_t data)
{
// Popira, Taiko De Popira etc. games with SEEPROM cartridges uses this to swap between ROM and other peripherals in the cart for data bus access?
LOG("%s: extintrf_790x_w %02x %02x\n", machine().describe_context(), offset, data);
@@ -160,13 +160,13 @@ WRITE8_MEMBER(xavix_state::extintrf_790x_w)
-READ8_MEMBER(xavix_state::ioevent_enable_r)
+uint8_t xavix_state::ioevent_enable_r()
{
LOG("%s: ioevent_enable_r\n", machine().describe_context());
return m_ioevent_enable;
}
-WRITE8_MEMBER(xavix_state::ioevent_enable_w)
+void xavix_state::ioevent_enable_w(uint8_t data)
{
LOG("%s: ioevent_enable_w %02x\n", machine().describe_context(), data);
m_ioevent_enable = data;
@@ -207,13 +207,13 @@ WRITE_LINE_MEMBER(xavix_state::ioevent_trg08)
process_ioevent(0x08);
}
-READ8_MEMBER(xavix_state::ioevent_irqstate_r)
+uint8_t xavix_state::ioevent_irqstate_r()
{
LOG("%s: ioevent_irqstate_r\n", machine().describe_context());
return m_ioevent_active;
}
-WRITE8_MEMBER(xavix_state::ioevent_irqack_w)
+void xavix_state::ioevent_irqack_w(uint8_t data)
{
LOG("%s: ioevent_irqack_w %02x\n", machine().describe_context(), data);
@@ -247,7 +247,7 @@ WRITE8_MEMBER(xavix_state::ioevent_irqack_w)
-WRITE8_MEMBER(xavix_state::slotreg_7810_w)
+void xavix_state::slotreg_7810_w(uint8_t data)
{
LOG("%s: slotreg_7810_w %02x\n", machine().describe_context(), data);
}
@@ -268,24 +268,24 @@ INTERRUPT_GEN_MEMBER(xavix_state::interrupt)
}
-WRITE8_MEMBER(xavix_state::colmix_sh_w)
+void xavix_state::colmix_sh_w(offs_t offset, uint8_t data)
{
m_colmix_sh[offset] = data;
}
-WRITE8_MEMBER(xavix_state::colmix_l_w)
+void xavix_state::colmix_l_w(offs_t offset, uint8_t data)
{
m_colmix_l[offset] = data;
}
-WRITE8_MEMBER(xavix_state::colmix_6ff2_w)
+void xavix_state::colmix_6ff2_w(uint8_t data)
{
LOG("%s: colmix_6ff2_w %02x\n", machine().describe_context(), data);
m_colmix_ctrl[0] = data;
}
-READ8_MEMBER(xavix_state::dispctrl_6ff8_r)
+uint8_t xavix_state::dispctrl_6ff8_r()
{
// 0x80 = main IRQ asserted flag
// 0x40 = raster IRQ asserted flag
@@ -296,7 +296,7 @@ READ8_MEMBER(xavix_state::dispctrl_6ff8_r)
return m_video_ctrl;
}
-WRITE8_MEMBER(xavix_state::dispctrl_6ff8_w)
+void xavix_state::dispctrl_6ff8_w(uint8_t data)
{
// 0x80 = main IRQ ack?
// 0x40 = raster IRQ ack?
@@ -362,13 +362,13 @@ TIMER_CALLBACK_MEMBER(xavix_state::interrupt_gen)
}
-WRITE8_MEMBER(xavix_state::dispctrl_posirq_x_w)
+void xavix_state::dispctrl_posirq_x_w(uint8_t data)
{
LOG("%s: dispctrl_posirq_x_w %02x\n", machine().describe_context(), data);
m_posirq_x[0] = data;
}
-WRITE8_MEMBER(xavix_state::dispctrl_posirq_y_w)
+void xavix_state::dispctrl_posirq_y_w(uint8_t data)
{
LOG("%s: dispctrl_posirq_y_w %02x\n", machine().describe_context(), data);
m_posirq_y[0] = data;
@@ -576,39 +576,39 @@ void xavix_popira2_cart_state::write_io1(uint8_t data, uint8_t direction)
/* General IO port handling */
-READ8_MEMBER(xavix_state::io0_data_r)
+uint8_t xavix_state::io0_data_r()
{
uint8_t ret = read_io0(m_io0_direction) & ~m_io0_direction;
ret |= m_io0_data & m_io0_direction;
return ret;
}
-READ8_MEMBER(xavix_state::io1_data_r)
+uint8_t xavix_state::io1_data_r()
{
uint8_t ret = read_io1(m_io1_direction) & ~m_io1_direction;
ret |= m_io1_data & m_io1_direction;
return ret;
}
-READ8_MEMBER(xavix_state::io0_direction_r)
+uint8_t xavix_state::io0_direction_r()
{
return m_io0_direction;
}
-READ8_MEMBER(xavix_state::io1_direction_r)
+uint8_t xavix_state::io1_direction_r()
{
return m_io1_direction;
}
-WRITE8_MEMBER(xavix_state::io0_data_w)
+void xavix_state::io0_data_w(uint8_t data)
{
m_io0_data = data;
write_io0((data & m_io0_direction) | (read_io0(m_io0_direction) & ~m_io0_direction), m_io0_direction);
LOG("%s: io0_data_w %02x\n", machine().describe_context(), data);
}
-WRITE8_MEMBER(xavix_state::io1_data_w)
+void xavix_state::io1_data_w(uint8_t data)
{
m_io1_data = data;
write_io1((data & m_io1_direction) | (read_io1(m_io1_direction) & ~m_io1_direction), m_io1_direction);
@@ -616,54 +616,54 @@ WRITE8_MEMBER(xavix_state::io1_data_w)
}
-WRITE8_MEMBER(xavix_state::io0_direction_w)
+void xavix_state::io0_direction_w(uint8_t data)
{
m_io0_direction = data;
LOG("%s: io0_direction_w %02x\n", machine().describe_context(), data);
- io0_data_w(space, 0, m_io0_data);
+ io0_data_w(m_io0_data);
}
-WRITE8_MEMBER(xavix_state::io1_direction_w)
+void xavix_state::io1_direction_w(uint8_t data)
{
m_io1_direction = data;
LOG("%s: io1_direction_w %02x\n", machine().describe_context(), data);
- io1_data_w(space, 0, m_io1_data); // requires this for i2cmem to work, is it correct tho?
+ io1_data_w(m_io1_data); // requires this for i2cmem to work, is it correct tho?
}
/* Arena (Visible Area + hblank?) handling */
-READ8_MEMBER(xavix_state::arena_start_r)
+uint8_t xavix_state::arena_start_r()
{
//LOG("%s: arena_start_r\n", machine().describe_context());
return m_arena_start;
}
-WRITE8_MEMBER(xavix_state::arena_start_w)
+void xavix_state::arena_start_w(uint8_t data)
{
LOG("%s: arena_start_w %02x\n", machine().describe_context(), data);
m_arena_start = data; // expected to return data written
}
-READ8_MEMBER(xavix_state::arena_end_r)
+uint8_t xavix_state::arena_end_r()
{
LOG("%s: arena_end_r\n", machine().describe_context());
return m_arena_end;
}
-WRITE8_MEMBER(xavix_state::arena_end_w)
+void xavix_state::arena_end_w(uint8_t data)
{
LOG("%s: arena_end_w %02x\n", machine().describe_context(), data);
m_arena_end = data; // expected to return data written
}
-READ8_MEMBER(xavix_state::arena_control_r)
+uint8_t xavix_state::arena_control_r()
{
// xavtenni expects 0x40 to go high (interlace related?)
m_arena_control ^= 0x40;
return m_arena_control;
}
-WRITE8_MEMBER(xavix_state::arena_control_w)
+void xavix_state::arena_control_w(uint8_t data)
{
LOG("%s: arena_control_w %02x\n", machine().describe_context(), data);
m_arena_control = data;
@@ -674,20 +674,20 @@ WRITE8_MEMBER(xavix_state::arena_control_w)
}
-READ8_MEMBER(xavix_state::timer_baseval_r)
+uint8_t xavix_state::timer_baseval_r()
{
LOG("%s: timer_baseval_r\n", machine().describe_context());
return m_timer_baseval;
}
-READ8_MEMBER(xavix_state::timer_status_r)
+uint8_t xavix_state::timer_status_r()
{
uint8_t ret = m_timer_control;
LOG("%s: timer_status_r\n", machine().describe_context());
return ret;
}
-WRITE8_MEMBER(xavix_state::timer_control_w)
+void xavix_state::timer_control_w(uint8_t data)
{
/* timer is actively used by
ttv_lotr, ttv_sw, drgqst, has_wamg, rad_rh, eka_*, epo_efdx, rad_bass, rad_bb2
@@ -729,20 +729,20 @@ WRITE8_MEMBER(xavix_state::timer_control_w)
}
}
-WRITE8_MEMBER(xavix_state::timer_baseval_w)
+void xavix_state::timer_baseval_w(uint8_t data)
{
// expected to return data written
m_timer_baseval = data;
LOG("%s: timer_baseval_w %02x\n", machine().describe_context(), data);
}
-READ8_MEMBER(xavix_state::timer_freq_r)
+uint8_t xavix_state::timer_freq_r()
{
LOG("%s: timer_freq_r\n", machine().describe_context());
return m_timer_freq;
}
-READ8_MEMBER(xavix_state::timer_curval_r)
+uint8_t xavix_state::timer_curval_r()
{
// TODO implement properly with timers etc. as rad_fb / rad_madfb rely on these values to calculate throw strength!
LOG("%s: timer_curval_r\n", machine().describe_context());
@@ -750,7 +750,7 @@ READ8_MEMBER(xavix_state::timer_curval_r)
}
-WRITE8_MEMBER(xavix_state::timer_freq_w)
+void xavix_state::timer_freq_w(uint8_t data)
{
// 4-bit prescale
LOG("%s: timer_freq_w %02x\n", machine().describe_context(), data);
@@ -796,7 +796,7 @@ TIMER_CALLBACK_MEMBER(xavix_state::freq_timer_done)
}
-READ8_MEMBER(xavix_state::irq_source_r)
+uint8_t xavix_state::irq_source_r()
{
/* the 2nd IRQ routine (regular IRQ) reads here before deciding what to do
@@ -816,7 +816,7 @@ READ8_MEMBER(xavix_state::irq_source_r)
return m_irqsource;
}
-WRITE8_MEMBER(xavix_state::irq_source_w)
+void xavix_state::irq_source_w(uint8_t data)
{
LOG("%s: irq_source_w %02x\n", machine().describe_context(), data);
// cleared on startup in monster truck, no purpose?
@@ -993,19 +993,19 @@ int16_t xavix_state::get_vectors(int which, int half)
// additional SuperXaviX / XaviX2002 stuff
-WRITE8_MEMBER(xavix_state::extended_extbus_reg0_w)
+void xavix_state::extended_extbus_reg0_w(uint8_t data)
{
LOG("%s: extended_extbus_reg0_w %02x\n", machine().describe_context(), data);
m_sx_extended_extbus[0] = data;
}
-WRITE8_MEMBER(xavix_state::extended_extbus_reg1_w)
+void xavix_state::extended_extbus_reg1_w(uint8_t data)
{
LOG("%s: extended_extbus_reg1_w %02x\n", machine().describe_context(), data);
m_sx_extended_extbus[1] = data;
}
-WRITE8_MEMBER(xavix_state::extended_extbus_reg2_w)
+void xavix_state::extended_extbus_reg2_w(uint8_t data)
{
LOG("%s: extended_extbus_reg2_w %02x\n", machine().describe_context(), data);
m_sx_extended_extbus[2] = data;
diff --git a/src/mame/video/xavix.cpp b/src/mame/video/xavix.cpp
index 541d026b97b..a276ec4c662 100644
--- a/src/mame/video/xavix.cpp
+++ b/src/mame/video/xavix.cpp
@@ -61,32 +61,32 @@ void xavix_state::video_start()
}
-WRITE8_MEMBER(xavix_state::palram_sh_w)
+void xavix_state::palram_sh_w(offs_t offset, uint8_t data)
{
m_palram_sh[offset] = data;
update_pen(offset, m_palram_sh[offset], m_palram_l[offset]);
}
-WRITE8_MEMBER(xavix_state::palram_l_w)
+void xavix_state::palram_l_w(offs_t offset, uint8_t data)
{
m_palram_l[offset] = data;
update_pen(offset, m_palram_sh[offset], m_palram_l[offset]);
}
-WRITE8_MEMBER(xavix_state::bmp_palram_sh_w)
+void xavix_state::bmp_palram_sh_w(offs_t offset, uint8_t data)
{
m_bmp_palram_sh[offset] = data;
update_pen(offset+256, m_bmp_palram_sh[offset], m_bmp_palram_l[offset]);
}
-WRITE8_MEMBER(xavix_state::bmp_palram_l_w)
+void xavix_state::bmp_palram_l_w(offs_t offset, uint8_t data)
{
m_bmp_palram_l[offset] = data;
update_pen(offset+256, m_bmp_palram_sh[offset], m_bmp_palram_l[offset]);
}
-WRITE8_MEMBER(xavix_state::spriteram_w)
+void xavix_state::spriteram_w(offs_t offset, uint8_t data)
{
if (offset < 0x100)
{
@@ -898,17 +898,17 @@ uint32_t xavix_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
}
-WRITE8_MEMBER(xavix_state::spritefragment_dma_params_1_w)
+void xavix_state::spritefragment_dma_params_1_w(offs_t offset, uint8_t data)
{
m_spritefragment_dmaparam1[offset] = data;
}
-WRITE8_MEMBER(xavix_state::spritefragment_dma_params_2_w)
+void xavix_state::spritefragment_dma_params_2_w(offs_t offset, uint8_t data)
{
m_spritefragment_dmaparam2[offset] = data;
}
-WRITE8_MEMBER(xavix_state::spritefragment_dma_trg_w)
+void xavix_state::spritefragment_dma_trg_w(uint8_t data)
{
uint16_t len = data & 0x07;
uint16_t src = (m_spritefragment_dmaparam1[1] << 8) | m_spritefragment_dmaparam1[0];
@@ -938,18 +938,18 @@ WRITE8_MEMBER(xavix_state::spritefragment_dma_trg_w)
//uint8_t dat = m_maincpu->read_full_data_sp(src + i);
uint8_t dat = read_full_data_sp_bypass(src + i);
//m_fragment_sprite[(dst + i) & 0x7ff] = dat;
- spriteram_w(space, (dst + i) & 0x7ff, dat);
+ spriteram_w((dst + i) & 0x7ff, dat);
}
}
}
-READ8_MEMBER(xavix_state::spritefragment_dma_status_r)
+uint8_t xavix_state::spritefragment_dma_status_r()
{
// expects bit 0x40 to clear in most cases
return 0x00;
}
-READ8_MEMBER(xavix_state::pal_ntsc_r)
+uint8_t xavix_state::pal_ntsc_r()
{
// only seen 0x10 checked in code
// in monster truck the tile base address gets set based on this, there are 2 copies of the test screen in rom, one for pal, one for ntsc, see 1854c
@@ -958,7 +958,7 @@ READ8_MEMBER(xavix_state::pal_ntsc_r)
}
-WRITE8_MEMBER(xavix_state::tmap1_regs_w)
+void xavix_state::tmap1_regs_w(offs_t offset, uint8_t data, uint8_t mem_mask)
{
/*
0x0 pointer to low tile bits
@@ -1004,7 +1004,7 @@ WRITE8_MEMBER(xavix_state::tmap1_regs_w)
COMBINE_DATA(&m_tmap1_regs[offset]);
}
-WRITE8_MEMBER(xavix_state::tmap2_regs_w)
+void xavix_state::tmap2_regs_w(offs_t offset, uint8_t data, uint8_t mem_mask)
{
// same as above but for 2nd tilemap
if ((offset != 0x4) && (offset != 0x5))
@@ -1016,7 +1016,7 @@ WRITE8_MEMBER(xavix_state::tmap2_regs_w)
}
-WRITE8_MEMBER(xavix_state::spriteregs_w)
+void xavix_state::spriteregs_w(uint8_t data)
{
LOG("%s: spriteregs_w data %02x\n", machine().describe_context(), data);
/*
@@ -1034,20 +1034,20 @@ WRITE8_MEMBER(xavix_state::spriteregs_w)
m_spritereg = data;
}
-READ8_MEMBER(xavix_state::tmap1_regs_r)
+uint8_t xavix_state::tmap1_regs_r(offs_t offset)
{
LOG("%s: tmap1_regs_r offset %02x\n", offset, machine().describe_context());
return m_tmap1_regs[offset];
}
-READ8_MEMBER(xavix_state::tmap2_regs_r)
+uint8_t xavix_state::tmap2_regs_r(offs_t offset)
{
LOG("%s: tmap2_regs_r offset %02x\n", offset, machine().describe_context());
return m_tmap2_regs[offset];
}
// The Text Array / Memory Emulator acts as a memory area that you can point the tilemap sources at to get a fixed pattern of data
-WRITE8_MEMBER(xavix_state::xavix_memoryemu_txarray_w)
+void xavix_state::xavix_memoryemu_txarray_w(offs_t offset, uint8_t data)
{
if (offset < 0x400)
{
@@ -1067,7 +1067,7 @@ WRITE8_MEMBER(xavix_state::xavix_memoryemu_txarray_w)
}
}
-READ8_MEMBER(xavix_state::xavix_memoryemu_txarray_r)
+uint8_t xavix_state::xavix_memoryemu_txarray_r(offs_t offset)
{
return txarray_r(offset);
}